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/linux/Documentation/devicetree/bindings/virtio/
H A Dpci-iommu.yaml40 BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be
63 reg = <0x0 0x40000000 0x0 0x1000000>;
64 ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>;
70 iommu-map = <0x0 &iommu0 0x0 0x8
71 0x9 &iommu0 0x9 0xfff7>;
74 iommu0: iommu@1,0 {
76 reg = <0x800 0 0 0 0>;
85 reg = <0x0 0x50000000 0x0 0x1000000>;
86 ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>;
90 * with endpoint IDs 0x10000 - 0x1ffff
[all …]
/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-afe-clk.c88 return 0; in mt8186_set_audio_int_bus_parent()
149 return 0; in apll1_mux_setting()
210 return 0; in apll2_mux_setting()
216 int ret = 0; in mt8186_afe_enable_cgs()
228 return 0; in mt8186_afe_enable_cgs()
243 int ret = 0; in mt8186_afe_enable_clock()
301 return 0; in mt8186_afe_enable_clock()
350 return 0; in mt8186_afe_suspend_clock()
378 return 0; in mt8186_afe_resume_clock()
409 regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0xfff7, 0x832); in mt8186_apll1_enable()
[all …]
/linux/include/uapi/linux/
H A Dmsdos_fs.h36 #define ATTR_NONE 0 /* no attribute bits */
52 #define DELETED_FLAG 0xe5 /* marks file as deleted when in name[0] */
65 #define MAX_FAT12 0xFF4
66 #define MAX_FAT16 0xFFF4
67 #define MAX_FAT32 0x0FFFFFF6
70 #define BAD_FAT12 0xFF7
71 #define BAD_FAT16 0xFFF7
72 #define BAD_FAT32 0x0FFFFFF7
75 #define EOF_FAT12 0xFFF
76 #define EOF_FAT16 0xFFFF
[all …]
/linux/drivers/mfd/
H A Dwm8350-regmap.c23 { 0xFFFF, 0xFFFF, 0x0000 }, /* R0 - Reset/ID */
24 { 0x7CFF, 0x0C00, 0x0000 }, /* R1 - ID */
25 { 0x007F, 0x0000, 0x0000 }, /* R2 - ROM Mask ID */
26 { 0xBE3B, 0xBE3B, 0x8000 }, /* R3 - System Control 1 */
27 { 0xFEF7, 0xFEF7, 0xF800 }, /* R4 - System Control 2 */
28 { 0x80FF, 0x80FF, 0x8000 }, /* R5 - System Hibernate */
29 { 0xFB0E, 0xFB0E, 0x0000 }, /* R6 - Interface Control */
30 { 0x0000, 0x0000, 0x0000 }, /* R7 */
31 { 0xE537, 0xE537, 0xFFFF }, /* R8 - Power mgmt (1) */
32 { 0x0FF3, 0x0FF3, 0xFFFF }, /* R9 - Power mgmt (2) */
[all …]
/linux/sound/soc/codecs/
H A Daw88261.h14 #define AW88261_ID_REG (0x00)
15 #define AW88261_SYSST_REG (0x01)
16 #define AW88261_SYSINT_REG (0x02)
17 #define AW88261_SYSINTM_REG (0x03)
18 #define AW88261_SYSCTRL_REG (0x04)
19 #define AW88261_SYSCTRL2_REG (0x05)
20 #define AW88261_I2SCTRL1_REG (0x06)
21 #define AW88261_I2SCTRL2_REG (0x07)
22 #define AW88261_I2SCTRL3_REG (0x08)
23 #define AW88261_DACCFG1_REG (0x09)
[all …]
H A Dmt6359.c24 regmap_update_bits(priv->regmap, MT6359_SMT_CON1, 0x3ff0, 0x3ff0); in mt6359_set_gpio_smt()
30 regmap_update_bits(priv->regmap, MT6359_DRV_CON2, 0xffff, 0x8888); in mt6359_set_gpio_driving()
31 regmap_update_bits(priv->regmap, MT6359_DRV_CON3, 0xffff, 0x8888); in mt6359_set_gpio_driving()
32 regmap_update_bits(priv->regmap, MT6359_DRV_CON4, 0x00ff, 0x88); in mt6359_set_gpio_driving()
38 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe); in mt6359_set_playback_gpio()
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249); in mt6359_set_playback_gpio()
42 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6); in mt6359_set_playback_gpio()
43 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1); in mt6359_set_playback_gpio()
53 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ff8); in mt6359_reset_playback_gpio()
54 regmap_update_bits(priv->regmap, MT6359_GPIO_DIR0, 0x7 << 9, 0x0); in mt6359_reset_playback_gpio()
[all …]
H A Dwm8711.c44 { 0, 0x0079 }, { 1, 0x0079 }, { 2, 0x000a }, { 3, 0x0008 },
45 { 4, 0x009f }, { 5, 0x000a }, { 6, 0x0000 }, { 7, 0x0000 },
58 #define wm8711_reset(c) snd_soc_component_write(c, WM8711_RESET, 0)
65 0, 127, 0, out_tlv),
67 7, 1, 0),
73 SOC_DAPM_SINGLE("Line Bypass Switch", WM8711_APANA, 3, 1, 0),
74 SOC_DAPM_SINGLE("HiFi Playback Switch", WM8711_APANA, 4, 1, 0),
79 &wm8711_output_mixer_controls[0],
112 {12288000, 48000, 256, 0x0, 0x0, 0x0},
113 {18432000, 48000, 384, 0x0, 0x1, 0x0},
[all …]
H A Dwm8731.c42 { 0, 0x0097 },
43 { 1, 0x0097 },
44 { 2, 0x0079 },
45 { 3, 0x0079 },
46 { 4, 0x000a },
47 { 5, 0x0008 },
48 { 6, 0x009f },
49 { 7, 0x000a },
50 { 8, 0x0000 },
51 { 9, 0x0000 },
[all …]
H A Dwm8753.c50 module_param(caps_charge, int, 0);
64 { 0x00, 0x0000 },
65 { 0x01, 0x0008 },
66 { 0x02, 0x0000 },
67 { 0x03, 0x000a },
68 { 0x04, 0x000a },
69 { 0x05, 0x0033 },
70 { 0x06, 0x0000 },
71 { 0x07, 0x0007 },
72 { 0x08, 0x00ff },
[all …]
H A Dwm8971.c43 { 0, 0x0097 },
44 { 1, 0x0097 },
45 { 2, 0x0079 },
46 { 3, 0x0079 },
47 { 4, 0x0000 },
48 { 5, 0x0008 },
49 { 6, 0x0000 },
50 { 7, 0x000a },
51 { 8, 0x0000 },
52 { 9, 0x0000 },
[all …]
H A Dwm8750.c36 { 0, 0x0097 },
37 { 1, 0x0097 },
38 { 2, 0x0079 },
39 { 3, 0x0079 },
40 { 4, 0x0000 },
41 { 5, 0x0008 },
42 { 6, 0x0000 },
43 { 7, 0x000a },
44 { 8, 0x0000 },
45 { 9, 0x0000 },
[all …]
H A Dwm8988.c34 { 0, 0x0097 },
35 { 1, 0x0097 },
36 { 2, 0x0079 },
37 { 3, 0x0079 },
38 { 5, 0x0008 },
39 { 7, 0x000a },
40 { 8, 0x0000 },
41 { 10, 0x00ff },
42 { 11, 0x00ff },
43 { 12, 0x000f },
[all …]
/linux/drivers/net/ethernet/asix/
H A Dax88796c_main.h26 #define AX88796C_PHY_ID 0x10
34 #define TX_HDR_SOP_DICF 0x8000
35 #define TX_HDR_SOP_CPHI 0x4000
36 #define TX_HDR_SOP_INT 0x2000
37 #define TX_HDR_SOP_MDEQ 0x1000
38 #define TX_HDR_SOP_PKTLEN 0x07FF
39 #define TX_HDR_SOP_SEQNUM 0xF800
40 #define TX_HDR_SOP_PKTLENBAR 0x07FF
42 #define TX_HDR_SEG_FS 0x8000
43 #define TX_HDR_SEG_LS 0x4000
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_lp.c51 return 0; in b43_lpphy_op_allocate()
59 memset(lpphy, 0, sizeof(*lpphy)); in b43_lpphy_op_prepare_structs()
89 lpphy->txpa[0] = sprom->pa0b0; in lpphy_read_band_sprom()
97 for (i = 0; i < 4; i++) { in lpphy_read_band_sprom()
99 maxpwr - (ofdmpo & 0xF) * 2; in lpphy_read_band_sprom()
105 maxpwr - (ofdmpo & 0xF) * 2; in lpphy_read_band_sprom()
110 for (i = 0; i < 4; i++) in lpphy_read_band_sprom()
124 lpphy->txpa[0] = sprom->pa1b0; in lpphy_read_band_sprom()
127 lpphy->txpal[0] = sprom->pa1lob0; in lpphy_read_band_sprom()
130 lpphy->txpah[0] = sprom->pa1hib0; in lpphy_read_band_sprom()
[all …]
/linux/drivers/i2c/busses/
H A Di2c-eg20t.c21 #define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */
24 #define PCH_BUFFER_MODE_ENABLE 0x0002 /* flag for Buffer mode enable */
25 #define PCH_EEPROM_SW_RST_MODE_ENABLE 0x0008 /* EEPROM SW RST enable flag */
27 #define PCH_I2CSADR 0x00 /* I2C slave address register */
28 #define PCH_I2CCTL 0x04 /* I2C control register */
29 #define PCH_I2CSR 0x08 /* I2C status register */
30 #define PCH_I2CDR 0x0C /* I2C data register */
31 #define PCH_I2CMON 0x10 /* I2C bus monitor register */
32 #define PCH_I2CBC 0x14 /* I2C bus transfer rate setup counter */
33 #define PCH_I2CMOD 0x18 /* I2C mode register */
[all …]
/linux/drivers/media/dvb-frontends/
H A Ddib7000m.c22 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
28 } while (0)
67 DIB7000M_POWER_ALL = 0,
80 if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) { in dib7000m_read_word()
82 return 0; in dib7000m_read_word()
85 state->i2c_write_buffer[0] = (reg >> 8) | 0x80; in dib7000m_read_word()
86 state->i2c_write_buffer[1] = reg & 0xff; in dib7000m_read_word()
88 memset(state->msg, 0, 2 * sizeof(struct i2c_msg)); in dib7000m_read_word()
89 state->msg[0].addr = state->i2c_addr >> 1; in dib7000m_read_word()
90 state->msg[0].flags = 0; in dib7000m_read_word()
[all …]
H A Ddib8000.c32 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
38 } while (0)
54 AS_START = 0,
61 SYMBOL_DEPENDENT_OFF = 0,
141 DIB8000_POWER_ALL = 0,
149 {.addr = i2c->addr >> 1, .flags = 0, .len = 2}, in dib8000_i2c_read16()
153 if (mutex_lock_interruptible(i2c->i2c_buffer_lock) < 0) { in dib8000_i2c_read16()
155 return 0; in dib8000_i2c_read16()
158 msg[0].buf = i2c->i2c_write_buffer; in dib8000_i2c_read16()
159 msg[0].buf[0] = reg >> 8; in dib8000_i2c_read16()
[all …]
/linux/fs/exfat/
H A Dnls.c16 #define UTBL_COUNT (0x10000)
24 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007,
25 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f,
26 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017,
27 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f,
28 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027,
29 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f,
30 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037,
31 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f,
32 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047,
[all …]
/linux/drivers/staging/rts5208/
H A Drtsx_chip.c25 rtsx_write_phy_register(chip, 0x1B, 0x135E); in rtsx_calibration()
27 rtsx_write_phy_register(chip, 0x00, 0x0280); in rtsx_calibration()
28 rtsx_write_phy_register(chip, 0x01, 0x7112); in rtsx_calibration()
29 rtsx_write_phy_register(chip, 0x01, 0x7110); in rtsx_calibration()
30 rtsx_write_phy_register(chip, 0x01, 0x7112); in rtsx_calibration()
31 rtsx_write_phy_register(chip, 0x01, 0x7113); in rtsx_calibration()
32 rtsx_write_phy_register(chip, 0x00, 0x0288); in rtsx_calibration()
40 for (i = 0; i <= chip->max_lun; i++) { in rtsx_enable_card_int()
56 u32 reg = 0; in rtsx_enable_bus_int()
64 for (i = 0; i <= chip->max_lun; i++) { in rtsx_enable_bus_int()
[all …]
/linux/sound/pci/asihpi/
H A Dhpi6205.c56 #define C6205_HSR_INTSRC 0x01
57 #define C6205_HSR_INTAVAL 0x02
58 #define C6205_HSR_INTAM 0x04
59 #define C6205_HSR_CFGERR 0x08
60 #define C6205_HSR_EEREAD 0x10
62 #define C6205_HDCR_WARMRESET 0x01
63 #define C6205_HDCR_DSPINT 0x02
64 #define C6205_HDCR_PCIBOOT 0x04
67 #define C6205_DSPP_MAP1 0x400
71 * of DSP memory mapped registers (starting at 0x01800000).
[all …]
/linux/sound/pci/
H A Des1968.c118 static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
119 static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
120 static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
122 static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
123 static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
127 static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
142 MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard. (0 = auto-detect)");
144 MODULE_PARM_DESC(use_pm, "Toggle power-management. (0 = off, 1 = on, 2 = auto)");
146 MODULE_PARM_DESC(enable_mpu, "Enable MPU401. (0 = off, 1 = on, 2 = auto)");
160 #define NEC_VERSA_SUBID1 0x80581033
[all …]
/linux/drivers/usb/serial/
H A Doption.c51 #define OPTION_VENDOR_ID 0x0AF0
52 #define OPTION_PRODUCT_COLT 0x5000
53 #define OPTION_PRODUCT_RICOLA 0x6000
54 #define OPTION_PRODUCT_RICOLA_LIGHT 0x6100
55 #define OPTION_PRODUCT_RICOLA_QUAD 0x6200
56 #define OPTION_PRODUCT_RICOLA_QUAD_LIGHT 0x6300
57 #define OPTION_PRODUCT_RICOLA_NDIS 0x6050
58 #define OPTION_PRODUCT_RICOLA_NDIS_LIGHT 0x6150
59 #define OPTION_PRODUCT_RICOLA_NDIS_QUAD 0x6250
60 #define OPTION_PRODUCT_RICOLA_NDIS_QUAD_LIGHT 0x6350
[all …]
/linux/fs/hfsplus/
H A Dtables.c24 // High-byte indices ( == 0 iff no case mapping and no ignorables )
27 /* 0 */ 0x0100, 0x0200, 0x0000, 0x0300, 0x0400, 0x0500, 0x0000, 0x0000,
28 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
29 /* 1 */ 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
30 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
31 /* 2 */ 0x0700, 0x0800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
32 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
33 /* 3 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
34 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
35 /* 4 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_reg.h26 #define ATC_ATC_INT_STS_REG_ADDRESS_ERROR (0x1<<0)
27 #define ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS (0x1<<2)
28 #define ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU (0x1<<5)
29 #define ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT (0x1<<3)
30 #define ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR (0x1<<4)
31 #define ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND (0x1<<1)
33 #define ATC_REG_ATC_INIT_ARRAY 0x1100b8
35 #define ATC_REG_ATC_INIT_DONE 0x1100bc
36 /* [RC 6] Interrupt register #0 read clear */
37 #define ATC_REG_ATC_INT_STS_CLR 0x1101c0
[all …]