| /linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a7792.dtsi | 41 #clock-cells = <0>; 43 clock-frequency = <0>; 48 #size-cells = <0>; 50 cpu0: cpu@0 { 53 reg = <0>; 72 L2_CA15: cache-controller-0 { 83 #clock-cells = <0>; 85 clock-frequency = <0>; 89 lbsc: bus@0 { 93 ranges = <0 0 0 0x1c000000>; [all …]
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| H A D | r8a77470.dtsi | 28 #size-cells = <0>; 30 cpu0: cpu@0 { 33 reg = <0>; 52 L2_CA7: cache-controller-0 { 63 #clock-cells = <0>; 65 clock-frequency = <0>; 78 #clock-cells = <0>; 80 clock-frequency = <0>; 93 reg = <0 0xe6020000 0 0x0c>; 104 reg = <0 0xe6050000 0 0x50>; [all …]
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| H A D | r8a7794.dtsi | 35 * The external audio clocks are configured as 0 Hz fixed frequency 41 #clock-cells = <0>; 42 clock-frequency = <0>; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 51 #clock-cells = <0>; 52 clock-frequency = <0>; 58 #clock-cells = <0>; 60 clock-frequency = <0>; 65 #size-cells = <0>; [all …]
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| H A D | r8a7793.dtsi | 33 * The external audio clocks are configured as 0 Hz fixed frequency 39 #clock-cells = <0>; 40 clock-frequency = <0>; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 56 #clock-cells = <0>; 58 clock-frequency = <0>; 63 #size-cells = <0>; [all …]
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| H A D | r8a7745.dtsi | 37 * The external audio clocks are configured as 0 Hz fixed 43 #clock-cells = <0>; 44 clock-frequency = <0>; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 53 #clock-cells = <0>; 54 clock-frequency = <0>; 60 #clock-cells = <0>; 62 clock-frequency = <0>; 67 #size-cells = <0>; [all …]
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| H A D | r8a7743.dtsi | 20 * The external audio clocks are configured as 0 Hz fixed frequency 26 #clock-cells = <0>; 27 clock-frequency = <0>; 32 #clock-cells = <0>; 33 clock-frequency = <0>; 38 #clock-cells = <0>; 39 clock-frequency = <0>; 45 #clock-cells = <0>; 47 clock-frequency = <0>; 52 #size-cells = <0>; [all …]
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| H A D | r8a7744.dtsi | 20 * The external audio clocks are configured as 0 Hz fixed frequency 26 #clock-cells = <0>; 27 clock-frequency = <0>; 32 #clock-cells = <0>; 33 clock-frequency = <0>; 38 #clock-cells = <0>; 39 clock-frequency = <0>; 45 #clock-cells = <0>; 47 clock-frequency = <0>; 52 #size-cells = <0>; [all …]
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| H A D | r8a7790.dtsi | 42 * The external audio clocks are configured as 0 Hz fixed frequency 48 #clock-cells = <0>; 49 clock-frequency = <0>; 53 #clock-cells = <0>; 54 clock-frequency = <0>; 58 #clock-cells = <0>; 59 clock-frequency = <0>; 65 #clock-cells = <0>; 67 clock-frequency = <0>; 72 #size-cells = <0>; [all …]
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| H A D | r8a7742.dtsi | 20 * The external audio clocks are configured as 0 Hz fixed frequency 26 #clock-cells = <0>; 27 clock-frequency = <0>; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 43 #clock-cells = <0>; 45 clock-frequency = <0>; 50 #size-cells = <0>; [all …]
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| H A D | r8a7791.dtsi | 41 * The external audio clocks are configured as 0 Hz fixed frequency 47 #clock-cells = <0>; 48 clock-frequency = <0>; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 57 #clock-cells = <0>; 58 clock-frequency = <0>; 64 #clock-cells = <0>; 66 clock-frequency = <0>; 71 #size-cells = <0>; [all …]
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a77995.dtsi | 20 * The external audio clocks are configured as 0 Hz fixed frequency 26 #clock-cells = <0>; 27 clock-frequency = <0>; 32 #clock-cells = <0>; 33 clock-frequency = <0>; 39 #clock-cells = <0>; 40 clock-frequency = <0>; 45 #size-cells = <0>; 47 a53_0: cpu@0 { 49 reg = <0x0>; [all …]
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| H A D | r8a774c0.dtsi | 19 * The external audio clocks are configured as 0 Hz fixed frequency 25 #clock-cells = <0>; 26 clock-frequency = <0>; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 72 #size-cells = <0>; [all …]
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| /linux/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a7791.c | 15 * Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in 19 PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 65 PINMUX_RESERVED = 0, 1746 /* ADICHS 0 */ 1750 /* ADICHS 0 */ 1778 /* ADICHS B 0 */ 1782 /* ADICHS B 0 */ 1878 RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), 1901 RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), 2072 /* R[7:0], G[7:0], B[7:0] */ [all …]
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| H A D | pfc-r8a7796.c | 22 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ 257 /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ … 258 … F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 259 … F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 260 … F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 261 … F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 262 …F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 263 …F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 264 …0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0… 265 …0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(… [all …]
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| H A D | pfc-r8a77990.c | 22 PORT_GP_CFG_18(0, fn, sfx, CFG_FLAGS), \ 213 /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ … 214 …(HSCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 215 …CTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 216 …RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 217 …M(HTX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 218 …M(HRX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 219 …B) FM(VI4_DATA0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 220 …B) FM(VI4_DATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 221 …B) FM(VI4_DATA2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… [all …]
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| H A D | pfc-r8a7790.c | 24 PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 43 PINMUX_RESERVED = 0, 1780 RCAR_GP_PIN(0, 23), 1825 RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 1826 RCAR_GP_PIN(0, 11), 1828 RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 1847 RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 1848 RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), 1849 RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), 1851 RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), [all …]
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| H A D | pfc-r8a7794.c | 18 PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 45 PORT_GP_CFG_1(6, 0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33), \ 80 PINMUX_RESERVED = 0, 1527 RCAR_GP_PIN(5, 0), 1627 RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), 1651 RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), 1764 RCAR_GP_PIN(1, 0), 1773 RCAR_GP_PIN(5, 0), 1799 /* R[7:0], G[7:0], B[7:0] */ 1802 RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 0), [all …]
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| H A D | pfc-r8a77970.c | 22 PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP_DOWN), \ 162 /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */ 163 … FM(HSCK0) F_(0, 0) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 164 …FM(HRTS0_N) F_(0, 0) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 165 …FM(HCTS0_N) F_(0, 0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 166 … FM(HTX0) F_(0, 0) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 167 …MSIOF3_RXD) F_(0, 0) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 168 …MSIOF3_TXD) F_(0, 0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 169 …MSIOF3_SS1) F_(0, 0) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 170 …IOF3_SS2) F_(0, 0) FM(A7) FM(PWMFSW0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… [all …]
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| H A D | pfc-r8a7792.c | 14 PORT_GP_CFG_29(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 39 PINMUX_RESERVED = 0, 782 RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), 784 RCAR_GP_PIN(7, 0), RCAR_GP_PIN(6, 11), 806 RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), 808 RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 0), 856 RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 5), 857 RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 3), RCAR_GP_PIN(0, 2), 858 RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), 859 RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), [all …]
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| H A D | pfc-r8a77965.c | 23 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ 257 /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ … 258 … F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 259 … F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 260 … F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 261 … F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 262 …0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST2_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… 263 …F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 264 …0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0… 265 …0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(… [all …]
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| H A D | pfc-r8a77951.c | 17 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ 252 /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ … 253 … F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 254 … F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 255 … F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 256 … F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 257 …0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST2_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… 258 …F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 259 …0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0… 260 …0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(… [all …]
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| H A D | pfc-r8a77980.c | 22 PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP_DOWN), \ 196 /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */ 197 …_RMII_CRS_DV) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 198 …R_RMII_RX_ER) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 199 …ER_RMII_RXD0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 200 …ER_RMII_RXD1) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 201 …_RMII_TXD_EN) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 202 … F_(0, 0) FM(GETHER_RMII_TXD0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 203 … F_(0, 0) FM(GETHER_RMII_TXD1) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 204 …FCLK) FM(A7) FM(PWMFSW0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) … [all …]
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| H A D | pfc-r8a77995.c | 21 PORT_GP_CFG_9(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ 209 /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */ 210 …OF2_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 211 …_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… 212 …FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 213 …FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 214 …C_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… 215 …M(RX5_A) FM(SCL3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 216 …M(TX5_A) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 217 …FM(MSIOF3_TXD_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… [all …]
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| H A D | pfc-r8a77470.c | 14 PORT_GP_CFG_4(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 15 PORT_GP_CFG_1(0, 4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 16 PORT_GP_CFG_1(0, 5, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP), \ 17 PORT_GP_CFG_1(0, 6, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP), \ 18 PORT_GP_CFG_1(0, 7, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP), \ 19 PORT_GP_CFG_1(0, 8, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP), \ 20 PORT_GP_CFG_1(0, 9, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP), \ 21 PORT_GP_CFG_1(0, 10, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP), \ 22 PORT_GP_CFG_1(0, 11, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 23 PORT_GP_CFG_1(0, 12, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ [all …]
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