0xe6060000 (full) in projects: linux - OpenGrok search results

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Searched +full:0 +full:xe6060000 (Results 1 – 25 of 26) sorted by relevance

/linux/Documentation/devicetree/bindings/pinctrl/
H A D	renesas,pfc.yaml	28 - renesas,pfc-r8a774a3 # RZ/G2M v3.0 132 $ref: "#/additionalProperties/anyOf/0" 138 reg = <0xe6050000 0x8000>, 139 <0xe605800c 0x20>; 142 gpio-ranges = <&pfc 0 0 212>; 144 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, 145 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, 146 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, 147 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, 148 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, [all …]
/linux/arch/arm/boot/dts/renesas/
H A D	r8a77470.dtsi	`27 #size-cells = <0>; 29 cpu0: cpu@0 { 32 reg = <0>; 51 L2_CA7: cache-controller-0 { 62 #clock-cells = <0>; 64 clock-frequency = <0>; 77 #clock-cells = <0>; 79 clock-frequency = <0>; 93 reg = <0 0xe6020000 0 0x0c>; 104 reg = <0 0xe6050000 0 0x50>; [all …]`
/linux/arch/arm64/boot/dts/renesas/
H A D	r8a77970.dtsi	`22 #clock-cells = <0>; 23 clock-frequency = <0>; 28 #size-cells = <0>; 30 a53_0: cpu@0 { 33 reg = <0>; 60 #clock-cells = <0>; 62 clock-frequency = <0>; 67 #clock-cells = <0>; 69 clock-frequency = <0>; 87 #clock-cells = <0>; [all …]`
H A D	r8a77980.dtsi	`22 #clock-cells = <0>; 23 clock-frequency = <0>; 28 #size-cells = <0>; 30 a53_0: cpu@0 { 33 reg = <0>; 80 #clock-cells = <0>; 82 clock-frequency = <0>; 87 #clock-cells = <0>; 89 clock-frequency = <0>; 95 #clock-cells = <0>; [all …]`
H A D	r8a77995.dtsi	`19 * The external audio clocks are configured as 0 Hz fixed frequency 25 #clock-cells = <0>; 26 clock-frequency = <0>; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 38 #clock-cells = <0>; 39 clock-frequency = <0>; 44 #size-cells = <0>; 46 a53_0: cpu@0 { 48 reg = <0x0>; [all …]`
H A D	r8a774c0.dtsi	`18 * The external audio clocks are configured as 0 Hz fixed frequency 24 #clock-cells = <0>; 25 clock-frequency = <0>; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 67 #size-cells = <0>; [all …]`
H A D	r8a77990.dtsi	`18 * The external audio clocks are configured as 0 Hz fixed frequency 24 #clock-cells = <0>; 25 clock-frequency = <0>; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 67 #size-cells = <0>; [all …]`
H A D	r8a774a1.dtsi	`19 * The external audio clocks are configured as 0 Hz fixed frequency 25 #clock-cells = <0>; 26 clock-frequency = <0>; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 48 cluster0_opp: opp-table-0 { [all …]`
H A D	r8a774b1.dtsi	`19 * The external audio clocks are configured as 0 Hz fixed frequency 25 #clock-cells = <0>; 26 clock-frequency = <0>; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 48 cluster0_opp: opp-table-0 { [all …]`
H A D	r8a77961.dtsi	`18 * The external audio clocks are configured as 0 Hz fixed frequency 24 #clock-cells = <0>; 25 clock-frequency = <0>; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 47 cluster0_opp: opp-table-0 { [all …]`
H A D	r8a774e1.dtsi	`19 * The external audio clocks are configured as 0 Hz fixed frequency 25 #clock-cells = <0>; 26 clock-frequency = <0>; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 48 cluster0_opp: opp-table-0 { [all …]`
H A D	r8a77960.dtsi	`18 * The external audio clocks are configured as 0 Hz fixed frequency 24 #clock-cells = <0>; 25 clock-frequency = <0>; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 47 cluster0_opp: opp-table-0 { [all …]`
H A D	r8a77965.dtsi	`23 * The external audio clocks are configured as 0 Hz fixed frequency 29 #clock-cells = <0>; 30 clock-frequency = <0>; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 52 cluster0_opp: opp-table-0 { [all …]`
H A D	r8a77951.dtsi	`23 * The external audio clocks are configured as 0 Hz fixed frequency 29 #clock-cells = <0>; 30 clock-frequency = <0>; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 52 cluster0_opp: opp-table-0 { [all …]`
/linux/drivers/pinctrl/renesas/
H A D	pfc-r8a7791.c	`15 * Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in 19 PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 65 PINMUX_RESERVED = 0, 1746 /* ADICHS 0 / 1750 / ADICHS 0 / 1778 / ADICHS B 0 / 1782 / ADICHS B 0 / 1878 RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), 1901 RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), 2072 / R[7:0], G[7:0], B[7:0] */ [all …]`
H A D	pfc-r8a7796.c	22 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ 258 /* IPSRx / / 0 / / 1 / / 2 / / 3 / / 4 / / 5 / / 6 / / 7 / / 8 */ … 259 … F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 260 … F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 261 … F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 262 … F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 263 …F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 264 …F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 265 …0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0… 266 …0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(… [all …]
H A D	pfc-r8a77990.c	22 PORT_GP_CFG_18(0, fn, sfx, CFG_FLAGS), \ 213 /* IPSRx / / 0 / / 1 / / 2 / / 3 / / 4 / / 5 / / 6 / / 7 / / 8 */ … 214 …(HSCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 215 …CTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 216 …RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 217 …M(HTX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 218 …M(HRX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 219 …B) FM(VI4_DATA0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 220 …B) FM(VI4_DATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 221 …B) FM(VI4_DATA2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… [all …]
H A D	pfc-r8a7790.c	24 PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 43 PINMUX_RESERVED = 0, 1780 RCAR_GP_PIN(0, 23), 1825 RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 1826 RCAR_GP_PIN(0, 11), 1828 RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 1847 RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 1848 RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), 1849 RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), 1851 RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), [all …]
H A D	pfc-r8a7794.c	`18 PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 45 PORT_GP_CFG_1(6, 0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33), \ 80 PINMUX_RESERVED = 0, 1527 RCAR_GP_PIN(5, 0), 1627 RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), 1651 RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), 1764 RCAR_GP_PIN(1, 0), 1773 RCAR_GP_PIN(5, 0), 1799 /* R[7:0], G[7:0], B[7:0] */ 1802 RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 0), [all …]`
H A D	pfc-r8a77970.c	22 PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 \| SH_PFC_PIN_CFG_PULL_UP_DOWN), \ 163 /* IPSRx / / 0 / / 1 / / 2 / / 3 / / 4 / / 5 / / 6 - F */ 164 … FM(HSCK0) F_(0, 0) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 165 …FM(HRTS0_N) F_(0, 0) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 166 …FM(HCTS0_N) F_(0, 0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 167 … FM(HTX0) F_(0, 0) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 168 …MSIOF3_RXD) F_(0, 0) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 169 …MSIOF3_TXD) F_(0, 0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 170 …MSIOF3_SS1) F_(0, 0) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 171 …IOF3_SS2) F_(0, 0) FM(A7) FM(PWMFSW0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… [all …]
H A D	pfc-r8a7792.c	14 PORT_GP_CFG_29(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 39 PINMUX_RESERVED = 0, 782 RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), 784 RCAR_GP_PIN(7, 0), RCAR_GP_PIN(6, 11), 806 RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), 808 RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 0), 856 RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 5), 857 RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 3), RCAR_GP_PIN(0, 2), 858 RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), 859 RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), [all …]
H A D	pfc-r8a77965.c	23 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ 258 /* IPSRx / / 0 / / 1 / / 2 / / 3 / / 4 / / 5 / / 6 / / 7 / / 8 */ … 259 … F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 260 … F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 261 … F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 262 … F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 263 …0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST2_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… 264 …F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 265 …0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0… 266 …0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(… [all …]
H A D	pfc-r8a77951.c	17 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ 253 /* IPSRx / / 0 / / 1 / / 2 / / 3 / / 4 / / 5 / / 6 / / 7 / / 8 */ … 254 … F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 255 … F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 256 … F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 257 … F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… 258 …0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST2_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… 259 …F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 260 …0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0… 261 …0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(… [all …]
H A D	pfc-r8a77980.c	22 PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 \| SH_PFC_PIN_CFG_PULL_UP_DOWN), \ 197 /* IPSRx / / 0 / / 1 / / 2 / / 3 / / 4 / / 5 / / 6 - F */ 198 …_RMII_CRS_DV) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 199 …R_RMII_RX_ER) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 200 …ER_RMII_RXD0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 201 …ER_RMII_RXD1) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 202 …_RMII_TXD_EN) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 203 … F_(0, 0) FM(GETHER_RMII_TXD0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 204 … F_(0, 0) FM(GETHER_RMII_TXD1) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 205 …FCLK) FM(A7) FM(PWMFSW0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) … [all …]
H A D	pfc-r8a77995.c	21 PORT_GP_CFG_9(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ 209 /* IPSRx / / 0 / / 1 / / 2 / / 3 / / 4 / / 5 / / 6 - F */ 210 …OF2_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 211 …_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… 212 …FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 213 …FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 214 …C_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… 215 …M(RX5_A) FM(SCL3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 216 …M(TX5_A) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… 217 …FM(MSIOF3_TXD_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… [all …]