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/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2hk-clocks.dtsi10 #clock-cells = <0>;
14 reg = <0x02620370 4>;
19 #clock-cells = <0>;
22 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
27 #clock-cells = <0>;
31 reg = <0x02620358 4>;
36 #clock-cells = <0>;
40 reg = <0x02620360 4>;
45 #clock-cells = <0>;
49 reg = <0x02620368 4>;
[all …]
H A Dkeystone-k2l-clocks.dtsi10 #clock-cells = <0>;
14 reg = <0x02620370 4>;
19 #clock-cells = <0>;
22 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
27 #clock-cells = <0>;
31 reg = <0x02620358 4>;
36 #clock-cells = <0>;
40 reg = <0x02620360 4>;
45 #clock-cells = <0>;
50 reg = <0x02350004 0xb00>, <0x02350000 0x400>;
[all …]
H A Dkeystone-clocks.dtsi14 #clock-cells = <0>;
17 reg = <0x02310108 4>;
24 #clock-cells = <0>;
33 #clock-cells = <0>;
42 #clock-cells = <0>;
45 reg = <0x02310120 4>;
46 bit-shift = <0>;
52 #clock-cells = <0>;
55 reg = <0x02310164 4>;
56 bit-shift = <0>;
[all …]
H A Dkeystone-k2e-clocks.dtsi10 #clock-cells = <0>;
13 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
18 #clock-cells = <0>;
22 reg = <0x02620358 4>;
27 #clock-cells = <0>;
31 reg = <0x02620360 4>;
36 #clock-cells = <0>;
40 reg = <0x02350004 0xb00>, <0x02350000 0x400>;
42 domain-id = <0>;
46 #clock-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-mt7621.txt7 - #size-cells: should be 0.
21 reg = <0xb00 0x100>;
23 #size-cells = <0>;
H A Dralink,mt7621-spi.yaml50 reg = <0xb00 0x100>;
57 #size-cells = <0>;
60 pinctrl-0 = <&spi_pins>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dkeystone-gate.txt11 - #clock-cells : from common clock binding; shall be set to 0.
22 #clock-cells = <0>;
26 reg = <0x02350008 0xb00>, <0x02350000 0x400>;
28 domain-id = <0>;
/freebsd/contrib/file/magic/Magdir/
H A Dapple6 0 search/1/t FiLeStArTfIlEsTaRt binscii (apple ][) text
7 0 string \x0aGL Binary II (apple ][) data
8 0 string \x76\xff Squeezed (apple ][) data
9 0 string NuFile NuFile archive (apple ][) data
10 0 string N\xf5F\xe9l\xe5 NuFile archive (apple ][) data
11 0 belong 0x00051600 AppleSingle encoded Macintosh file
12 0 belong 0x00051607 AppleDouble encoded Macintosh file
18 0 string A2R
37 0 string WOZ
50 0 string MOOF
[all …]
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dlpc18xx-ccu.h13 #define CLK_APB3_BUS 0x100
14 #define CLK_APB3_I2C1 0x108
15 #define CLK_APB3_DAC 0x110
16 #define CLK_APB3_ADC0 0x118
17 #define CLK_APB3_ADC1 0x120
18 #define CLK_APB3_CAN0 0x128
19 #define CLK_APB1_BUS 0x200
20 #define CLK_APB1_MOTOCON_PWM 0x208
21 #define CLK_APB1_I2C0 0x210
22 #define CLK_APB1_I2S 0x218
[all …]
/freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Dpmc.txt61 reg = <0xb00 0x100 0xa00 0x100>;
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos54xx.dtsi42 <7 0>,
60 reg = <0x02020000 0x54000>;
63 ranges = <0 0x02020000 0x54000>;
65 smp-sram@0 {
67 reg = <0x0 0x1000>;
72 reg = <0x53000 0x1000>;
79 reg = <0x101c0000 0xb00>;
96 reg = <0x101d0000 0x100>;
102 reg = <0x12d10000 0x100>;
111 reg = <0x12ca0000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dtqm5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dcharon.dts23 #size-cells = <0>;
25 PowerPC,5200@0 {
27 reg = <0>;
30 d-cache-size = <0x4000>; // L1, 16K
31 i-cache-size = <0x4000>; // L1, 16K
32 timebase-frequency = <0>; // from bootloader
33 bus-frequency = <0>; // from bootloader
34 clock-frequency = <0>; // from bootloader
38 memory@0 {
40 reg = <0x00000000 0x08000000>; // 128MB
[all …]
H A Dlite5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dmpc5200b.dtsi21 #size-cells = <0>;
23 powerpc: PowerPC,5200@0 {
25 reg = <0>;
28 d-cache-size = <0x4000>; // L1, 16K
29 i-cache-size = <0x4000>; // L1, 16K
30 timebase-frequency = <0>; // from bootloader
31 bus-frequency = <0>; // from bootloader
32 clock-frequency = <0>; // from bootloader
36 memory: memory@0 {
38 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dmpc832x_rdb.dts26 #size-cells = <0>;
28 PowerPC,8323@0 {
30 reg = <0x0>;
31 d-cache-line-size = <0x20>; // 32 bytes
32 i-cache-line-size = <0x20>; // 32 bytes
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
43 reg = <0x00000000 0x04000000>;
51 ranges = <0x0 0xe0000000 0x00100000>;
[all …]
H A Dmpc8313erdb.dts26 #size-cells = <0>;
28 PowerPC,8313@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>; // from bootloader
36 bus-frequency = <0>; // from bootloader
37 clock-frequency = <0>; // from bootloader
43 reg = <0x00000000 0x08000000>; // 128MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
57 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
H A Dmpc8379_mds.dts26 #size-cells = <0>;
28 PowerPC,8379@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
43 reg = <0x00000000 0x20000000>; // 512MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
55 ranges = <0 0x0 0xfe000000 0x02000000
[all …]
H A Dmpc8377_wlan.dts28 #size-cells = <0>;
30 PowerPC,8377@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
55 ranges = <0x0 0x0 0xfc000000 0x04000000>;
[all …]
H A Dmpc8379_rdb.dts25 #size-cells = <0>;
27 PowerPC,8379@0 {
29 reg = <0x0>;
34 timebase-frequency = <0>;
35 bus-frequency = <0>;
36 clock-frequency = <0>;
42 reg = <0x00000000 0x10000000>; // 256MB at 0
49 reg = <0xe0005000 0x1000>;
50 interrupts = <77 0x8>;
56 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
H A Dmpc836x_rdk.dts32 #size-cells = <0>;
34 PowerPC,8360@0 {
36 reg = <0>;
42 timebase-frequency = <0>;
43 bus-frequency = <0>;
44 clock-frequency = <0>;
51 reg = <0 0>;
60 ranges = <0 0xe0000000 0x200000>;
61 reg = <0xe0000000 0x200>;
63 bus-frequency = <0>;
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_iro_values.h33 { 0x0, 0x0, 0x0, 0x0, 0x8}, /* YSTORM_FLOW_CONTROL_MODE_OFFSET */
34 { 0x4cb8, 0x88, 0x0, 0x0, 0x88}, /* TSTORM_PORT_STAT_OFFSET(port_id) */
35 { 0x6530, 0x20, 0x0, 0x0, 0x20}, /* TSTORM_LL2_PORT_STAT_OFFSET(port_id) */
36 { 0xb00, 0x8, 0x0, 0x0, 0x4}, /* USTORM_VF_PF_CHANNEL_READY_OFFSET(vf_id) */
37 { 0xa80, 0x8, 0x0, 0x0, 0x4}, /* USTORM_FLR_FINAL_ACK_OFFSET(pf_id) */
38 { 0x0, 0x8, 0x0, 0x0, 0x2}, /* USTORM_EQE_CONS_OFFSET(pf_id) */
39 …{ 0x80, 0x8, 0x0, 0x0, 0x4}, /* USTORM_ETH_QUEUE_ZONE_OFFSET(queue_zone_id…
40 …{ 0x84, 0x8, 0x0, 0x0, 0x2}, /* USTORM_COMMON_QUEUE_CONS_OFFSET(queue_zone…
41 { 0x4c48, 0x0, 0x0, 0x0, 0x78}, /* XSTORM_INTEG_TEST_DATA_OFFSET */
42 { 0x3e38, 0x0, 0x0, 0x0, 0x78}, /* YSTORM_INTEG_TEST_DATA_OFFSET */
[all …]
/freebsd/sys/contrib/device-tree/src/mips/ralink/
H A Dmt7628a.dtsi10 #size-cells = <0>;
12 cpu@0 {
15 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10000000 0x200000>;
34 ranges = <0x0 0x10000000 0x1FFFFF>;
39 sysc: system-controller@0 {
41 reg = <0x0 0x60>;
46 reg = <0x60 0x8>;
48 #size-cells = <0>;
[all …]
H A Dmt7621.dtsi14 #size-cells = <0>;
16 cpu@0 {
19 reg = <0>;
30 #address-cells = <0>;
56 reg = <0x1e000000 0x100000>;
57 ranges = <0x0 0x1e000000 0x0fffff>;
62 sysc: syscon@0 {
[all...]
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Drenesas,rz-mtu3.yaml244 reg = <0x10001200 0xb00>;

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