xref: /freebsd/sys/contrib/device-tree/src/arm/ti/keystone/keystone-clocks.dtsi (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * Device Tree Source for Keystone 2 clock tree
4*f126890aSEmmanuel Vadot *
5*f126890aSEmmanuel Vadot * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
6*f126890aSEmmanuel Vadot */
7*f126890aSEmmanuel Vadot
8*f126890aSEmmanuel Vadotclocks {
9*f126890aSEmmanuel Vadot	#address-cells = <1>;
10*f126890aSEmmanuel Vadot	#size-cells = <1>;
11*f126890aSEmmanuel Vadot	ranges;
12*f126890aSEmmanuel Vadot
13*f126890aSEmmanuel Vadot	mainmuxclk: mainmuxclk@2310108 {
14*f126890aSEmmanuel Vadot		#clock-cells = <0>;
15*f126890aSEmmanuel Vadot		compatible = "ti,keystone,pll-mux-clock";
16*f126890aSEmmanuel Vadot		clocks = <&mainpllclk>, <&refclksys>;
17*f126890aSEmmanuel Vadot		reg = <0x02310108 4>;
18*f126890aSEmmanuel Vadot		bit-shift = <23>;
19*f126890aSEmmanuel Vadot		bit-mask = <1>;
20*f126890aSEmmanuel Vadot		clock-output-names = "mainmuxclk";
21*f126890aSEmmanuel Vadot	};
22*f126890aSEmmanuel Vadot
23*f126890aSEmmanuel Vadot	chipclk1: chipclk1 {
24*f126890aSEmmanuel Vadot		#clock-cells = <0>;
25*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
26*f126890aSEmmanuel Vadot		clocks = <&mainmuxclk>;
27*f126890aSEmmanuel Vadot		clock-div = <1>;
28*f126890aSEmmanuel Vadot		clock-mult = <1>;
29*f126890aSEmmanuel Vadot		clock-output-names = "chipclk1";
30*f126890aSEmmanuel Vadot	};
31*f126890aSEmmanuel Vadot
32*f126890aSEmmanuel Vadot	chipclk1rstiso: chipclk1rstiso {
33*f126890aSEmmanuel Vadot		#clock-cells = <0>;
34*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
35*f126890aSEmmanuel Vadot		clocks = <&mainmuxclk>;
36*f126890aSEmmanuel Vadot		clock-div = <1>;
37*f126890aSEmmanuel Vadot		clock-mult = <1>;
38*f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso";
39*f126890aSEmmanuel Vadot	};
40*f126890aSEmmanuel Vadot
41*f126890aSEmmanuel Vadot	gemtraceclk: gemtraceclk@2310120 {
42*f126890aSEmmanuel Vadot		#clock-cells = <0>;
43*f126890aSEmmanuel Vadot		compatible = "ti,keystone,pll-divider-clock";
44*f126890aSEmmanuel Vadot		clocks = <&mainmuxclk>;
45*f126890aSEmmanuel Vadot		reg = <0x02310120 4>;
46*f126890aSEmmanuel Vadot		bit-shift = <0>;
47*f126890aSEmmanuel Vadot		bit-mask = <8>;
48*f126890aSEmmanuel Vadot		clock-output-names = "gemtraceclk";
49*f126890aSEmmanuel Vadot	};
50*f126890aSEmmanuel Vadot
51*f126890aSEmmanuel Vadot	chipstmxptclk: chipstmxptclk@2310164 {
52*f126890aSEmmanuel Vadot		#clock-cells = <0>;
53*f126890aSEmmanuel Vadot		compatible = "ti,keystone,pll-divider-clock";
54*f126890aSEmmanuel Vadot		clocks = <&mainmuxclk>;
55*f126890aSEmmanuel Vadot		reg = <0x02310164 4>;
56*f126890aSEmmanuel Vadot		bit-shift = <0>;
57*f126890aSEmmanuel Vadot		bit-mask = <8>;
58*f126890aSEmmanuel Vadot		clock-output-names = "chipstmxptclk";
59*f126890aSEmmanuel Vadot	};
60*f126890aSEmmanuel Vadot
61*f126890aSEmmanuel Vadot	chipclk12: chipclk12 {
62*f126890aSEmmanuel Vadot		#clock-cells = <0>;
63*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
64*f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
65*f126890aSEmmanuel Vadot		clock-div = <2>;
66*f126890aSEmmanuel Vadot		clock-mult = <1>;
67*f126890aSEmmanuel Vadot		clock-output-names = "chipclk12";
68*f126890aSEmmanuel Vadot	};
69*f126890aSEmmanuel Vadot
70*f126890aSEmmanuel Vadot	chipclk13: chipclk13 {
71*f126890aSEmmanuel Vadot		#clock-cells = <0>;
72*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
73*f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
74*f126890aSEmmanuel Vadot		clock-div = <3>;
75*f126890aSEmmanuel Vadot		clock-mult = <1>;
76*f126890aSEmmanuel Vadot		clock-output-names = "chipclk13";
77*f126890aSEmmanuel Vadot	};
78*f126890aSEmmanuel Vadot
79*f126890aSEmmanuel Vadot	paclk13: paclk13 {
80*f126890aSEmmanuel Vadot		#clock-cells = <0>;
81*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
82*f126890aSEmmanuel Vadot		clocks = <&papllclk>;
83*f126890aSEmmanuel Vadot		clock-div = <3>;
84*f126890aSEmmanuel Vadot		clock-mult = <1>;
85*f126890aSEmmanuel Vadot		clock-output-names = "paclk13";
86*f126890aSEmmanuel Vadot	};
87*f126890aSEmmanuel Vadot
88*f126890aSEmmanuel Vadot	chipclk14: chipclk14 {
89*f126890aSEmmanuel Vadot		#clock-cells = <0>;
90*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
91*f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
92*f126890aSEmmanuel Vadot		clock-div = <4>;
93*f126890aSEmmanuel Vadot		clock-mult = <1>;
94*f126890aSEmmanuel Vadot		clock-output-names = "chipclk14";
95*f126890aSEmmanuel Vadot	};
96*f126890aSEmmanuel Vadot
97*f126890aSEmmanuel Vadot	chipclk16: chipclk16 {
98*f126890aSEmmanuel Vadot		#clock-cells = <0>;
99*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
100*f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
101*f126890aSEmmanuel Vadot		clock-div = <6>;
102*f126890aSEmmanuel Vadot		clock-mult = <1>;
103*f126890aSEmmanuel Vadot		clock-output-names = "chipclk16";
104*f126890aSEmmanuel Vadot	};
105*f126890aSEmmanuel Vadot
106*f126890aSEmmanuel Vadot	chipclk112: chipclk112 {
107*f126890aSEmmanuel Vadot		#clock-cells = <0>;
108*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
109*f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
110*f126890aSEmmanuel Vadot		clock-div = <12>;
111*f126890aSEmmanuel Vadot		clock-mult = <1>;
112*f126890aSEmmanuel Vadot		clock-output-names = "chipclk112";
113*f126890aSEmmanuel Vadot	};
114*f126890aSEmmanuel Vadot
115*f126890aSEmmanuel Vadot	chipclk124: chipclk124 {
116*f126890aSEmmanuel Vadot		#clock-cells = <0>;
117*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
118*f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
119*f126890aSEmmanuel Vadot		clock-div = <24>;
120*f126890aSEmmanuel Vadot		clock-mult = <1>;
121*f126890aSEmmanuel Vadot		clock-output-names = "chipclk114";
122*f126890aSEmmanuel Vadot	};
123*f126890aSEmmanuel Vadot
124*f126890aSEmmanuel Vadot	chipclk1rstiso13: chipclk1rstiso13 {
125*f126890aSEmmanuel Vadot		#clock-cells = <0>;
126*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
127*f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso>;
128*f126890aSEmmanuel Vadot		clock-div = <3>;
129*f126890aSEmmanuel Vadot		clock-mult = <1>;
130*f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso13";
131*f126890aSEmmanuel Vadot	};
132*f126890aSEmmanuel Vadot
133*f126890aSEmmanuel Vadot	chipclk1rstiso14: chipclk1rstiso14 {
134*f126890aSEmmanuel Vadot		#clock-cells = <0>;
135*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
136*f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso>;
137*f126890aSEmmanuel Vadot		clock-div = <4>;
138*f126890aSEmmanuel Vadot		clock-mult = <1>;
139*f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso14";
140*f126890aSEmmanuel Vadot	};
141*f126890aSEmmanuel Vadot
142*f126890aSEmmanuel Vadot	chipclk1rstiso16: chipclk1rstiso16 {
143*f126890aSEmmanuel Vadot		#clock-cells = <0>;
144*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
145*f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso>;
146*f126890aSEmmanuel Vadot		clock-div = <6>;
147*f126890aSEmmanuel Vadot		clock-mult = <1>;
148*f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso16";
149*f126890aSEmmanuel Vadot	};
150*f126890aSEmmanuel Vadot
151*f126890aSEmmanuel Vadot	chipclk1rstiso112: chipclk1rstiso112 {
152*f126890aSEmmanuel Vadot		#clock-cells = <0>;
153*f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
154*f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso>;
155*f126890aSEmmanuel Vadot		clock-div = <12>;
156*f126890aSEmmanuel Vadot		clock-mult = <1>;
157*f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso112";
158*f126890aSEmmanuel Vadot	};
159*f126890aSEmmanuel Vadot
160*f126890aSEmmanuel Vadot	clkmodrst0: clkmodrst0@2350000 {
161*f126890aSEmmanuel Vadot		#clock-cells = <0>;
162*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
163*f126890aSEmmanuel Vadot		clocks = <&chipclk16>;
164*f126890aSEmmanuel Vadot		clock-output-names = "modrst0";
165*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
166*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
167*f126890aSEmmanuel Vadot		domain-id = <0>;
168*f126890aSEmmanuel Vadot	};
169*f126890aSEmmanuel Vadot
170*f126890aSEmmanuel Vadot
171*f126890aSEmmanuel Vadot	clkusb: clkusb@2350008 {
172*f126890aSEmmanuel Vadot		#clock-cells = <0>;
173*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
174*f126890aSEmmanuel Vadot		clocks = <&chipclk16>;
175*f126890aSEmmanuel Vadot		clock-output-names = "usb";
176*f126890aSEmmanuel Vadot		reg = <0x02350008 0xb00>, <0x02350000 0x400>;
177*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
178*f126890aSEmmanuel Vadot		domain-id = <0>;
179*f126890aSEmmanuel Vadot	};
180*f126890aSEmmanuel Vadot
181*f126890aSEmmanuel Vadot	clkaemifspi: clkaemifspi@235000c {
182*f126890aSEmmanuel Vadot		#clock-cells = <0>;
183*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
184*f126890aSEmmanuel Vadot		clocks = <&chipclk16>;
185*f126890aSEmmanuel Vadot		clock-output-names = "aemif-spi";
186*f126890aSEmmanuel Vadot		reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
187*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
188*f126890aSEmmanuel Vadot		domain-id = <0>;
189*f126890aSEmmanuel Vadot	};
190*f126890aSEmmanuel Vadot
191*f126890aSEmmanuel Vadot
192*f126890aSEmmanuel Vadot	clkdebugsstrc: clkdebugsstrc@2350014 {
193*f126890aSEmmanuel Vadot		#clock-cells = <0>;
194*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
195*f126890aSEmmanuel Vadot		clocks = <&chipclk13>;
196*f126890aSEmmanuel Vadot		clock-output-names = "debugss-trc";
197*f126890aSEmmanuel Vadot		reg = <0x02350014 0xb00>, <0x02350000 0x400>;
198*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
199*f126890aSEmmanuel Vadot		domain-id = <1>;
200*f126890aSEmmanuel Vadot	};
201*f126890aSEmmanuel Vadot
202*f126890aSEmmanuel Vadot	clktetbtrc: clktetbtrc@2350018 {
203*f126890aSEmmanuel Vadot		#clock-cells = <0>;
204*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
205*f126890aSEmmanuel Vadot		clocks = <&chipclk13>;
206*f126890aSEmmanuel Vadot		clock-output-names = "tetb-trc";
207*f126890aSEmmanuel Vadot		reg = <0x02350018 0xb00>, <0x02350004 0x400>;
208*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
209*f126890aSEmmanuel Vadot		domain-id = <1>;
210*f126890aSEmmanuel Vadot	};
211*f126890aSEmmanuel Vadot
212*f126890aSEmmanuel Vadot	clkpa: clkpa@235001c {
213*f126890aSEmmanuel Vadot		#clock-cells = <0>;
214*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
215*f126890aSEmmanuel Vadot		clocks = <&paclk13>;
216*f126890aSEmmanuel Vadot		clock-output-names = "pa";
217*f126890aSEmmanuel Vadot		reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
218*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
219*f126890aSEmmanuel Vadot		domain-id = <2>;
220*f126890aSEmmanuel Vadot	};
221*f126890aSEmmanuel Vadot
222*f126890aSEmmanuel Vadot	clkcpgmac: clkcpgmac@2350020 {
223*f126890aSEmmanuel Vadot		#clock-cells = <0>;
224*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
225*f126890aSEmmanuel Vadot		clocks = <&clkpa>;
226*f126890aSEmmanuel Vadot		clock-output-names = "cpgmac";
227*f126890aSEmmanuel Vadot		reg = <0x02350020 0xb00>, <0x02350008 0x400>;
228*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
229*f126890aSEmmanuel Vadot		domain-id = <2>;
230*f126890aSEmmanuel Vadot	};
231*f126890aSEmmanuel Vadot
232*f126890aSEmmanuel Vadot	clksa: clksa@2350024 {
233*f126890aSEmmanuel Vadot		#clock-cells = <0>;
234*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
235*f126890aSEmmanuel Vadot		clocks = <&clkpa>;
236*f126890aSEmmanuel Vadot		clock-output-names = "sa";
237*f126890aSEmmanuel Vadot		reg = <0x02350024 0xb00>, <0x02350008 0x400>;
238*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
239*f126890aSEmmanuel Vadot		domain-id = <2>;
240*f126890aSEmmanuel Vadot	};
241*f126890aSEmmanuel Vadot
242*f126890aSEmmanuel Vadot	clkpcie: clkpcie@2350028 {
243*f126890aSEmmanuel Vadot		#clock-cells = <0>;
244*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
245*f126890aSEmmanuel Vadot		clocks = <&chipclk12>;
246*f126890aSEmmanuel Vadot		clock-output-names = "pcie";
247*f126890aSEmmanuel Vadot		reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
248*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
249*f126890aSEmmanuel Vadot		domain-id = <3>;
250*f126890aSEmmanuel Vadot	};
251*f126890aSEmmanuel Vadot
252*f126890aSEmmanuel Vadot	clksr: clksr@2350034 {
253*f126890aSEmmanuel Vadot		#clock-cells = <0>;
254*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
255*f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso112>;
256*f126890aSEmmanuel Vadot		clock-output-names = "sr";
257*f126890aSEmmanuel Vadot		reg = <0x02350034 0xb00>, <0x02350018 0x400>;
258*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
259*f126890aSEmmanuel Vadot		domain-id = <6>;
260*f126890aSEmmanuel Vadot	};
261*f126890aSEmmanuel Vadot
262*f126890aSEmmanuel Vadot	clkgem0: clkgem0@235003c {
263*f126890aSEmmanuel Vadot		#clock-cells = <0>;
264*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
265*f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
266*f126890aSEmmanuel Vadot		clock-output-names = "gem0";
267*f126890aSEmmanuel Vadot		reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
268*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
269*f126890aSEmmanuel Vadot		domain-id = <8>;
270*f126890aSEmmanuel Vadot	};
271*f126890aSEmmanuel Vadot
272*f126890aSEmmanuel Vadot	clkddr30: clkddr30@235005c {
273*f126890aSEmmanuel Vadot		#clock-cells = <0>;
274*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
275*f126890aSEmmanuel Vadot		clocks = <&chipclk12>;
276*f126890aSEmmanuel Vadot		clock-output-names = "ddr3-0";
277*f126890aSEmmanuel Vadot		reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
278*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
279*f126890aSEmmanuel Vadot		domain-id = <16>;
280*f126890aSEmmanuel Vadot	};
281*f126890aSEmmanuel Vadot
282*f126890aSEmmanuel Vadot	clkwdtimer0: clkwdtimer0@2350000 {
283*f126890aSEmmanuel Vadot		#clock-cells = <0>;
284*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
285*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
286*f126890aSEmmanuel Vadot		clock-output-names = "timer0";
287*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
288*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
289*f126890aSEmmanuel Vadot		domain-id = <0>;
290*f126890aSEmmanuel Vadot	};
291*f126890aSEmmanuel Vadot
292*f126890aSEmmanuel Vadot	clkwdtimer1: clkwdtimer1@2350000 {
293*f126890aSEmmanuel Vadot		#clock-cells = <0>;
294*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
295*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
296*f126890aSEmmanuel Vadot		clock-output-names = "timer1";
297*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
298*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
299*f126890aSEmmanuel Vadot		domain-id = <0>;
300*f126890aSEmmanuel Vadot	};
301*f126890aSEmmanuel Vadot
302*f126890aSEmmanuel Vadot	clkwdtimer2: clkwdtimer2@2350000 {
303*f126890aSEmmanuel Vadot		#clock-cells = <0>;
304*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
305*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
306*f126890aSEmmanuel Vadot		clock-output-names = "timer2";
307*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
308*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
309*f126890aSEmmanuel Vadot		domain-id = <0>;
310*f126890aSEmmanuel Vadot	};
311*f126890aSEmmanuel Vadot
312*f126890aSEmmanuel Vadot	clkwdtimer3: clkwdtimer3@2350000 {
313*f126890aSEmmanuel Vadot		#clock-cells = <0>;
314*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
315*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
316*f126890aSEmmanuel Vadot		clock-output-names = "timer3";
317*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
318*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
319*f126890aSEmmanuel Vadot		domain-id = <0>;
320*f126890aSEmmanuel Vadot	};
321*f126890aSEmmanuel Vadot
322*f126890aSEmmanuel Vadot	clktimer15: clktimer15@2350000 {
323*f126890aSEmmanuel Vadot		#clock-cells = <0>;
324*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
325*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
326*f126890aSEmmanuel Vadot		clock-output-names = "timer15";
327*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
328*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
329*f126890aSEmmanuel Vadot		domain-id = <0>;
330*f126890aSEmmanuel Vadot	};
331*f126890aSEmmanuel Vadot
332*f126890aSEmmanuel Vadot	clkuart0: clkuart0@2350000 {
333*f126890aSEmmanuel Vadot		#clock-cells = <0>;
334*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
335*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
336*f126890aSEmmanuel Vadot		clock-output-names = "uart0";
337*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
338*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
339*f126890aSEmmanuel Vadot		domain-id = <0>;
340*f126890aSEmmanuel Vadot	};
341*f126890aSEmmanuel Vadot
342*f126890aSEmmanuel Vadot	clkuart1: clkuart1@2350000 {
343*f126890aSEmmanuel Vadot		#clock-cells = <0>;
344*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
345*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
346*f126890aSEmmanuel Vadot		clock-output-names = "uart1";
347*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
348*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
349*f126890aSEmmanuel Vadot		domain-id = <0>;
350*f126890aSEmmanuel Vadot	};
351*f126890aSEmmanuel Vadot
352*f126890aSEmmanuel Vadot	clkaemif: clkaemif@2350000 {
353*f126890aSEmmanuel Vadot		#clock-cells = <0>;
354*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
355*f126890aSEmmanuel Vadot		clocks = <&clkaemifspi>;
356*f126890aSEmmanuel Vadot		clock-output-names = "aemif";
357*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
358*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
359*f126890aSEmmanuel Vadot		domain-id = <0>;
360*f126890aSEmmanuel Vadot	};
361*f126890aSEmmanuel Vadot
362*f126890aSEmmanuel Vadot	clkusim: clkusim@2350000 {
363*f126890aSEmmanuel Vadot		#clock-cells = <0>;
364*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
365*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
366*f126890aSEmmanuel Vadot		clock-output-names = "usim";
367*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
368*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
369*f126890aSEmmanuel Vadot		domain-id = <0>;
370*f126890aSEmmanuel Vadot	};
371*f126890aSEmmanuel Vadot
372*f126890aSEmmanuel Vadot	clki2c: clki2c@2350000 {
373*f126890aSEmmanuel Vadot		#clock-cells = <0>;
374*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
375*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
376*f126890aSEmmanuel Vadot		clock-output-names = "i2c";
377*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
378*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
379*f126890aSEmmanuel Vadot		domain-id = <0>;
380*f126890aSEmmanuel Vadot	};
381*f126890aSEmmanuel Vadot
382*f126890aSEmmanuel Vadot	clkspi: clkspi@2350000 {
383*f126890aSEmmanuel Vadot		#clock-cells = <0>;
384*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
385*f126890aSEmmanuel Vadot		clocks = <&clkaemifspi>;
386*f126890aSEmmanuel Vadot		clock-output-names = "spi";
387*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
388*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
389*f126890aSEmmanuel Vadot		domain-id = <0>;
390*f126890aSEmmanuel Vadot	};
391*f126890aSEmmanuel Vadot
392*f126890aSEmmanuel Vadot	clkgpio: clkgpio@2350000 {
393*f126890aSEmmanuel Vadot		#clock-cells = <0>;
394*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
395*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
396*f126890aSEmmanuel Vadot		clock-output-names = "gpio";
397*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
398*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
399*f126890aSEmmanuel Vadot		domain-id = <0>;
400*f126890aSEmmanuel Vadot	};
401*f126890aSEmmanuel Vadot
402*f126890aSEmmanuel Vadot	clkkeymgr: clkkeymgr@2350000 {
403*f126890aSEmmanuel Vadot		#clock-cells = <0>;
404*f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
405*f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
406*f126890aSEmmanuel Vadot		clock-output-names = "keymgr";
407*f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
408*f126890aSEmmanuel Vadot		reg-names = "control", "domain";
409*f126890aSEmmanuel Vadot		domain-id = <0>;
410*f126890aSEmmanuel Vadot	};
411*f126890aSEmmanuel Vadot
412*f126890aSEmmanuel Vadot	/*
413*f126890aSEmmanuel Vadot	 * Below are set of fixed, input clocks definitions,
414*f126890aSEmmanuel Vadot	 * for which real frequencies have to be defined in board files.
415*f126890aSEmmanuel Vadot	 * Those clocks can be used as reference clocks for some HW modules
416*f126890aSEmmanuel Vadot	 * (as cpts, for example) by configuring corresponding clock muxes.
417*f126890aSEmmanuel Vadot	 */
418*f126890aSEmmanuel Vadot	timi0: timi0 {
419*f126890aSEmmanuel Vadot		#clock-cells = <0>;
420*f126890aSEmmanuel Vadot		compatible = "fixed-clock";
421*f126890aSEmmanuel Vadot		clock-frequency = <0>;
422*f126890aSEmmanuel Vadot		clock-output-names = "timi0";
423*f126890aSEmmanuel Vadot	};
424*f126890aSEmmanuel Vadot
425*f126890aSEmmanuel Vadot	timi1: timi1 {
426*f126890aSEmmanuel Vadot		#clock-cells = <0>;
427*f126890aSEmmanuel Vadot		compatible = "fixed-clock";
428*f126890aSEmmanuel Vadot		clock-frequency = <0>;
429*f126890aSEmmanuel Vadot		clock-output-names = "timi1";
430*f126890aSEmmanuel Vadot	};
431*f126890aSEmmanuel Vadot
432*f126890aSEmmanuel Vadot	tsrefclk: tsrefclk {
433*f126890aSEmmanuel Vadot		#clock-cells = <0>;
434*f126890aSEmmanuel Vadot		compatible = "fixed-clock";
435*f126890aSEmmanuel Vadot		clock-frequency = <0>;
436*f126890aSEmmanuel Vadot		clock-output-names = "tsrefclk";
437*f126890aSEmmanuel Vadot	};
438*f126890aSEmmanuel Vadot};
439