1*c66ec88fSEmmanuel Vadot* Power Management Controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotProperties: 4*c66ec88fSEmmanuel Vadot- compatible: "fsl,<chip>-pmc". 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel Vadot "fsl,mpc8349-pmc" should be listed for any chip whose PMC is 7*c66ec88fSEmmanuel Vadot compatible. "fsl,mpc8313-pmc" should also be listed for any chip 8*c66ec88fSEmmanuel Vadot whose PMC is compatible, and implies deep-sleep capability. 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel Vadot "fsl,mpc8548-pmc" should be listed for any chip whose PMC is 11*c66ec88fSEmmanuel Vadot compatible. "fsl,mpc8536-pmc" should also be listed for any chip 12*c66ec88fSEmmanuel Vadot whose PMC is compatible, and implies deep-sleep capability. 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is 15*c66ec88fSEmmanuel Vadot compatible; all statements below that apply to "fsl,mpc8548-pmc" also 16*c66ec88fSEmmanuel Vadot apply to "fsl,mpc8641d-pmc". 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel Vadot Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these 19*c66ec88fSEmmanuel Vadot bit assignments are indicated via the sleep specifier in each device's 20*c66ec88fSEmmanuel Vadot sleep property. 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadot- reg: For devices compatible with "fsl,mpc8349-pmc", the first resource 23*c66ec88fSEmmanuel Vadot is the PMC block, and the second resource is the Clock Configuration 24*c66ec88fSEmmanuel Vadot block. 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadot For devices compatible with "fsl,mpc8548-pmc", the first resource 27*c66ec88fSEmmanuel Vadot is a 32-byte block beginning with DEVDISR. 28*c66ec88fSEmmanuel Vadot 29*c66ec88fSEmmanuel Vadot- interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first 30*c66ec88fSEmmanuel Vadot resource is the PMC block interrupt. 31*c66ec88fSEmmanuel Vadot 32*c66ec88fSEmmanuel Vadot- fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices, 33*c66ec88fSEmmanuel Vadot this is a phandle to an "fsl,gtm" node on which timer 4 can be used as 34*c66ec88fSEmmanuel Vadot a wakeup source from deep sleep. 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel VadotSleep specifiers: 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel Vadot fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit 39*c66ec88fSEmmanuel Vadot that is set in the cell, the corresponding bit in SCCR will be saved 40*c66ec88fSEmmanuel Vadot and cleared on suspend, and restored on resume. This sleep controller 41*c66ec88fSEmmanuel Vadot supports disabling and resuming devices at any time. 42*c66ec88fSEmmanuel Vadot 43*c66ec88fSEmmanuel Vadot fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of 44*c66ec88fSEmmanuel Vadot which will be ORed into PMCDR upon suspend, and cleared from PMCDR 45*c66ec88fSEmmanuel Vadot upon resume. The first two cells are as described for fsl,mpc8578-pmc. 46*c66ec88fSEmmanuel Vadot This sleep controller only supports disabling devices during system 47*c66ec88fSEmmanuel Vadot sleep, or permanently. 48*c66ec88fSEmmanuel Vadot 49*c66ec88fSEmmanuel Vadot fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the 50*c66ec88fSEmmanuel Vadot first of which will be ORed into DEVDISR (and the second into 51*c66ec88fSEmmanuel Vadot DEVDISR2, if present -- this cell should be zero or absent if the 52*c66ec88fSEmmanuel Vadot hardware does not have DEVDISR2) upon a request for permanent device 53*c66ec88fSEmmanuel Vadot disabling. This sleep controller does not support configuring devices 54*c66ec88fSEmmanuel Vadot to disable during system sleep (unless supported by another compatible 55*c66ec88fSEmmanuel Vadot match), or dynamically. 56*c66ec88fSEmmanuel Vadot 57*c66ec88fSEmmanuel VadotExample: 58*c66ec88fSEmmanuel Vadot 59*c66ec88fSEmmanuel Vadot power@b00 { 60*c66ec88fSEmmanuel Vadot compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; 61*c66ec88fSEmmanuel Vadot reg = <0xb00 0x100 0xa00 0x100>; 62*c66ec88fSEmmanuel Vadot interrupts = <80 8>; 63*c66ec88fSEmmanuel Vadot }; 64