Searched +full:0 +full:x41800000 (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | xlnx,intc.yaml | 51 (1 = edge, 0 = level). The interrupt type typically comes in thru 77 reg = <0x41800000 0x10000>; 80 xlnx,kind-of-intr = <0x1>;
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| /linux/arch/mips/include/asm/ |
| H A D | mipsmtregs.h | 19 #define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1) 20 #define write_c0_mvpcontrol(val) __write_32bit_c0_register($0, 1, val) 22 #define read_c0_mvpconf0() __read_32bit_c0_register($0, 2) 23 #define read_c0_mvpconf1() __read_32bit_c0_register($0, 3) 49 #define CP0_MVPCONTROL $0, 1 50 #define CP0_MVPCONF0 $0, 2 51 #define CP0_MVPCONF1 $0, 3 84 #define MVPCONF0_PTC_SHIFT 0 85 #define MVPCONF0_PTC ( _ULCAST_(0xff)) 87 #define MVPCONF0_PVPE ( _ULCAST_(0xf) << MVPCONF0_PVPE_SHIFT) [all …]
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| H A D | asmmacro.h | 32 .hword ((\enc) & 0xffff) 218 .macro DMT reg=0 219 insn_if_mips 0x41600bc1 | (\reg << 16) 220 insn32_if_mm 0x0000057C | (\reg << 21) 223 .macro EMT reg=0 224 insn_if_mips 0x41600be1 | (\reg << 16) 225 insn32_if_mm 0x0000257C | (\reg << 21) 228 .macro DVPE reg=0 229 insn_if_mips 0x41600001 | (\reg << 16) 230 insn32_if_mm 0x0000157C | (\reg << 21) [all …]
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