xref: /linux/Documentation/devicetree/bindings/interrupt-controller/xlnx,intc.yaml (revision 69f2970aad93758bea863432e49b564e0ba649ca) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/xlnx,intc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Xilinx Interrupt Controller
8
9maintainers:
10  - Michal Simek <michal.simek@amd.com>
11
12description:
13  The controller is a soft IP core that is configured at build time for the
14  number of interrupts and the type of each interrupt. These details cannot
15  be changed at run time.
16
17properties:
18  compatible:
19    const: xlnx,xps-intc-1.00.a
20
21  reg:
22    maxItems: 1
23
24  clocks:
25    maxItems: 1
26
27  power-domains:
28    maxItems: 1
29
30  resets:
31    maxItems: 1
32
33  "#interrupt-cells":
34    const: 2
35    description:
36      Specifies the number of cells needed to encode an interrupt source.
37      The value shall be a minimum of 1. The Xilinx device trees typically
38      use 2 but the 2nd value is not used.
39
40  interrupt-controller: true
41
42  interrupts:
43    maxItems: 1
44    description:
45      Specifies the interrupt of the parent controller from which it is chained.
46
47  xlnx,kind-of-intr:
48    $ref: /schemas/types.yaml#/definitions/uint32
49    description:
50      A 32 bit value specifying the interrupt type for each possible interrupt
51      (1 = edge, 0 = level). The interrupt type typically comes in thru
52      the device tree node of the interrupt generating device, but in this case
53      the interrupt type is determined by the interrupt controller based on how
54      it was implemented.
55
56  xlnx,num-intr-inputs:
57    $ref: /schemas/types.yaml#/definitions/uint32
58    minimum: 1
59    maximum: 32
60    description:
61      Specifies the number of interrupts supported by the specific
62      implementation of the controller.
63
64required:
65  - reg
66  - "#interrupt-cells"
67  - interrupt-controller
68  - xlnx,kind-of-intr
69  - xlnx,num-intr-inputs
70
71additionalProperties: false
72
73examples:
74  - |
75    interrupt-controller@41800000 {
76      compatible = "xlnx,xps-intc-1.00.a";
77      reg = <0x41800000 0x10000>;
78      #interrupt-cells = <2>;
79      interrupt-controller;
80      xlnx,kind-of-intr = <0x1>;
81      xlnx,num-intr-inputs = <1>;
82    };
83