Lines Matching +full:0 +full:x41800000
32 .hword ((\enc) & 0xffff)
218 .macro DMT reg=0
219 insn_if_mips 0x41600bc1 | (\reg << 16)
220 insn32_if_mm 0x0000057C | (\reg << 21)
223 .macro EMT reg=0
224 insn_if_mips 0x41600be1 | (\reg << 16)
225 insn32_if_mm 0x0000257C | (\reg << 21)
228 .macro DVPE reg=0
229 insn_if_mips 0x41600001 | (\reg << 16)
230 insn32_if_mm 0x0000157C | (\reg << 21)
233 .macro EVPE reg=0
234 insn_if_mips 0x41600021 | (\reg << 16)
235 insn32_if_mm 0x0000357C | (\reg << 21)
238 .macro MFTR rs=0, rt=0, u=0, sel=0
239 insn_if_mips 0x41000000 | (\rt << 16) | (\rs << 11) | (\u << 5) | (\sel)
240 insn32_if_mm 0x0000000E | (\rt << 21) | (\rs << 16) | (\u << 10) | (\sel << 4)
243 .macro MTTR rt=0, rs=0, u=0, sel=0
244 insn_if_mips 0x41800000 | (\rt << 16) | (\rs << 11) | (\u << 5) | (\sel)
245 insn32_if_mm 0x00000006 | (\rt << 21) | (\rs << 16) | (\u << 10) | (\sel << 4)
383 insn_if_mips 0x787e0059 | (\cs << 11)
384 insn32_if_mm 0x587e0056 | (\cs << 11)
394 insn_if_mips 0x783e0819 | (\cd << 6)
395 insn32_if_mm 0x583e0816 | (\cd << 6)
404 insn_if_mips 0x78000820 | (\wd << 6)
405 insn32_if_mm 0x58000807 | (\wd << 6)
414 insn_if_mips 0x78000821 | (\wd << 6)
415 insn32_if_mm 0x58000817 | (\wd << 6)
424 insn_if_mips 0x78000822 | (\wd << 6)
425 insn32_if_mm 0x58000827 | (\wd << 6)
434 insn_if_mips 0x78000823 | (\wd << 6)
435 insn32_if_mm 0x58000837 | (\wd << 6)
444 insn_if_mips 0x78000824 | (\wd << 6)
445 insn32_if_mm 0x5800080f | (\wd << 6)
454 insn_if_mips 0x78000825 | (\wd << 6)
455 insn32_if_mm 0x5800081f | (\wd << 6)
464 insn_if_mips 0x78000826 | (\wd << 6)
465 insn32_if_mm 0x5800082f | (\wd << 6)
474 insn_if_mips 0x78000827 | (\wd << 6)
475 insn32_if_mm 0x5800083f | (\wd << 6)
483 insn_if_mips 0x78b00059 | (\n << 16) | (\ws << 11)
484 insn32_if_mm 0x58b00056 | (\n << 16) | (\ws << 11)
492 insn_if_mips 0x78b80059 | (\n << 16) | (\ws << 11)
493 insn32_if_mm 0x58b80056 | (\n << 16) | (\ws << 11)
501 insn_if_mips 0x79300819 | (\n << 16) | (\wd << 6)
502 insn32_if_mm 0x59300816 | (\n << 16) | (\wd << 6)
510 insn_if_mips 0x79380819 | (\n << 16) | (\wd << 6)
511 insn32_if_mm 0x59380816 | (\n << 16) | (\wd << 6)
520 #define FPR_BASE_OFFS 0
530 st_d 0, THREAD_FPR0 - FPR_BASE_OFFS, FPR_BASE
577 ld_d 0, THREAD_FPR0 - FPR_BASE_OFFS, FPR_BASE
629 msa_init_upper 0