Lines Matching +full:0 +full:x41800000
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
107 #define VNODE_START_NID 0x80
117 #define EFFECT_START_NID 0x90
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
804 { .stream_id = 0x14,
805 .count = 0x04,
806 .offset = { 0x00, 0x04, 0x08, 0x0c },
807 .value = { 0x0001f8c0, 0x0001f9c1, 0x0001fac6, 0x0001fbc7 },
809 { .stream_id = 0x0c,
810 .count = 0x0c,
811 .offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c,
812 0x20, 0x24, 0x28, 0x2c },
813 .value = { 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3,
814 0x0001e2c4, 0x0001e3c5, 0x0001e8c6, 0x0001e9c7,
815 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb },
817 { .stream_id = 0x0c,
818 .count = 0x08,
819 .offset = { 0x08, 0x0c, 0x10, 0x14, 0x20, 0x24, 0x28, 0x2c },
820 .value = { 0x000140c2, 0x000141c3, 0x000150c4, 0x000151c5,
821 0x000142c8, 0x000143c9, 0x000152ca, 0x000153cb },
827 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
828 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
830 VENDOR_DSPIO_STATUS = 0xF01,
831 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
832 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
833 VENDOR_DSPIO_DSP_INIT = 0x703,
834 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
835 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
838 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
839 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
840 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
841 VENDOR_CHIPIO_DATA_LOW = 0x300,
842 VENDOR_CHIPIO_DATA_HIGH = 0x400,
844 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
845 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
847 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
848 VENDOR_CHIPIO_STATUS = 0xF01,
849 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
850 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
852 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
853 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
854 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
855 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
856 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
858 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
859 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
861 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
862 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
863 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
864 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
865 VENDOR_CHIPIO_FLAG_SET = 0x70F,
866 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
867 VENDOR_CHIPIO_PARAM_SET = 0x710,
868 VENDOR_CHIPIO_PARAM_GET = 0xF10,
870 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
871 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
872 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
873 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
875 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
876 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
877 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
878 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
880 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
881 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
882 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
883 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
884 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
885 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
887 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
895 CONTROL_FLAG_C_MGR = 0,
952 /* 0: None, 1: Mic1In*/
954 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
1000 VENDOR_STATUS_DSPIO_OK = 0x00,
1002 VENDOR_STATUS_DSPIO_BUSY = 0x01,
1004 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
1006 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
1014 VENDOR_STATUS_CHIPIO_OK = 0x00,
1016 VENDOR_STATUS_CHIPIO_BUSY = 0x01
1023 SR_6_000 = 0x00,
1024 SR_8_000 = 0x01,
1025 SR_9_600 = 0x02,
1026 SR_11_025 = 0x03,
1027 SR_16_000 = 0x04,
1028 SR_22_050 = 0x05,
1029 SR_24_000 = 0x06,
1030 SR_32_000 = 0x07,
1031 SR_44_100 = 0x08,
1032 SR_48_000 = 0x09,
1033 SR_88_200 = 0x0A,
1034 SR_96_000 = 0x0B,
1035 SR_144_000 = 0x0C,
1036 SR_176_400 = 0x0D,
1037 SR_192_000 = 0x0E,
1038 SR_384_000 = 0x0F,
1040 SR_COUNT = 0x10,
1042 SR_RATE_UNKNOWN = 0x1F
1047 DSP_DOWNLOAD_INIT = 0,
1053 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1054 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1055 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1056 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1193 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1194 { 0x0c, 0x411111f0 }, /* N/A */
1195 { 0x0d, 0x411111f0 }, /* N/A */
1196 { 0x0e, 0x411111f0 }, /* N/A */
1197 { 0x0f, 0x0321101f }, /* HP */
1198 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1199 { 0x11, 0x03a11021 }, /* Mic */
1200 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1201 { 0x13, 0x411111f0 }, /* N/A */
1202 { 0x18, 0x411111f0 }, /* N/A */
1208 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1209 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1210 { 0x0d, 0x014510f0 }, /* Digital Out */
1211 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1212 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1213 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1214 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1215 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1216 { 0x13, 0x908700f0 }, /* What U Hear In*/
1217 { 0x18, 0x50d000f0 }, /* N/A */
1223 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1224 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1225 { 0x0d, 0x014510f0 }, /* Digital Out */
1226 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1227 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1228 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1229 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1230 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1231 { 0x13, 0x908700f0 }, /* What U Hear In*/
1232 { 0x18, 0x50d000f0 }, /* N/A */
1238 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1239 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1240 { 0x0d, 0x014510f0 }, /* Digital Out */
1241 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1242 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1243 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1244 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1245 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1246 { 0x13, 0x908700f0 }, /* What U Hear In*/
1247 { 0x18, 0x50d000f0 }, /* N/A */
1253 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1254 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1255 { 0x0d, 0x014510f0 }, /* Digital Out */
1256 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1257 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1258 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1259 { 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1260 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1261 { 0x13, 0x908700f0 }, /* What U Hear In*/
1262 { 0x18, 0x50d000f0 }, /* N/A */
1268 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1269 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1270 { 0x0d, 0x014510f0 }, /* Digital Out */
1271 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1272 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1273 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1274 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1275 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1276 { 0x13, 0x908700f0 }, /* What U Hear In*/
1277 { 0x18, 0x500000f0 }, /* N/A */
1282 { 0x0b, 0x01017010 },
1283 { 0x0c, 0x014510f0 },
1284 { 0x0d, 0x414510f0 },
1285 { 0x0e, 0x01c520f0 },
1286 { 0x0f, 0x01017114 },
1287 { 0x10, 0x01017011 },
1288 { 0x11, 0x018170ff },
1289 { 0x12, 0x01a170f0 },
1290 { 0x13, 0x908700f0 },
1291 { 0x18, 0x500000f0 },
1296 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1297 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1298 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1299 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1300 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1301 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1302 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1303 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1304 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1305 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1306 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1307 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1308 SND_PCI_QUIRK(0x3842, 0x104b, "EVGA X299 Dark", QUIRK_R3DI),
1309 SND_PCI_QUIRK(0x3842, 0x1055, "EVGA Z390 DARK", QUIRK_R3DI),
1310 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1311 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1312 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1313 SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1314 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1335 unsigned int dac2port; /* ParamID 0x0d value. */
1370 { .dac2port = 0x24,
1374 .mmio_gpio_count = 0,
1375 .scp_cmds_count = 0,
1379 { .dac2port = 0x21,
1382 .hda_gpio_set = 0,
1383 .mmio_gpio_count = 0,
1384 .scp_cmds_count = 0,
1393 { .dac2port = 0x24,
1398 .scp_cmds_count = 0,
1402 { .dac2port = 0x21,
1406 .mmio_gpio_set = { 0 },
1407 .scp_cmds_count = 0,
1416 { .dac2port = 0x18,
1420 .mmio_gpio_set = { 0, 1, 1 },
1421 .scp_cmds_count = 0,
1424 { .dac2port = 0x12,
1428 .mmio_gpio_set = { 1, 1, 0 },
1429 .scp_cmds_count = 0,
1438 { .dac2port = 0x24,
1442 .mmio_gpio_set = { 1, 1, 0 },
1443 .scp_cmds_count = 0,
1447 { .dac2port = 0x21,
1451 .mmio_gpio_set = { 0, 1, 1 },
1452 .scp_cmds_count = 0,
1461 { .dac2port = 0xa4,
1463 .mmio_gpio_count = 0,
1465 .scp_cmd_mid = { 0x96, 0x96 },
1470 .chipio_write_addr = 0x0018b03c,
1471 .chipio_write_data = 0x00000012
1474 { .dac2port = 0xa1,
1476 .mmio_gpio_count = 0,
1478 .scp_cmd_mid = { 0x96, 0x96 },
1483 .chipio_write_addr = 0x0018b03c,
1484 .chipio_write_data = 0x00000012
1492 { .dac2port = 0x58,
1495 .mmio_gpio_pin = { 0 },
1498 .scp_cmd_mid = { 0x96, 0x96 },
1503 .chipio_write_addr = 0x0018b03c,
1504 .chipio_write_data = 0x00000000
1507 { .dac2port = 0x58,
1510 .mmio_gpio_pin = { 0 },
1513 .scp_cmd_mid = { 0x96, 0x96 },
1518 .chipio_write_addr = 0x0018b03c,
1519 .chipio_write_data = 0x00000010
1531 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1534 return ((response == -1) ? -1 : 0); in codec_send_command()
1541 converter_format & 0xffff, res); in codec_set_converter_format()
1548 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1550 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1565 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1568 return 0; in chipio_send()
1585 return 0; in chipio_write_address()
1589 chip_addx & 0xffff); in chipio_write_address()
1597 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1611 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1622 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1633 int status = 0; in chipio_write_data_multiple()
1640 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1656 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1660 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1665 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1667 0); in chipio_read_data()
1673 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1691 if (err < 0) in chipio_write()
1695 if (err < 0) in chipio_write()
1715 if (err < 0) in chipio_write_no_mutex()
1719 if (err < 0) in chipio_write_no_mutex()
1740 if (status < 0) in chipio_write_multiple()
1764 if (err < 0) in chipio_read()
1768 if (err < 0) in chipio_read()
1786 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1788 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1803 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1807 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1808 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1811 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1829 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1832 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1833 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1836 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1889 *enable = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_get_stream_control()
1920 * 0x80-0xFF.
1928 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1933 * Data at addresses 0x2000-0x7fff is mirrored to 0x8000-0xdfff.
1934 * Data at 0x8000-0xdfff can also be used as program memory for the 8051 by
1936 * 0xe000-0xffff is always mapped as program memory, with only 0xf000-0xffff
1944 tmp = addr & 0xff; in chipio_8051_set_address()
1945 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_address()
1949 tmp = (addr >> 8) & 0xff; in chipio_8051_set_address()
1950 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_address()
1957 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_data()
1958 VENDOR_CHIPIO_8051_DATA_WRITE, data & 0xff); in chipio_8051_set_data()
1963 return snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_get_data()
1964 VENDOR_CHIPIO_8051_DATA_READ, 0); in chipio_8051_get_data()
1971 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_data_pll()
1972 VENDOR_CHIPIO_PLL_PMU_WRITE, data & 0xff); in chipio_8051_set_data_pll()
2010 chipio_8051_set_address(codec, addr & 0xff); in chipio_8051_write_pll_pmu()
2019 chipio_8051_set_address(codec, addr & 0xff); in chipio_8051_write_pll_pmu_no_mutex()
2032 chipio_8051_write_pll_pmu_no_mutex(codec, 0x00, 0xff); in chipio_enable_clocks()
2033 chipio_8051_write_pll_pmu_no_mutex(codec, 0x05, 0x0b); in chipio_enable_clocks()
2034 chipio_8051_write_pll_pmu_no_mutex(codec, 0x06, 0xff); in chipio_enable_clocks()
2050 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
2051 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
2068 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
2069 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
2089 scp_data & 0xffff); in dspio_write()
2090 if (status < 0) in dspio_write()
2095 if (status < 0) in dspio_write()
2099 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
2100 VENDOR_DSPIO_STATUS, 0); in dspio_write()
2105 -EIO : 0; in dspio_write()
2114 int status = 0; in dspio_write_multiple()
2120 count = 0; in dspio_write_multiple()
2123 if (status != 0) in dspio_write_multiple()
2135 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
2139 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
2144 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
2145 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2147 return 0; in dspio_read()
2153 int status = 0; in dspio_read_multiple()
2162 count = 0; in dspio_read_multiple()
2165 if (status != 0) in dspio_read_multiple()
2171 if (status == 0) { in dspio_read_multiple()
2174 if (status != 0) in dspio_read_multiple()
2193 unsigned int header = 0; in make_scp_header()
2195 header = (data_size & 0x1f) << 27; in make_scp_header()
2196 header |= (error_flag & 0x01) << 26; in make_scp_header()
2197 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2198 header |= (device_flag & 0x01) << 24; in make_scp_header()
2199 header |= (req & 0x7f) << 17; in make_scp_header()
2200 header |= (get_flag & 0x01) << 16; in make_scp_header()
2201 header |= (source_id & 0xff) << 8; in make_scp_header()
2202 header |= target_id & 0xff; in make_scp_header()
2218 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2220 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2222 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2224 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2226 *req = (header >> 17) & 0x7f; in extract_scp_header()
2228 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2230 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2232 *target_id = header & 0xff; in extract_scp_header()
2246 unsigned int dummy = 0; in dspio_clear_response_queue()
2252 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2258 unsigned int data = 0; in dspio_get_response_data()
2261 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2264 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2270 return 0; in dspio_get_response_data()
2288 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2297 *bytes_returned = 0; in dspio_send_scp_message()
2318 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2327 if (status < 0) { in dspio_send_scp_message()
2328 spec->wait_scp = 0; in dspio_send_scp_message()
2334 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2345 status = 0; in dspio_send_scp_message()
2349 spec->wait_scp = 0; in dspio_send_scp_message()
2373 int status = 0; in dspio_scp()
2379 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2380 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2382 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2390 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2396 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2397 if (data != NULL && len > 0) { in dspio_scp()
2402 ret_bytes = 0; in dspio_scp()
2408 if (status < 0) { in dspio_scp()
2421 return 0; in dspio_scp()
2461 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2470 int status = 0; in dspio_alloc_dma_chan()
2474 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2475 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2478 if (status < 0) { in dspio_alloc_dma_chan()
2483 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2499 int status = 0; in dspio_free_dma_chan()
2500 unsigned int dummy = 0; in dspio_free_dma_chan()
2505 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2509 if (status < 0) { in dspio_free_dma_chan()
2529 if (err < 0) in dsp_set_run_state()
2535 if (halt_state != 0) { in dsp_set_run_state()
2540 if (err < 0) in dsp_set_run_state()
2547 if (err < 0) in dsp_set_run_state()
2551 return 0; in dsp_set_run_state()
2564 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2573 return 0; in dsp_reset()
2607 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2616 int status = 0; in dsp_dma_setup_common()
2642 active = 0; in dsp_dma_setup_common()
2650 if (status < 0) { in dsp_dma_setup_common()
2665 if (status < 0) { in dsp_dma_setup_common()
2675 if (status < 0) { in dsp_dma_setup_common()
2686 if (status < 0) { in dsp_dma_setup_common()
2695 if (status < 0) { in dsp_dma_setup_common()
2703 if (status < 0) { in dsp_dma_setup_common()
2710 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2711 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2717 return 0; in dsp_dma_setup_common()
2728 int status = 0; in dsp_dma_setup()
2735 unsigned int dma_cfg = 0; in dsp_dma_setup()
2736 unsigned int adr_ofs = 0; in dsp_dma_setup()
2737 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2757 incr_field = 0; in dsp_dma_setup()
2770 if (status < 0) { in dsp_dma_setup()
2777 (code ? 0 : 1)); in dsp_dma_setup()
2781 if (status < 0) { in dsp_dma_setup()
2795 if (status < 0) { in dsp_dma_setup()
2802 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2803 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2808 return 0; in dsp_dma_setup()
2817 unsigned int reg = 0; in dsp_dma_start()
2818 int status = 0; in dsp_dma_start()
2826 if (status < 0) { in dsp_dma_start()
2838 if (status < 0) { in dsp_dma_start()
2853 unsigned int reg = 0; in dsp_dma_stop()
2854 int status = 0; in dsp_dma_stop()
2862 if (status < 0) { in dsp_dma_stop()
2873 if (status < 0) { in dsp_dma_stop()
2899 int status = 0; in dsp_allocate_router_ports()
2903 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2904 if (status < 0) in dsp_allocate_router_ports()
2911 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2915 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2919 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2920 if (status < 0) in dsp_allocate_router_ports()
2923 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2924 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2928 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2936 int status = 0; in dsp_free_router_ports()
2938 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2939 if (status < 0) in dsp_free_router_ports()
2942 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2946 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2968 rate_multi, 0, port_map); in dsp_allocate_ports()
2981 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
3005 if (status < 0) { in dsp_free_ports()
3026 DMA_STATE_STOP = 0,
3042 return 0; in dma_convert_to_hda_format()
3061 if (status < 0) in dma_reset()
3064 return 0; in dma_reset()
3079 return 0; in dma_set_state()
3083 return 0; in dma_set_state()
3101 return 0; in dma_xfer()
3126 static const u32 g_magic_value = 0x4c46584d;
3127 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
3141 return p->count == 0; in is_last()
3158 #define INVALID_DMA_CHANNEL (~0U)
3180 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3181 if (status < 0) { in dspxfr_hci_write()
3188 return 0; in dspxfr_hci_write()
3196 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3213 int status = 0; in dspxfr_one_seg()
3245 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3255 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3257 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3277 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3281 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3284 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3294 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3312 while (words_to_write != 0) { in dspxfr_one_seg()
3319 if (status < 0) in dspxfr_one_seg()
3323 if (status < 0) in dspxfr_one_seg()
3330 if (status < 0) in dspxfr_one_seg()
3333 if (status < 0) in dspxfr_one_seg()
3340 if (status < 0) in dspxfr_one_seg()
3342 if (remainder_words != 0) { in dspxfr_one_seg()
3347 if (status < 0) in dspxfr_one_seg()
3349 remainder_words = 0; in dspxfr_one_seg()
3353 if (status < 0) in dspxfr_one_seg()
3372 if (status < 0) in dspxfr_one_seg()
3380 if (remainder_words != 0) { in dspxfr_one_seg()
3393 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3410 unsigned short hda_format = 0; in dspxfr_image()
3412 unsigned char stream_id = 0; in dspxfr_image()
3436 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3441 if (status < 0) { in dspxfr_image()
3450 if (status < 0) in dspxfr_image()
3456 if (status < 0) { in dspxfr_image()
3463 port_map_mask = 0; in dspxfr_image()
3466 if (status < 0) { in dspxfr_image()
3473 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3474 if (status < 0) { in dspxfr_image()
3488 if (status < 0) in dspxfr_image()
3498 if (port_map_mask != 0) in dspxfr_image()
3501 if (status < 0) in dspxfr_image()
3505 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3528 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3529 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3532 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3542 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3545 * @router_chans: number of audio router channels to be allocated (0 means use
3561 int status = 0; in dspload_image()
3566 if (router_chans == 0) { in dspload_image()
3586 if (status < 0) in dspload_image()
3593 if (status < 0) in dspload_image()
3603 } while (0); in dspload_image()
3611 unsigned int data = 0; in dspload_is_loaded()
3612 int status = 0; in dspload_is_loaded()
3614 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3615 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3648 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3661 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3662 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3664 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3681 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3682 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3683 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3684 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3685 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3687 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3688 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3690 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3691 write_val = (target & 0xff); in ca0113_mmio_command_set()
3695 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3701 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3702 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3703 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3705 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3706 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3707 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3708 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3720 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3721 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3722 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3723 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3724 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3726 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3727 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3729 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3730 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3734 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3736 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3737 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3738 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3740 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3741 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3742 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3743 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3762 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3763 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3764 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3767 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3768 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3783 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3784 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3785 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3786 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3787 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3788 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3789 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3790 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3793 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3794 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3795 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3796 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3797 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3798 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3810 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3812 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3827 /* Set GPIO bit 1 to 0 for rear mic */
3828 R3DI_REAR_MIC = 0,
3834 /* Set GPIO bit 2 to 0 for headphone */
3835 R3DI_HEADPHONE_OUT = 0,
3841 R3DI_DSP_DOWNLOADING = 0,
3853 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3863 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3873 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3878 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3882 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3885 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3892 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3907 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3909 return 0; in ca0132_playback_pcm_prepare()
3919 return 0; in ca0132_playback_pcm_cleanup()
3926 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3928 return 0; in ca0132_playback_pcm_cleanup()
3940 return 0; in ca0132_playback_pcm_delay()
4004 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
4006 return 0; in ca0132_capture_pcm_prepare()
4016 return 0; in ca0132_capture_pcm_cleanup()
4019 return 0; in ca0132_capture_pcm_cleanup()
4031 return 0; in ca0132_capture_pcm_delay()
4057 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4075 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4084 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4104 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
4105 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
4106 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
4107 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
4108 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
4109 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
4110 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
4111 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
4112 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
4113 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
4114 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
4115 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4116 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4117 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4118 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4119 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4120 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
4124 * This table counts from float 0 to 1 in increments of .01, which is
4128 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4129 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4130 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4131 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4132 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4133 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4134 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4135 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4136 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4137 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4138 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4139 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4140 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4141 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4142 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4143 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4144 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4152 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4153 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4154 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4155 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4156 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4157 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4158 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4159 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4160 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4161 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4162 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4163 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4164 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4165 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4166 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4167 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4168 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4175 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4176 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4177 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4178 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4179 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4180 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4181 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4182 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4183 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4184 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4185 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4186 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4187 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4188 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4189 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4190 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4191 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4192 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4193 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4194 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4195 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4196 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4197 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4198 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4199 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4200 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4201 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4205 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4206 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4207 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4208 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4209 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4210 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4211 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4212 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4213 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4214 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4215 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4216 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4217 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4218 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4219 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4220 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4221 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4225 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4226 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4227 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4228 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4229 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4230 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4231 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4232 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4233 0x41C00000
4239 int i = 0; in tuning_ctl_set()
4241 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4248 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4266 return 0; in tuning_ctl_get()
4279 return 0; in voice_focus_ctl_info()
4294 return 0; in voice_focus_ctl_put()
4310 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4314 return 0; in mic_svm_ctl_info()
4329 return 0; in mic_svm_ctl_put()
4336 return 0; in mic_svm_ctl_put()
4345 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4349 return 0; in equalizer_ctl_info()
4364 return 0; in equalizer_ctl_put()
4374 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4375 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4384 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4409 return 0; in add_tuning_control()
4412 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4422 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4428 if (err < 0) in add_tuning_ctls()
4432 return 0; in add_tuning_ctls()
4445 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4487 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4488 if (err < 0) in ca0132_select_out()
4492 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4493 if (err < 0) in ca0132_select_out()
4497 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4498 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4499 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4500 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4501 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4502 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4503 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4504 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4507 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4508 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4512 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4513 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4514 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4520 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4521 if (err < 0) in ca0132_select_out()
4525 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4526 if (err < 0) in ca0132_select_out()
4530 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4531 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4532 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4533 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4534 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4535 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4536 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4537 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4540 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4541 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4542 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4545 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4546 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4554 return err < 0 ? err : 0; in ca0132_select_out()
4572 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4588 return 0; in ca0132_alt_set_full_range_speaker()
4591 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4592 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4594 if (err < 0) in ca0132_alt_set_full_range_speaker()
4599 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4601 if (err < 0) in ca0132_alt_set_full_range_speaker()
4604 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4606 if (err < 0) in ca0132_alt_set_full_range_speaker()
4614 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4616 if (err < 0) in ca0132_alt_set_full_range_speaker()
4620 return 0; in ca0132_alt_set_full_range_speaker()
4636 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4637 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4643 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4645 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4649 return 0; in ca0132_alt_surround_set_bass_redirection()
4664 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4682 return 0; in ca0132_alt_select_out_quirk_set()
4689 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4690 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4697 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4702 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4709 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4714 if (err < 0) in ca0132_alt_select_out_quirk_set()
4719 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4731 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4742 return 0; in ca0132_alt_select_out_quirk_set()
4750 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4751 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4801 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4802 if (err < 0) in ca0132_alt_select_out()
4806 if (err < 0) in ca0132_alt_select_out()
4814 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4815 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4818 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4820 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4822 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4824 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4836 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4837 if (err < 0) in ca0132_alt_select_out()
4843 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4844 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4847 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4848 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4849 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4860 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4862 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4864 if (err < 0) in ca0132_alt_select_out()
4877 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4878 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4879 if (err < 0) in ca0132_alt_select_out()
4886 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4888 if (err < 0) in ca0132_alt_select_out()
4895 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4896 if (err < 0) in ca0132_alt_select_out()
4900 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4902 if (err < 0) in ca0132_alt_select_out()
4907 if (err < 0) in ca0132_alt_select_out()
4914 return err < 0 ? err : 0; in ca0132_alt_select_out()
4930 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4951 return 0; in ca0132_set_vipsource()
4953 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4955 (val == 0)) { in ca0132_set_vipsource()
4956 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4963 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4965 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4973 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4975 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4989 return 0; in ca0132_alt_set_vipsource()
4993 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4994 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4996 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4998 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
5000 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
5003 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
5008 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
5020 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
5027 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
5033 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
5036 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
5042 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
5043 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
5081 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
5089 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
5092 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
5097 return 0; in ca0132_select_mic()
5115 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
5116 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
5125 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5136 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5140 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5146 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5156 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5158 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5160 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5161 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5164 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5165 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5168 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5169 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5172 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5173 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5181 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5185 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5191 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5194 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5199 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5208 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5214 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5219 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5220 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5225 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5226 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5232 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5241 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5252 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5254 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5256 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5257 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5261 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5262 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5265 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5266 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5277 return 0; in ca0132_alt_select_in()
5309 * They return 0 if no changed. Return 1 if changed.
5325 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5338 int err = 0; in ca0132_effects_set()
5341 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5342 return 0; /* no changed */ in ca0132_effects_set()
5348 val = 0; in ca0132_effects_set()
5353 val = 0; in ca0132_effects_set()
5361 val = 0; in ca0132_effects_set()
5365 val = 0; in ca0132_effects_set()
5380 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5385 * to module ID 0x47. No clue why. in ca0132_effects_set()
5399 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5405 val = 0; in ca0132_effects_set()
5408 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5411 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5413 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5415 if (err < 0) in ca0132_effects_set()
5416 return 0; /* no changed */ in ca0132_effects_set()
5428 int i, ret = 0; in ca0132_pe_switch_set()
5449 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5450 AC_VERB_GET_CONV, 0); in stop_mic1()
5451 if (oldval != 0) in stop_mic1()
5452 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5454 0); in stop_mic1()
5463 if (oldval != 0) in resume_mic1()
5464 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5476 int i, ret = 0; in ca0132_cvoice_switch_set()
5489 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5504 int ret = 0; in ca0132_mic_boost_set()
5507 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5508 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5510 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5511 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5519 int ret = 0; in ca0132_alt_mic_boost_set()
5521 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5522 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5530 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5531 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5533 return 0; in ae5_headphone_gain_set()
5544 return 0; in zxr_headphone_gain_set()
5552 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5554 int ret = 0; in ca0132_vnode_switch_set()
5601 0, dir); in ca0132_vnode_switch_set()
5616 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5634 int i = 0; in ca0132_alt_slider_ctl_set()
5647 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5651 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5656 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5660 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5667 return 0; in ca0132_alt_slider_ctl_set()
5683 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5696 return 0; in ca0132_alt_slider_ctl_get()
5712 return 0; in ca0132_alt_xbass_xover_slider_info()
5722 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5726 return 0; in ca0132_alt_effect_slider_info()
5746 return 0; in ca0132_alt_xbass_xover_slider_put()
5756 return 0; in ca0132_alt_xbass_xover_slider_put()
5771 return 0; in ca0132_alt_effect_slider_put()
5778 return 0; in ca0132_alt_effect_slider_put()
5785 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5803 return 0; in ca0132_alt_mic_boost_info()
5812 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5813 return 0; in ca0132_alt_mic_boost_get()
5821 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5825 return 0; in ca0132_alt_mic_boost_put()
5857 return 0; in ae5_headphone_gain_info()
5866 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5867 return 0; in ae5_headphone_gain_get()
5875 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5879 return 0; in ae5_headphone_gain_put()
5910 return 0; in ae5_sound_filter_info()
5919 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5920 return 0; in ae5_sound_filter_get()
5928 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5932 return 0; in ae5_sound_filter_put()
5939 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5960 return 0; in ca0132_alt_input_source_info()
5969 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5970 return 0; in ca0132_alt_input_source_get()
5978 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5989 return 0; in ca0132_alt_input_source_put()
6012 return 0; in ca0132_alt_output_select_get_info()
6021 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
6022 return 0; in ca0132_alt_output_select_get()
6030 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
6035 return 0; in ca0132_alt_output_select_put()
6063 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
6072 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
6073 return 0; in ca0132_alt_speaker_channel_cfg_get()
6081 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
6085 return 0; in ca0132_alt_speaker_channel_cfg_put()
6116 return 0; in ca0132_alt_svm_setting_info()
6125 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
6126 return 0; in ca0132_alt_svm_setting_get()
6134 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
6140 return 0; in ca0132_alt_svm_setting_put()
6148 case 0: in ca0132_alt_svm_setting_put()
6180 return 0; in ca0132_alt_eq_preset_info()
6189 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6190 return 0; in ca0132_alt_eq_preset_get()
6198 int i, err = 0; in ca0132_alt_eq_preset_put()
6199 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6203 return 0; in ca0132_alt_eq_preset_put()
6208 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6211 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6215 if (err < 0) in ca0132_alt_eq_preset_put()
6219 if (err >= 0) in ca0132_alt_eq_preset_put()
6237 return 0; in ca0132_voicefx_info()
6246 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6247 return 0; in ca0132_voicefx_get()
6255 int i, err = 0; in ca0132_voicefx_put()
6256 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6259 return 0; in ca0132_voicefx_put()
6265 * Idx 0 is default. in ca0132_voicefx_put()
6268 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6272 if (err < 0) in ca0132_voicefx_put()
6276 if (err >= 0) { in ca0132_voicefx_put()
6279 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6304 return 0; in ca0132_switch_get()
6310 return 0; in ca0132_switch_get()
6314 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6316 return 0; in ca0132_switch_get()
6321 return 0; in ca0132_switch_get()
6326 return 0; in ca0132_switch_get()
6331 return 0; in ca0132_switch_get()
6334 return 0; in ca0132_switch_get()
6347 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6388 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6407 changed = 0; in ca0132_switch_put()
6417 changed = 0; in ca0132_switch_put()
6425 changed = 0; in ca0132_switch_put()
6456 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6488 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6498 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6527 return 0; in ca0132_volume_get()
6538 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6562 0, dir); in ca0132_volume_put()
6585 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6589 case 0x02: in ca0132_alt_volume_put()
6592 case 0x07: in ca0132_alt_volume_put()
6634 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6644 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6662 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6679 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6714 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6726 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6743 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6760 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6777 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6820 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6852 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6861 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6868 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6886 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6903 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6931 * I think this has to do with the pin for rear surround being 0x11,
6932 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6950 int err = 0; in ca0132_alt_add_chmap_ctls()
6963 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6964 if (err < 0) in ca0132_alt_add_chmap_ctls()
6979 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6980 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6981 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6982 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6984 0x12, 1, HDA_INPUT),
7002 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
7004 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
7005 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
7006 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
7007 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
7008 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
7009 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
7010 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
7012 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
7013 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7024 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
7026 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
7027 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
7028 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
7029 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
7030 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
7031 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
7034 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
7035 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7045 int err = 0; in ca0132_build_controls()
7048 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
7050 if (err < 0) in ca0132_build_controls()
7055 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
7059 "Playback Volume", 0); in ca0132_build_controls()
7063 true, 0, &spec->vmaster_mute.sw_kctl); in ca0132_build_controls()
7064 if (err < 0) in ca0132_build_controls()
7072 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
7083 if (err < 0) in ca0132_build_controls()
7093 if (err < 0) in ca0132_build_controls()
7097 if (err < 0) in ca0132_build_controls()
7101 "Enable OutFX", 0); in ca0132_build_controls()
7102 if (err < 0) in ca0132_build_controls()
7107 if (err < 0) in ca0132_build_controls()
7111 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
7116 if (err < 0) in ca0132_build_controls()
7123 if (err < 0) in ca0132_build_controls()
7127 "PlayEnhancement", 0); in ca0132_build_controls()
7128 if (err < 0) in ca0132_build_controls()
7133 if (err < 0) in ca0132_build_controls()
7137 if (err < 0) in ca0132_build_controls()
7147 if (err < 0) in ca0132_build_controls()
7150 if (err < 0) in ca0132_build_controls()
7153 if (err < 0) in ca0132_build_controls()
7156 if (err < 0) in ca0132_build_controls()
7159 if (err < 0) in ca0132_build_controls()
7162 if (err < 0) in ca0132_build_controls()
7165 if (err < 0) in ca0132_build_controls()
7173 if (err < 0) in ca0132_build_controls()
7182 if (err < 0) in ca0132_build_controls()
7185 if (err < 0) in ca0132_build_controls()
7190 if (err < 0) in ca0132_build_controls()
7202 if (err < 0) in ca0132_build_controls()
7208 if (err < 0) in ca0132_build_controls()
7211 if (err < 0) in ca0132_build_controls()
7218 if (err < 0) in ca0132_build_controls()
7225 return 0; in ca0132_build_controls()
7231 int err = 0; in dbpro_build_controls()
7236 if (err < 0) in dbpro_build_controls()
7242 if (err < 0) in dbpro_build_controls()
7246 return 0; in dbpro_build_controls()
7306 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7311 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7332 return 0; in ca0132_build_pcms()
7349 return 0; in ca0132_build_pcms()
7362 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7366 return 0; in dbpro_build_pcms()
7383 return 0; in dbpro_build_pcms()
7391 snd_hda_codec_write(codec, pin, 0, in init_output()
7396 snd_hda_codec_write(codec, dac, 0, in init_output()
7405 snd_hda_codec_write(codec, pin, 0, in init_input()
7407 AMP_IN_UNMUTE(0)); in init_input()
7410 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7411 AMP_IN_UNMUTE(0)); in init_input()
7413 /* init to 0 dB and unmute. */ in init_input()
7414 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7415 HDA_AMP_VOLMASK, 0x5a); in init_input()
7416 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7417 HDA_AMP_MUTE, 0); in init_input()
7443 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7447 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7450 val |= 0x80; in ca0132_set_dmic()
7451 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7454 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7459 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7463 val &= 0x5f; in ca0132_set_dmic()
7464 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7467 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7468 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7487 * Bit 2-0: MPIO select in ca0132_init_dmic()
7491 val = 0x01; in ca0132_init_dmic()
7492 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7496 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7501 val = 0x83; in ca0132_init_dmic()
7502 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7505 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7506 * Bit 3-0: Channel mask in ca0132_init_dmic()
7513 val = 0x33; in ca0132_init_dmic()
7515 val = 0x23; in ca0132_init_dmic()
7518 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7531 chipio_8051_write_exram_no_mutex(codec, 0x1920, 0x00); in ca0132_init_analog_mic2()
7532 chipio_8051_write_exram_no_mutex(codec, 0x192d, 0x00); in ca0132_init_analog_mic2()
7545 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7548 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7551 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7566 if (status >= 0) { in ca0132_alt_free_active_dma_channels()
7567 /* AND against 0xfff to get the active channel bits. */ in ca0132_alt_free_active_dma_channels()
7568 tmp = tmp & 0xfff; in ca0132_alt_free_active_dma_channels()
7583 for (i = 0; i < DSPDMAC_DMA_CFG_CHANNEL_COUNT; i++) { in ca0132_alt_free_active_dma_channels()
7586 if (status < 0) in ca0132_alt_free_active_dma_channels()
7611 * DSP stream that uses the DMA channels. These are 0x0c, the audio output
7612 * stream, 0x03, analog mic 1, and 0x04, analog mic 2.
7616 static const unsigned int dsp_dma_stream_ids[] = { 0x0c, 0x03, 0x04 }; in ca0132_alt_start_dsp_audio_streams()
7626 for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) { in ca0132_alt_start_dsp_audio_streams()
7631 dsp_dma_stream_ids[i], 0); in ca0132_alt_start_dsp_audio_streams()
7646 /* Make sure stream 0x0c is six channels. */ in ca0132_alt_start_dsp_audio_streams()
7647 chipio_set_stream_channels(codec, 0x0c, 6); in ca0132_alt_start_dsp_audio_streams()
7649 for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) { in ca0132_alt_start_dsp_audio_streams()
7661 * The region of ChipIO memory from 0x190000-0x1903fc is a sort of 'audio
7664 * value. The 2-bit number value is seemingly 0 if inactive, 1 if active,
7667 * 0x0001f8c0
7671 * the region of exram memory from 0x1477-0x1575 has each byte represent an
7672 * entry within the 0x190000 range, and when a range of entries is in use, the
7673 * ending value is overwritten with 0xff.
7674 * 0x1578 in exram is a table of 0x25 entries, corresponding to the ChipIO
7675 * streamID's, where each entry is a starting 0x190000 port offset.
7676 * 0x159d in exram is the same as 0x1578, except it contains the ending port
7684 * 0x00-0x1f: HDA audio stream input/output ports.
7685 * 0x80-0xbf: Sample rate converter input/outputs. Only valid ports seem to
7686 * have the lower-nibble set to 0x1, 0x2, and 0x9.
7687 * 0xc0-0xdf: DSP DMA input/output ports. Dynamically assigned.
7688 * 0xe0-0xff: DAC/ADC audio input/output ports.
7691 * 0x03: Mic1 ADC to DSP.
7692 * 0x04: Mic2 ADC to DSP.
7693 * 0x05: HDA node 0x02 audio stream to DSP.
7694 * 0x0f: DSP Mic exit to HDA node 0x07.
7695 * 0x0c: DSP processed audio to DACs.
7696 * 0x14: DAC0, front L/R.
7710 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id, in chipio_remap_stream()
7714 * Check if the stream's port value is 0xff, because the 8051 may not in chipio_remap_stream()
7718 if (stream_offset == 0xff) { in chipio_remap_stream()
7719 for (i = 0; i < 5; i++) { in chipio_remap_stream()
7722 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id, in chipio_remap_stream()
7725 if (stream_offset != 0xff) in chipio_remap_stream()
7730 if (stream_offset == 0xff) { in chipio_remap_stream()
7731 codec_info(codec, "%s: Stream 0x%02x ports aren't allocated, remap failed!\n", in chipio_remap_stream()
7737 stream_offset *= 0x04; in chipio_remap_stream()
7738 stream_offset += 0x190000; in chipio_remap_stream()
7740 for (i = 0; i < remap_data->count; i++) { in chipio_remap_stream()
7747 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in chipio_remap_stream()
7755 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7760 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7765 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7794 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7799 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7804 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7807 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7808 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7824 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7828 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7834 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7836 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7840 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7841 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7853 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7854 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7856 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7857 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7858 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7859 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7860 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7861 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7883 chipio_remap_stream(codec, &stream_remap_data[0]); in sbz_chipio_startup_data()
7912 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7913 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7919 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7921 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7922 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7926 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7927 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7930 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7931 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7942 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7943 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae5_post_dsp_register_set()
7945 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7946 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7947 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7948 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7949 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7950 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7951 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7952 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7953 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7954 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7955 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7956 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7958 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7959 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7960 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7970 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7977 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7978 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7980 chipio_8051_write_exram(codec, 0xfa92, 0x22); in ae5_post_dsp_param_setup()
7985 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8); in ae5_post_dsp_pll_setup()
7986 chipio_8051_write_pll_pmu(codec, 0x45, 0xcc); in ae5_post_dsp_pll_setup()
7987 chipio_8051_write_pll_pmu(codec, 0x40, 0xcb); in ae5_post_dsp_pll_setup()
7988 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7); in ae5_post_dsp_pll_setup()
7989 chipio_8051_write_pll_pmu(codec, 0x51, 0x8d); in ae5_post_dsp_pll_setup()
7998 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
8000 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
8002 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
8004 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
8005 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
8006 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
8007 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
8011 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7); in ae5_post_dsp_stream_setup()
8013 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
8024 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
8025 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
8026 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
8027 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
8029 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
8031 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
8032 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
8033 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
8034 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
8035 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
8036 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
8037 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
8038 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
8040 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
8042 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
8044 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
8045 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
8059 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
8060 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
8061 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
8062 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
8063 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
8064 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
8065 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
8066 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
8077 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
8078 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
8080 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
8082 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
8083 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
8085 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
8086 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
8087 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
8097 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
8100 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
8104 for (i = 0; i < ARRAY_SIZE(addr); i++) in ae7_post_dsp_pll_setup()
8112 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
8115 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
8121 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7); in ae7_post_dsp_asi_setup_ports()
8123 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
8124 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
8125 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
8126 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
8131 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
8132 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
8134 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
8135 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
8136 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
8138 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
8139 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
8140 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
8142 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
8148 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
8150 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
8154 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
8161 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
8164 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
8165 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
8166 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
8167 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
8169 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
8170 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
8172 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
8173 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8192 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8194 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae7_post_dsp_asi_setup()
8196 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8197 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8202 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8203 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8204 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8206 chipio_8051_write_exram(codec, 0xfa92, 0x22); in ae7_post_dsp_asi_setup()
8211 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7); in ae7_post_dsp_asi_setup()
8231 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8232 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8241 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8244 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8248 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8249 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8253 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8257 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8279 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8283 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8287 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8300 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8301 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8334 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8335 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8339 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8343 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8347 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8353 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8354 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8383 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8384 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8385 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8386 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8388 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8389 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8390 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8394 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8395 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8399 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8403 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8407 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8418 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8419 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8448 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8450 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8453 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8456 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8457 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8459 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8463 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8464 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8468 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8472 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8476 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8477 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8488 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8491 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8495 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8496 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8497 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8501 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8502 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8526 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8527 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8529 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8533 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8535 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8537 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8539 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8541 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8555 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8556 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8557 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8558 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8595 codec->card->dev) != 0) in ca0132_download_dsp_images()
8602 codec->card->dev) != 0) in ca0132_download_dsp_images()
8617 codec->card->dev) != 0) in ca0132_download_dsp_images()
8622 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8669 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8670 spec->wait_scp = 0; in ca0132_process_dsp_response()
8722 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8729 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8731 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8739 {0x15, 0x70D, 0xF0},
8740 {0x15, 0x70E, 0xFE},
8741 {0x15, 0x707, 0x75},
8742 {0x15, 0x707, 0xD3},
8743 {0x15, 0x707, 0x09},
8744 {0x15, 0x707, 0x53},
8745 {0x15, 0x707, 0xD4},
8746 {0x15, 0x707, 0xEF},
8747 {0x15, 0x707, 0x75},
8748 {0x15, 0x707, 0xD3},
8749 {0x15, 0x707, 0x09},
8750 {0x15, 0x707, 0x02},
8751 {0x15, 0x707, 0x37},
8752 {0x15, 0x707, 0x78},
8753 {0x15, 0x53C, 0xCE},
8754 {0x15, 0x575, 0xC9},
8755 {0x15, 0x53D, 0xCE},
8756 {0x15, 0x5B7, 0xC9},
8757 {0x15, 0x70D, 0xE8},
8758 {0x15, 0x70E, 0xFE},
8759 {0x15, 0x707, 0x02},
8760 {0x15, 0x707, 0x68},
8761 {0x15, 0x707, 0x62},
8762 {0x15, 0x53A, 0xCE},
8763 {0x15, 0x546, 0xC9},
8764 {0x15, 0x53B, 0xCE},
8765 {0x15, 0x5E8, 0xC9},
8771 {0x15, 0x70D, 0x20},
8772 {0x15, 0x70E, 0x19},
8773 {0x15, 0x707, 0x00},
8774 {0x15, 0x539, 0xCE},
8775 {0x15, 0x546, 0xC9},
8776 {0x15, 0x70D, 0xB7},
8777 {0x15, 0x70E, 0x09},
8778 {0x15, 0x707, 0x10},
8779 {0x15, 0x70D, 0xAF},
8780 {0x15, 0x70E, 0x09},
8781 {0x15, 0x707, 0x01},
8782 {0x15, 0x707, 0x05},
8783 {0x15, 0x70D, 0x73},
8784 {0x15, 0x70E, 0x09},
8785 {0x15, 0x707, 0x14},
8786 {0x15, 0x6FF, 0xC4},
8806 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_chip()
8807 chipio_write_no_mutex(codec, 0x18b0a4, 0x000000c2); in ca0132_init_chip()
8809 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_init_chip()
8810 AC_VERB_SET_CODEC_RESET, 0); in ca0132_init_chip()
8811 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_init_chip()
8812 AC_VERB_SET_CODEC_RESET, 0); in ca0132_init_chip()
8821 spec->cur_mic_boost = 0; in ca0132_init_chip()
8823 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8824 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8825 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8826 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8827 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8834 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8835 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8836 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8844 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8848 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8854 spec->voicefx_val = 0; in ca0132_init_chip()
8856 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8877 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8888 for (i = 0; i < 4; i++) in sbz_region2_exit()
8889 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8890 for (i = 0; i < 8; i++) in sbz_region2_exit()
8891 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8893 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8902 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8905 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8906 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8908 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8909 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8910 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8915 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8918 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8919 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8920 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8928 if (dir >= 0) in sbz_gpio_shutdown_commands()
8929 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8931 if (mask >= 0) in sbz_gpio_shutdown_commands()
8932 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8935 if (data >= 0) in sbz_gpio_shutdown_commands()
8936 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8942 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8945 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8946 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8947 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8952 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8953 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8956 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8957 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8958 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8960 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8961 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8963 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8964 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8966 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8968 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8969 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8970 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8972 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8974 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8979 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8980 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8988 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8989 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8994 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8995 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8997 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8998 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8999 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
9000 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
9001 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
9002 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
9003 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
9006 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
9007 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
9009 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
9011 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
9012 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
9014 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
9019 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
9020 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
9021 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
9022 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
9023 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
9025 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
9027 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
9028 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
9030 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
9031 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
9032 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
9033 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
9034 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
9035 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
9037 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
9039 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
9040 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
9045 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
9046 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
9047 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
9048 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
9050 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
9051 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
9053 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
9055 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
9056 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
9060 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
9065 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
9067 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
9093 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
9095 unsigned int failure = 0; in sbz_dsp_startup_check()
9103 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9105 cur_address += 0x4; in sbz_dsp_startup_check()
9107 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9108 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
9120 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
9125 failure = 0; in sbz_dsp_startup_check()
9126 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9128 cur_address += 0x4; in sbz_dsp_startup_check()
9130 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9131 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
9147 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
9152 * to 0 just incase a value has lingered from a boot into Windows.
9156 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9157 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9158 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9159 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9160 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9161 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9162 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9163 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9173 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9174 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9176 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9178 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9179 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9184 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9186 chipio_8051_write_exram(codec, 0x1c1e, 0x5b); in r3d_pre_dsp_setup()
9188 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9189 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9194 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9196 chipio_8051_write_exram(codec, 0x1c1e, 0x5b); in r3di_pre_dsp_setup()
9197 chipio_8051_write_exram(codec, 0x1920, 0x00); in r3di_pre_dsp_setup()
9198 chipio_8051_write_exram(codec, 0x1921, 0x40); in r3di_pre_dsp_setup()
9200 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9201 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9211 static const unsigned int addr[] = { 0x43, 0x40, 0x41, 0x42, 0x45 }; in zxr_pre_dsp_setup()
9212 static const unsigned int data[] = { 0x08, 0x0c, 0x0b, 0x07, 0x0d }; in zxr_pre_dsp_setup()
9215 chipio_write(codec, 0x189000, 0x0001f100); in zxr_pre_dsp_setup()
9217 chipio_write(codec, 0x18900c, 0x0001f100); in zxr_pre_dsp_setup()
9222 * 0xfa92 in exram. This function seems to have something to do with in zxr_pre_dsp_setup()
9226 chipio_8051_write_exram(codec, 0xfa92, 0x22); in zxr_pre_dsp_setup()
9228 chipio_8051_write_pll_pmu(codec, 0x51, 0x98); in zxr_pre_dsp_setup()
9230 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x82); in zxr_pre_dsp_setup()
9233 chipio_write(codec, 0x18902c, 0x00000000); in zxr_pre_dsp_setup()
9235 chipio_write(codec, 0x18902c, 0x00000003); in zxr_pre_dsp_setup()
9238 for (i = 0; i < ARRAY_SIZE(addr); i++) in zxr_pre_dsp_setup()
9248 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9249 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9253 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9254 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9255 0x000000c1, 0x00000080
9259 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9260 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9261 0x000000c1, 0x00000080
9265 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9266 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9267 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9268 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9272 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9273 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9274 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9275 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9276 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9277 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9278 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9279 0x00000080, 0x00880680
9289 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9290 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9295 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9296 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9299 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9300 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9303 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9304 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9307 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9308 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9312 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9328 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9343 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9344 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9347 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9350 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9353 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9361 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9383 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9384 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9388 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9389 0x01, 0x6b, 0x57
9394 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9407 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8); in ae5_register_set()
9409 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9410 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae5_register_set()
9413 tmp[0] = 0x03; in ae5_register_set()
9414 tmp[1] = 0x03; in ae5_register_set()
9415 tmp[2] = 0x07; in ae5_register_set()
9417 tmp[0] = 0x0f; in ae5_register_set()
9418 tmp[1] = 0x0f; in ae5_register_set()
9419 tmp[2] = 0x0f; in ae5_register_set()
9422 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9429 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9435 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9438 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9439 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9441 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9444 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9445 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9448 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9477 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9486 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9487 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9490 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9494 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9497 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9498 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9499 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9500 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9503 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9538 return 0; in ca0132_init()
9588 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9589 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9591 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9593 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9600 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9601 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9602 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9603 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9631 return 0; in ca0132_init()
9640 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9643 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9646 return 0; in dbpro_init()
9704 spec->dacs[0] = 0x2; in ca0132_config()
9705 spec->dacs[1] = 0x3; in ca0132_config()
9706 spec->dacs[2] = 0x4; in ca0132_config()
9752 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9753 spec->out_pins[1] = 0x0f; in ca0132_config()
9754 spec->shared_out_nid = 0x2; in ca0132_config()
9755 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9757 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9758 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9759 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9762 spec->input_pins[0] = 0x12; in ca0132_config()
9763 spec->input_pins[1] = 0x11; in ca0132_config()
9764 spec->input_pins[2] = 0x13; in ca0132_config()
9765 spec->shared_mic_nid = 0x7; in ca0132_config()
9766 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9771 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9772 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9773 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9774 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9775 spec->shared_out_nid = 0x2; in ca0132_config()
9779 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9780 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9781 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9784 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9785 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9786 spec->shared_mic_nid = 0x7; in ca0132_config()
9787 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9790 spec->dig_out = 0x05; in ca0132_config()
9792 spec->dig_in = 0x09; in ca0132_config()
9796 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9797 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9798 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9799 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9800 spec->shared_out_nid = 0x2; in ca0132_config()
9804 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9805 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9806 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9809 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9810 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9811 spec->shared_mic_nid = 0x7; in ca0132_config()
9812 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9815 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9818 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9820 spec->dig_out = 0x05; in ca0132_config()
9823 spec->dig_in = 0x09; in ca0132_config()
9828 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9829 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9830 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9831 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9832 spec->shared_out_nid = 0x2; in ca0132_config()
9836 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9837 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9838 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9841 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9842 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9843 spec->shared_mic_nid = 0x7; in ca0132_config()
9844 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9847 spec->dig_out = 0x05; in ca0132_config()
9852 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9853 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9854 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9855 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9856 spec->shared_out_nid = 0x2; in ca0132_config()
9860 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9861 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9862 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9865 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9866 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9867 spec->shared_mic_nid = 0x7; in ca0132_config()
9868 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9871 spec->dig_out = 0x05; in ca0132_config()
9876 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9877 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9878 spec->shared_out_nid = 0x2; in ca0132_config()
9881 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9882 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9883 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9886 spec->input_pins[0] = 0x12; in ca0132_config()
9887 spec->input_pins[1] = 0x11; in ca0132_config()
9888 spec->input_pins[2] = 0x13; in ca0132_config()
9889 spec->shared_mic_nid = 0x7; in ca0132_config()
9890 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9893 spec->dig_out = 0x05; in ca0132_config()
9895 spec->dig_in = 0x09; in ca0132_config()
9920 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9921 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9922 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9926 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9928 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9930 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9931 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9932 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9934 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9936 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9940 return 0; in ca0132_prepare_verbs()
9952 case 0x11020033: in sbz_detect_quirk()
9955 case 0x1102003f: in sbz_detect_quirk()
10003 spec->mixers[0] = desktop_mixer; in ca0132_codec_probe()
10007 spec->mixers[0] = desktop_mixer; in ca0132_codec_probe()
10013 spec->mixers[0] = desktop_mixer; in ca0132_codec_probe()
10017 spec->mixers[0] = r3di_mixer; in ca0132_codec_probe()
10021 spec->mixers[0] = desktop_mixer; in ca0132_codec_probe()
10025 spec->mixers[0] = desktop_mixer; in ca0132_codec_probe()
10029 spec->mixers[0] = ca0132_mixer; in ca0132_codec_probe()
10058 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in ca0132_codec_probe()
10076 if (err < 0) in ca0132_codec_probe()
10080 if (err < 0) in ca0132_codec_probe()
10085 return 0; in ca0132_codec_probe()
10127 return 0; in ca0132_codec_suspend()
10144 HDA_CODEC_ID(0x11020011, "CA0132"),