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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-ss-cm40.dtsi11 #clock-cells = <0>;
20 ranges = <0x34000000 0x0 0x34000000 0x4000000>;
25 reg = <0x37220000 0x1000>;
37 reg = <0x37230000 0x1000>;
50 reg = <0x37400000 0x1000>;
70 reg = <0x37620000 0x1000>;
82 reg = <0x37630000 0x1000>;
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-nomadik-s8815.dts28 gpios = <16 0x0>;
43 pinctrl-0 = <&cd_default_mode>;
59 ste,input = <0>;
64 ste,output = <0>;
72 ste,input = <0>;
88 ste,input = <0>;
97 reg = <0x34000000 0x1000000>;
100 ranges = <0 0x34000000 0x1000000>;
103 reg = <0x300 0x0fd00>;
113 reg = <0x1d>;
[all …]
H A Dste-nomadik-nhk15.dts40 ste,input = <0>;
52 ste,input = <0>;
64 ste,input = <0>;
78 reg = <0x34000000 0x1000000>;
81 ranges = <0 0x34000000 0x1000000>;
84 reg = <0x300 0x0fd00>;
98 pinctrl-0 = <&lis3lv02dl_nhk_mode>;
100 reg = <0x1d>;
104 reg = <0x43>;
110 pinctrl-0 = <&stmpe2401_1_nhk_mode>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Darm-versatile.txt24 reg = <0x34000000 0x4000000>;
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dintel,keembay-dwc3.yaml40 "^usb@[0-9a-f]+$":
73 reg = <0x34000000 0x10000>;
/freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/
H A Dlog1pf.c21 .thresh = V4 (0x4b800000), /* asuint32(INFINITY) - TinyBound. */
22 .minus_one = V4 (0xbf800000),
25 /* asuint32(0x1p-23). ulp=0.5 at 0x1p-23. */
26 # define TinyBound v_u32 (0x34000000)
39 _ZGVnN4v_log1pf(0x1.04418ap-2) got 0x1.cfcbd8p-3
40 want 0x1.cfcbdcp-3. */
69 _ZGVnN4v_log1pf(0x1.216d12p-2) got 0x1.fdcb12p-3
70 want 0x1.fdcb16p-3. */
74 vcaleq_f32 (x, v_f32 (0x1p127f))); in V_NAME_F1()
89 TEST_SYM_INTERVAL (V_NAME_F1 (log1p), 0.0, 0x1p-23, 30000)
[all …]
H A Dtanhf.c19 /* 0x1.205966p+3, above which tanhf rounds to 1 (or -1 for negative). */
20 .boring_bound = V4 (0x41102cb3),
21 .large_bound = V4 (0x7f800000),
36 _ZGVnN4v_tanhf (0x1.fa5eep-5) got 0x1.f9ba02p-5
37 want 0x1.f9ba08p-5. */
53 lanes to 0, which will trigger no exceptions, and fix them up later. */ in V_NAME_F1()
55 vcltq_u32 (iax, v_u32 (0x34000000))); in V_NAME_F1()
79 TEST_SYM_INTERVAL (V_NAME_F1 (tanh), 0, 0x1p-23, 1000)
80 TEST_SYM_INTERVAL (V_NAME_F1 (tanh), 0x1p-23, 0x1.205966p+3, 100000)
81 TEST_SYM_INTERVAL (V_NAME_F1 (tanh), 0x1.205966p+3, inf, 100)
H A Dexpm1f.c27 .oflow_bound = V4 (0x1.5ebc4p+6),
29 /* asuint(oflow_bound) - asuint(0x1p-23), shifted left by 1 for absolute
31 .thresh = V4 (0x1d5ebc40),
35 /* asuint(0x1p-23), shifted by 1 for abs compare. */
36 #define TinyBound v_u32 (0x34000000 << 1)
47 _ZGVnN4v_expm1f(0x1.85f83p-2) got 0x1.da9f4p-2
48 want 0x1.da9f44p-2. */
78 TEST_SYM_INTERVAL (V_NAME_F1 (expm1), 0, 0x1p-23, 1000)
79 TEST_INTERVAL (V_NAME_F1 (expm1), -0x1p-23, 0x1.5ebc4p+6, 1000000)
80 TEST_INTERVAL (V_NAME_F1 (expm1), -0x1p-23, -0x1.9bbabcp+6, 1000000)
[all …]
/freebsd/contrib/arm-optimized-routines/math/aarch64/experimental/
H A Dexpm1f_1u6.c13 #define Shift (0x1.8p23f)
14 #define InvLn2 (0x1.715476p+0f)
15 #define Ln2hi (0x1.62e4p-1f)
16 #define Ln2lo (0x1.7f7d1cp-20f)
17 #define AbsMask (0x7fffffff)
19 (0x1.644716p6) /* Smallest value of x for which expm1(x) overflows. */
21 (-0x1.9bbabcp+6) /* Largest value of x for which expm1(x) rounds to 1. */
25 expm1f(0x1.8baa96p-2) got 0x1.e2fb9p-2
26 want 0x1.e2fb94p-2. */
33 /* Tiny: |x| < 0x1p-23. expm1(x) is closely approximated by x. in expm1f()
[all …]
H A Dtanhf_2u6.c11 /* 0x1.205966p+3, above which tanhf rounds to 1 (or -1 for negative). */
12 #define BoringBound 0x41102cb3
13 #define AbsMask 0x7fffffff
14 #define One 0x3f800000
16 #define Shift (0x1.8p23f)
17 #define InvLn2 (0x1.715476p+0f)
18 #define Ln2hi (0x1.62e4p-1f)
19 #define Ln2lo (0x1.7f7d1cp-20f)
45 float p_01 = fmaf (f, C (1), C (0)); in expm1f_inline()
59 tanhf(0x1.fa5eep-5) got 0x1.f9ba02p-5
[all …]
/freebsd/contrib/opencsd/decoder/source/i_dec/
H A Dtrc_idec_arminst.cpp48 if ((inst & 0xf0000000) == 0xf0000000) { in inst_ARM_is_direct_branch()
50 if ((inst & 0xfe000000) == 0xfa000000){ in inst_ARM_is_direct_branch()
53 is_direct_branch = 0; in inst_ARM_is_direct_branch()
55 } else if ((inst & 0x0e000000) == 0x0a000000) { in inst_ARM_is_direct_branch()
58 is_direct_branch = 0; in inst_ARM_is_direct_branch()
65 if ( ((inst & 0xf0000000) != 0xf0000000) && in inst_ARM_wfiwfe()
66 ((inst & 0x0ffffffe) == 0x0320f002) in inst_ARM_wfiwfe()
70 return 0; in inst_ARM_wfiwfe()
76 if ((inst & 0xf0000000) == 0xf0000000) { in inst_ARM_is_indirect_branch()
78 if ((inst & 0xfe500000) == 0xf8100000) { in inst_ARM_is_indirect_branch()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/dma/ti/
H A Dk3-udma.yaml56 for source thread IDs (rx): 0 - 0x7fff
57 for destination thread IDs (tx): 0x8000 - 0xffff
164 ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0x0500000
[all...]
/freebsd/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_mips.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
23 PO_ADDIU = 0x24000000, // addiu rt, rs, imm
24 PO_SW = 0xAC000000, // sw rt, offset(sp)
25 PO_LUI = 0x3C000000, // lui rs, %hi(address)
26 PO_ORI = 0x34000000, // ori rt, rs, %lo(address)
27 PO_JALR = 0x0000F809, // jalr rs
28 PO_LW = 0x8C000000, // lw rt, offset(address)
29 PO_B44 = 0x1000000b, // b #44
30 PO_NOP = 0x0, // nop
34 RN_T0 = 0x8,
[all …]
H A Dxray_mips64.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
23 PO_DADDIU = 0x64000000, // daddiu rt, rs, imm
24 PO_SD = 0xFC000000, // sd rt, base(offset)
25 PO_LUI = 0x3C000000, // lui rt, imm
26 PO_ORI = 0x34000000, // ori rt, rs, imm
27 PO_DSLL = 0x00000038, // dsll rd, rt, sa
28 PO_JALR = 0x00000009, // jalr rs
29 PO_LD = 0xDC000000, // ld rt, base(offset)
30 PO_B60 = 0x1000000f, // b #60
31 PO_NOP = 0x0, // nop
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2166x-common.dtsi22 ranges = <0 0x34000000 0x102f83ac>;
28 reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
33 reg = <0x01001f00 0x24>;
38 reg = <0x01003000 0x524>;
51 reg = <0x01006000 0x1c>;
60 ranges = <0 0x3e000000 0x0001c070>;
64 uartb: serial@0 {
66 reg = <0x00000000 0x118>;
76 reg = <0x00001000 0x118>;
86 reg = <0x00002000 0x118>;
[all …]
H A Dbcm11351.dtsi21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0>;
33 secondary-boot-reg = <0x3500417c>;
41 #address-cells = <0>;
43 reg = <0x3ff01000 0x1000>,
44 <0x3ff00100 0x100>;
49 reg = <0x3404c00
[all...]
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dversatile-ab.dts24 reg = <0x0 0x08000000>;
28 #clock-cells = <0>;
38 #size-cells = <0>;
40 port@0 {
41 reg = <0>;
71 reg = <0x10000000 0x200>;
72 ranges = <0x0 0x10000000 0x200>;
76 led@8,0 {
78 reg = <0x08 0x04>;
79 offset = <0x08>;
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/aes/
H A Daestab2.h49 0x00000001, 0x00000002, 0x00000004, 0x00000008,
50 0x00000010, 0x00000020, 0x00000040, 0x00000080,
51 0x0000001b, 0x00000036
57 0x00000063, 0x0000007c, 0x00000077, 0x0000007b,
58 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5,
59 0x00000030, 0x00000001, 0x00000067, 0x0000002b,
60 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076,
61 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d,
62 0x000000fa, 0x00000059, 0x00000047, 0x000000f0,
63 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af,
[all …]
/freebsd/sys/dev/qlxgb/
H A Dqla_misc.c54 #define Q8_ADDR_UNDEFINED 0xFFFFFFFF
61 Q8_ADDR_UNDEFINED, /* 0x00 */
62 0x77300000, /* 0x01 */
63 0x29500000, /* 0x02 */
64 0x2A500000, /* 0x03 */
65 Q8_ADDR_UNDEFINED, /* 0x04 */
66 0x0D000000, /* 0x05 */
67 0x1B100000, /* 0x06 */
68 0x0E600000, /* 0x07 */
69 0x0E000000, /* 0x08 */
[all …]
/freebsd/contrib/llvm-project/lld/ELF/
H A DAArch64ErrataFix.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
54 // | 1 | immlo (2) | 1 | 0 0 0 0 | immhi (19) | Rd (5) |
56 return (instr & 0x9f000000) == 0x90000000; in isADRP()
63 // All loads and stores have 1 (at bit position 27), (0 at bit position 25).
64 // | op0 x op1 (2) | 1 op2 0 op3 (2) | x | op4 (5) | xxxx | op5 (2) | x (10) |
66 return (instr & 0x0a000000) == 0x08000000; in isLoadStoreClass()
70 // | 0 Q 00 | 1100 | 0 L 00 | 0000 | opcode (4) | size (2) | Rn (5) | Rt (5) |
72 // | 0 Q 00 | 1100 | 1 L 0 | Rm (5)| opcode (4) | size (2) | Rn (5) | Rt (5) |
73 // L == 0 for stores.
82 return (instr & 0x0000f000) == 0x00002000 || in isST1MultipleOpcode()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/
H A Daarch64.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
209 /// Fixup <- (((Target + Addend) & ~0xfff) - (Fixup & ~0xfff)) >> 12 : int21
225 /// Fixup <- ((Target + Addend) >> Shift) & 0xfff : uint12
363 constexpr uint32_t LoadStoreImm12Mask = 0x3b000000; in isLoadStoreImm12()
364 return (Instr & LoadStoreImm12Mask) == 0x39000000; in isLoadStoreImm12()
368 constexpr uint32_t TestAndBranchImm14Mask = 0x7e000000; in isTestAndBranchImm14()
369 return (Instr & TestAndBranchImm14Mask) == 0x36000000; in isTestAndBranchImm14()
373 constexpr uint32_t CondBranchImm19Mask = 0xfe000000; in isCondBranchImm19()
374 return (Instr & CondBranchImm19Mask) == 0x54000000; in isCondBranchImm19()
378 constexpr uint32_t CompAndBranchImm19Mask = 0x7e000000; in isCompAndBranchImm19()
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Dmcp_public.h51 #define OFFSIZE_OFFSET_OFFSET 0
52 #define OFFSIZE_OFFSET_MASK 0x0000ffff
55 #define OFFSIZE_SIZE_MASK 0xffff0000
70 u32 speed; /* 0 = autoneg, 1000/10000/20000/25000/40000/50000/100000 */
71 #define ETH_SPEED_AUTONEG 0
72 #define ETH_SPEED_SMARTLINQ 0x8 /* deprecated - use link_modes field instead */
75 #define ETH_PAUSE_NONE 0x0
76 #define ETH_PAUSE_AUTONEG 0x1
77 #define ETH_PAUSE_RX 0x2
78 #define ETH_PAUSE_TX 0x4
[all …]
/freebsd/sys/dev/rl/
H A Dif_rlreg.h36 #define RL_IDR0 0x0000 /* ID register 0 (station addr) */
37 #define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */
38 #define RL_IDR2 0x0002
39 #define RL_IDR3 0x0003
40 #define RL_IDR4 0x0004
41 #define RL_IDR5 0x0005
43 #define RL_MAR0 0x0008 /* Multicast hash table */
44 #define RL_MAR1 0x0009
45 #define RL_MAR2 0x000A
46 #define RL_MAR3 0x000B
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
29 #define GPR_OFFSET_NAME(reg) 0
31 #define FPU_OFFSET_NAME(reg) 0
32 #define EXC_OFFSET_NAME(reg) 0
33 #define DBG_OFFSET_NAME(reg) 0
34 #define DBG_OFFSET_NAME(reg) 0
36 "na", nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex, \
61 #define No_VFP 0
77 static inline bool IsZero(uint64_t x) { return x == 0; } in IsZero()
85 if (shift == 0) in LSL()
[all …]
/freebsd/sys/powerpc/powerpc/
H A Ddb_disasm.c17 Op_A = 0x00000001,
18 Op_B = 0x00000002,
19 Op_BI = 0x00000004,
20 Op_BO = 0x00000008,
22 Op_CRM = 0x00000010,
23 Op_D = 0x00000020,
24 Op_ST = 0x00000020, /* Op_S for store-operations, same as D */
25 Op_S = 0x00000040, /* S-field is swapped with A-field */
27 Op_dA = 0x00000080,
28 Op_LK = 0x00000100,
[all …]

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