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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dti,c64x+megamod-pic.txt7 C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
23 core_pic: interrupt-controller@0 {
62 interrupts 0 - 3 (combined interrupt sources) are
78 reg = <0x1800000 0x1000>;
84 combiner. Combiner-0 is mapped to core interrupt 12, combiner-1 is mapped
92 reg = <0x1800000 0x1000>;
95 ti,c64x+megamod-pic-mux = < 0 0 0 0
96 32 0 0 0
97 0 0 0 0 >;
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dahb.h34 #define ATH10K_GCC_REG_BASE 0x1800000
35 #define ATH10K_GCC_REG_SIZE 0x60000
37 #define ATH10K_TCSR_REG_BASE 0x1900000
38 #define ATH10K_TCSR_REG_SIZE 0x80000
40 #define ATH10K_AHB_GCC_FEPLL_PLL_DIV 0x2f020
41 #define ATH10K_AHB_WIFI_SCRATCH_5_REG 0x4f014
43 #define ATH10K_AHB_WLAN_CORE_ID_REG 0x82030
45 #define ATH10K_AHB_TCSR_WIFI0_GLB_CFG 0x49000
46 #define ATH10K_AHB_TCSR_WIFI1_GLB_CFG 0x49004
49 #define ATH10K_AHB_TCSR_WCSS0_HALTREQ 0x52000
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,gcc-ipq4019.yaml48 reg = <0x1800000 0x60000>;
H A Dqcom,gcc-msm8976.yaml66 reg = <0x1800000 0x80000>;
71 <&dsi0_phy 0>,
73 <&dsi1_phy 0>;
/freebsd/sys/contrib/device-tree/src/c6x/
H A Dtms320c6457.dtsi9 #size-cells = <0>;
11 cpu@0 {
14 reg = <0>;
36 reg = <0x1800000 0x1000>;
41 reg = <0x01840000 0x8400>;
46 reg = <0x02880800 0x400>;
48 ti,dscr-devstat = <0x20>;
49 ti,dscr-silicon-rev = <0x18 28 0xf>;
50 ti,dscr-mac-fuse-regs = <0x114 3 4 5 6
51 0x118 0 0 1 2>;
[all …]
H A Dtms320c6474.dtsi9 #size-cells = <0>;
11 cpu@0 {
13 reg = <0>;
45 reg = <0x1800000 0x1000>;
51 reg = <0x01840000 0x8400>;
56 ti,core-mask = < 0x04 >;
57 reg = <0x2940000 0x40>;
62 ti,core-mask = < 0x02 >;
63 reg = <0x2950000 0x40>;
68 ti,core-mask = < 0x01 >;
[all …]
H A Dtms320c6455.dtsi9 #size-cells = <0>;
11 cpu@0 {
14 reg = <0>;
38 reg = <0x1800000 0x1000>;
44 reg = <0x01840000 0x8400>;
51 reg = <0x70000000 0x100>;
52 ranges = <0x2 0x0 0xa0000000 0x00000008
53 0x3 0x0 0xb0000000 0x00400000
54 0x4 0x0 0xc0000000 0x10000000
55 0x5 0x0 0xD0000000 0x10000000>;
[all …]
H A Dtms320c6472.dtsi9 #size-cells = <0>;
11 cpu@0 {
13 reg = <0>;
60 reg = <0x1800000 0x1000>;
66 reg = <0x01840000 0x8400>;
71 ti,core-mask = < 0x01 >;
72 reg = <0x25e0000 0x40>;
77 ti,core-mask = < 0x02 >;
78 reg = <0x25f0000 0x40>;
83 ti,core-mask = < 0x04 >;
[all …]
H A Dtms320c6678.dtsi9 #size-cells = <0>;
11 cpu@0 {
13 reg = <0>;
70 reg = <0x1800000 0x1000>;
76 reg = <0x01840000 0x8400>;
81 ti,core-mask = < 0x01 >;
82 reg = <0x2280000 0x40>;
87 ti,core-mask = < 0x02 >;
88 reg = <0x2290000 0x40>;
93 ti,core-mask = < 0x04 >;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmscc-ocelot.txt18 - "portX" with X from 0 to the number of last port index available on that
31 - #size-cells: Must be 0
46 reg = <0x1010000 0x10000>,
47 <0x1030000 0x10000>,
48 <0x1080000 0x100>,
49 <0x10e0000 0x10000>,
50 <0x11e0000 0x100>,
51 <0x11f0000 0x100>,
52 <0x1200000 0x100>,
53 <0x1210000 0x100>,
[all …]
H A Dmscc,vsc7514-switch.yaml132 reg = <0x1010000 0x10000>,
133 <0x1030000 0x10000>,
134 <0x1080000 0x100>,
135 <0x10e0000 0x10000>,
136 <0x11e0000 0x10
[all...]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dkirkwood-topkick.dts13 reg = <0x00000000 0x10000000>;
34 pinctrl-0 = <&pmx_sw_left &pmx_sw_right
103 pinctrl-0 = <&pmx_sdio>;
125 pinctrl-0 = <&pmx_led_disk_yellow &pmx_led_sys_red
156 #size-cells = <0>;
157 pinctrl-0 = <&pmx_sata0_pwr_enable>;
169 gpio = <&gpio1 4 0>;
177 partition@0 {
179 reg = <0x0000000 0x180000>;
184 reg = <0x0180000 0x20000>;
[all …]
H A Dkirkwood-netgear_readynas_duo_v2.dts19 reg = <0x00000000 0x10000000>;
78 #clock-cells = <0>;
88 reg = <0x32>;
93 reg = <0x3e>;
95 fan_gear_mode = <0>;
97 pwm_polarity = <0>;
113 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_activity
147 pinctrl-0 = <&pmx_button_power &pmx_button_backup
172 pinctrl-0 = <&pmx_poweroff>;
180 #size-cells = <0>;
[all …]
H A Dkirkwood-netgear_readynas_nv+_v2.dts19 reg = <0x00000000 0x10000000>;
83 #clock-cells = <0>;
93 reg = <0x32>;
98 reg = <0x3e>;
100 fan_gear_mode = <0>;
102 pwm_polarity = <0>;
132 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_backup
171 pinctrl-0 = <&pmx_button_power &pmx_button_backup
196 pinctrl-0 = <&pmx_poweroff>;
204 #size-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/mips/mscc/
H A Docelot.dtsi11 #size-cells = <0>;
13 cpu@0 {
17 reg = <0>;
26 #address-cells = <0>;
34 #clock-cells = <0>;
40 #clock-cells = <0>;
50 ranges = <0 0x70000000 0x2000000>;
54 cpu_ctrl: syscon@0 {
56 reg = <0x0 0x2c>;
61 reg = <0x70 0x70>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8226-samsung-matisse-common.dtsi29 reg = <0x03200000 0x800000>;
82 pinctrl-0 = <&backlight_i2c_default_state>;
88 #size-cells = <0>;
92 reg = <0x2c>;
94 dev-ctrl = /bits/ 8 <0x80>;
95 init-brt = /bits/ 8 <0x3f>;
97 pwms = <&backlight_pwm 0 100000>;
101 rom-addr = /bits/ 8 <0xa0>;
102 rom-val = /bits/ 8 <0x44>;
106 rom-addr = /bits/ 8 <0xa1>;
[all …]
H A Dqcom-apq8026-samsung-milletwifi.dts37 reg = <0x03200000 0x800000>;
90 pinctrl-0 = <&backlight_i2c_default_state>;
96 #size-cells = <0>;
100 reg = <0x2c>;
103 dev-ctrl = /bits/ 8 <0x80>;
104 init-brt = /bits/ 8 <0x3f>;
112 rom-addr = /bits/ 8 <0xa3>;
113 rom-val = /bits/ 8 <0x5e>;
118 * (0, 120deg, 240deg, -, -, -),
122 rom-addr = /bits/ 8 <0xa5>;
[all …]
H A Dqcom-ipq4019.dtsi21 #address-cells = <0x1>;
22 #size-cells = <0x1>;
26 reg = <0x87e00000 0x080000>;
31 reg = <0x87e80000 0x180000>;
45 #size-cells = <0>;
46 cpu@0 {
53 reg = <0x0>;
55 clock-frequency = <0>;
67 reg = <0x1>;
69 clock-frequency = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm845-lg-common.dtsi42 reg = <0 0xb2000000 0 0x1800000>;
47 reg = <0 0x8c415000 0 0x2000>;
52 reg = <0
[all...]
H A Dmsm8994-msft-lumia-octagon.dtsi52 #clock-cells = <0>;
58 pinctrl-0 = <&divclk4_pin_a>;
98 pinctrl-0 = <&hall_front_default &hall_back_default>;
129 reg = <0 0x00200000 0 0x100000>;
134 reg = <0 0x00300000 0 0x80000>;
139 reg = <0 0x00380000 0 0x1000>;
144 reg = <0 0x00381000 0 0x4000>;
149 reg = <0 0x00385000 0 0x1000>;
154 reg = <0 0x00386000 0 0x3000>;
159 reg = <0 0x00389000 0 0x1000>;
[all …]
/freebsd/sys/sys/
H A Dkernel.h96 SI_SUB_DUMMY = 0x0000000, /* not executed; for linker */
97 SI_SUB_TUNABLES = 0x0700000, /* establish tunable values */
98 SI_SUB_COPYRIGHT = 0x0800001, /* first use of console */
99 SI_SUB_VM = 0x1000000, /* virtual memory system init */
100 SI_SUB_COUNTER = 0x1100000, /* counter(9) is initialized */
101 SI_SUB_KMEM = 0x1800000, /* kernel memory */
102 SI_SUB_HYPERVISOR = 0x1A40000, /*
107 SI_SUB_WITNESS = 0x1A80000, /* witness initialization */
108 SI_SUB_MTX_POOL_DYNAMIC = 0x1AC0000, /* dynamic mutex pool */
109 SI_SUB_LOCK = 0x1B00000, /* various locks */
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_hsi_debug_tools.h37 GRCBASE_GRC = 0x50000,
38 GRCBASE_MISCS = 0x9000,
39 GRCBASE_MISC = 0x8000,
40 GRCBASE_DBU = 0xa000,
41 GRCBASE_PGLUE_B = 0x2a8000,
42 GRCBASE_CNIG = 0x218000,
43 GRCBASE_CPMU = 0x30000,
44 GRCBASE_NCSI = 0x40000,
45 GRCBASE_OPTE = 0x53000,
46 GRCBASE_BMB = 0x540000,
[all …]
/freebsd/sys/dev/al_eth/
H A Dal_eth.c96 } while (0)
101 #define PCI_VENDOR_ID_ANNAPURNA_LABS 0x1c36
102 #define PCI_DEVICE_ID_AL_ETH 0x0001
103 #define PCI_DEVICE_ID_AL_ETH_ADVANCED 0x0002
104 #define PCI_DEVICE_ID_AL_ETH_NIC 0x0003
105 #define PCI_DEVICE_ID_AL_ETH_FPGA_NIC 0x0030
106 #define PCI_DEVICE_ID_AL_CRYPTO 0x0011
107 #define PCI_DEVICE_ID_AL_CRYPTO_VF 0x8011
108 #define PCI_DEVICE_ID_AL_RAID_DMA 0x0021
109 #define PCI_DEVICE_ID_AL_RAID_DMA_VF 0x8021
[all …]