1*c66ec88fSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel Vadot/ { 4*c66ec88fSEmmanuel Vadot #address-cells = <1>; 5*c66ec88fSEmmanuel Vadot #size-cells = <1>; 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot cpus { 8*c66ec88fSEmmanuel Vadot #address-cells = <1>; 9*c66ec88fSEmmanuel Vadot #size-cells = <0>; 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot cpu@0 { 12*c66ec88fSEmmanuel Vadot device_type = "cpu"; 13*c66ec88fSEmmanuel Vadot model = "ti,c64x+"; 14*c66ec88fSEmmanuel Vadot reg = <0>; 15*c66ec88fSEmmanuel Vadot }; 16*c66ec88fSEmmanuel Vadot }; 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel Vadot soc { 19*c66ec88fSEmmanuel Vadot compatible = "simple-bus"; 20*c66ec88fSEmmanuel Vadot model = "tms320c6457"; 21*c66ec88fSEmmanuel Vadot #address-cells = <1>; 22*c66ec88fSEmmanuel Vadot #size-cells = <1>; 23*c66ec88fSEmmanuel Vadot ranges; 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel Vadot core_pic: interrupt-controller { 26*c66ec88fSEmmanuel Vadot interrupt-controller; 27*c66ec88fSEmmanuel Vadot #interrupt-cells = <1>; 28*c66ec88fSEmmanuel Vadot compatible = "ti,c64x+core-pic"; 29*c66ec88fSEmmanuel Vadot }; 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel Vadot megamod_pic: interrupt-controller@1800000 { 32*c66ec88fSEmmanuel Vadot compatible = "ti,c64x+megamod-pic"; 33*c66ec88fSEmmanuel Vadot interrupt-controller; 34*c66ec88fSEmmanuel Vadot #interrupt-cells = <1>; 35*c66ec88fSEmmanuel Vadot interrupt-parent = <&core_pic>; 36*c66ec88fSEmmanuel Vadot reg = <0x1800000 0x1000>; 37*c66ec88fSEmmanuel Vadot }; 38*c66ec88fSEmmanuel Vadot 39*c66ec88fSEmmanuel Vadot cache-controller@1840000 { 40*c66ec88fSEmmanuel Vadot compatible = "ti,c64x+cache"; 41*c66ec88fSEmmanuel Vadot reg = <0x01840000 0x8400>; 42*c66ec88fSEmmanuel Vadot }; 43*c66ec88fSEmmanuel Vadot 44*c66ec88fSEmmanuel Vadot device-state-controller@2880800 { 45*c66ec88fSEmmanuel Vadot compatible = "ti,c64x+dscr"; 46*c66ec88fSEmmanuel Vadot reg = <0x02880800 0x400>; 47*c66ec88fSEmmanuel Vadot 48*c66ec88fSEmmanuel Vadot ti,dscr-devstat = <0x20>; 49*c66ec88fSEmmanuel Vadot ti,dscr-silicon-rev = <0x18 28 0xf>; 50*c66ec88fSEmmanuel Vadot ti,dscr-mac-fuse-regs = <0x114 3 4 5 6 51*c66ec88fSEmmanuel Vadot 0x118 0 0 1 2>; 52*c66ec88fSEmmanuel Vadot ti,dscr-kick-regs = <0x38 0x83E70B13 53*c66ec88fSEmmanuel Vadot 0x3c 0x95A4F1E0>; 54*c66ec88fSEmmanuel Vadot }; 55*c66ec88fSEmmanuel Vadot 56*c66ec88fSEmmanuel Vadot timer0: timer@2940000 { 57*c66ec88fSEmmanuel Vadot compatible = "ti,c64x+timer64"; 58*c66ec88fSEmmanuel Vadot reg = <0x2940000 0x40>; 59*c66ec88fSEmmanuel Vadot }; 60*c66ec88fSEmmanuel Vadot 61*c66ec88fSEmmanuel Vadot clock-controller@29a0000 { 62*c66ec88fSEmmanuel Vadot compatible = "ti,c6457-pll", "ti,c64x+pll"; 63*c66ec88fSEmmanuel Vadot reg = <0x029a0000 0x200>; 64*c66ec88fSEmmanuel Vadot ti,c64x+pll-bypass-delay = <300>; 65*c66ec88fSEmmanuel Vadot ti,c64x+pll-reset-delay = <24000>; 66*c66ec88fSEmmanuel Vadot ti,c64x+pll-lock-delay = <50000>; 67*c66ec88fSEmmanuel Vadot }; 68*c66ec88fSEmmanuel Vadot }; 69*c66ec88fSEmmanuel Vadot}; 70