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/freebsd/sys/contrib/device-tree/src/arm/vt8500/
H A Dwm8505.dtsi14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0x0 0x0>;
47 reg = <0xd8140000 0x10000>;
56 reg = <0xD8150000 0x10000>;
62 reg = <0xd8110000 0x10000>;
71 reg = <0xd8130000 0x1000>;
74 #size-cells = <0>;
77 #clock-cells = <0>;
83 #clock-cells = <0>;
[all …]
H A Dwm8750.dtsi14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0x0 0x0>;
49 reg = <0xd8140000 0x10000>;
58 reg = <0xD8150000 0x10000>;
64 reg = <0xd8110000 0x10000>;
73 reg = <0xd8130000 0x1000>;
77 #size-cells = <0>;
80 #clock-cells = <0>;
86 #clock-cells = <0>;
[all …]
H A Dvt8500.dtsi14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0x0 0x0>;
45 reg = <0xd8140000 0x10000>;
51 reg = <0xd8110000 0x10000>;
60 reg = <0xd8130000 0x1000>;
64 #size-cells = <0>;
67 #clock-cells = <0>;
73 #clock-cells = <0>;
76 enable-reg = <0x250>;
[all …]
H A Dwm8850.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0x0>;
26 reg = <0x0 0x0>;
46 reg = <0xd8140000 0x10000>;
55 reg = <0xD8150000 0x10000>;
61 reg = <0xd8110000 0x10000>;
70 reg = <0xd8130000 0x1000>;
74 #size-cells = <0>;
77 #clock-cells = <0>;
[all …]
H A Dwm8650.dtsi14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0x0 0x0>;
43 reg = <0xd8140000 0x10000>;
52 reg = <0xD8150000 0x10000>;
58 reg = <0xd8110000 0x10000>;
67 reg = <0xd8130000 0x1000>;
71 #size-cells = <0>;
74 #clock-cells = <0>;
80 #clock-cells = <0>;
[all …]
/freebsd/sys/arm64/broadcom/genet/
H A Dif_genetreg.h38 #define GENET_SYS_REV_CTRL 0x000
41 #define REV_MAJOR 0xf000000
44 #define REV_MINOR 0xf0000
46 #define REV_PHY 0xffff
47 #define GENET_SYS_PORT_CTRL 0x004
49 #define GENET_SYS_RBUF_FLUSH_CTRL 0x008
51 #define GENET_SYS_TBUF_FLUSH_CTRL 0x00c
52 #define GENET_EXT_RGMII_OOB_CTRL 0x08c
57 #define GENET_INTRL2_CPU_STAT 0x200
58 #define GENET_INTRL2_CPU_CLEAR 0x208
[all …]
/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Dvt8500-uart.txt24 reg = <0xd8200000 0x1040>;
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dcdns,xspi.yaml56 #size-cells = <0>;
58 reg = <0x0 0xa0010000 0x0 0x1040>,
59 <0x0 0xb0000000 0x0 0x1000>,
60 <0x0 0xa0020000 0x0 0x100>;
62 interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
65 flash@0 {
68 reg = <0>;
/freebsd/sys/dev/virtio/pci/
H A Dvirtio_pci_var.h40 #define VIRTIO_PCI_VENDORID 0x1AF4
41 #define VIRTIO_PCI_DEVICEID_MIN 0x1000
42 #define VIRTIO_PCI_DEVICEID_LEGACY_MAX 0x103F
43 #define VIRTIO_PCI_DEVICEID_MODERN_MIN 0x1040
44 #define VIRTIO_PCI_DEVICEID_MODERN_MAX 0x107F
47 #define VIRTIO_PCI_ISR_INTR 0x1
49 #define VIRTIO_PCI_ISR_CONFIG 0x2
51 #define VIRTIO_MSI_NO_VECTOR 0xFFFF
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,msm8998-dpu.yaml64 reg = <0x0c901000 0x8f000>,
65 <0x0c9a8e00 0xf0>,
66 <0x0c9b0000 0x2008>,
67 <0x0c9b8000 0x1040>;
78 interrupts = <0>;
[all...]
H A Ddpu-msm8998.yaml62 "^display-controller@[0-9a-f]+$":
121 port@0:
130 - port@0
164 reg = <0x0c900000 0x1000>;
178 iommus = <&mmss_smmu 0>;
185 reg = <0x0c901000 0x8f000>,
186 <0x0c9a8e00 0xf0>,
187 <0x0c9b0000 0x2008>,
188 <0x0c9b8000 0x1040>;
199 interrupts = <0>;
[all …]
H A Dqcom,msm8998-mdss.yaml39 "^display-controller@[0-9a-f]+$":
47 "^dsi@[0-9a-f]+$":
57 "^phy@[0-9a-f]+$":
79 reg = <0x0c900000 0x1000>;
93 iommus = <&mmss_smmu 0>;
100 reg = <0x0c901000 0x8f000>,
101 <0x0c9a8e00 0xf
[all...]
/freebsd/sys/net80211/
H A Dieee80211_wps.h34 #define IEEE80211_WPS_ATTR_AP_CHANNEL 0x1001
35 #define IEEE80211_WPS_ATTR_ASSOC_STATE 0x1002
36 #define IEEE80211_WPS_ATTR_AUTH_TYPE 0x1003
37 #define IEEE80211_WPS_ATTR_AUTH_TYPE_FLAGS 0x1004
38 #define IEEE80211_WPS_ATTR_AUTHENTICATOR 0x1005
39 #define IEEE80211_WPS_ATTR_CONFIG_METHODS 0x1008
40 #define IEEE80211_WPS_ATTR_CONFIG_ERROR 0x1009
41 #define IEEE80211_WPS_ATTR_CONFIRM_URL4 0x100a
42 #define IEEE80211_WPS_ATTR_CONFIRM_URL6 0x100b
43 #define IEEE80211_WPS_ATTR_CONN_TYPE 0x100c
[all …]
/freebsd/sys/dev/qat/include/
H A Dadf_gen4vf_hw_csr_data.h6 #define ADF_RING_CSR_ADDR_OFFSET_GEN4VF 0x0
7 #define ADF_RING_BUNDLE_SIZE_GEN4 0x2000
8 #define ADF_RING_CSR_RING_HEAD 0x0C0
9 #define ADF_RING_CSR_RING_TAIL 0x100
10 #define ADF_RING_CSR_E_STAT 0x14C
11 #define ADF_RING_CSR_RING_CONFIG_GEN4 0x1000
12 #define ADF_RING_CSR_RING_LBASE_GEN4 0x1040
13 #define ADF_RING_CSR_RING_UBASE_GEN4 0x1080
14 #define ADF_RING_CSR_INT_FLAG 0x170
15 #define ADF_RING_CSR_INT_FLAG_AND_COL 0x184
[all …]
/freebsd/sys/libkern/
H A Dcrc16.c32 /* CRC table for the CRC-16. The poly is 0x8005 (x16 + x15 + x2 + 1). */
34 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
35 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
36 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
37 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
38 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
39 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
40 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
41 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
42 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
[all …]
/freebsd/sys/dev/qat/include/common/
H A Dadf_gen4_hw_data.h9 #define ADF_BANK_INT_SRC_SEL_MASK 0x44UL
10 #define ADF_RING_CSR_RING_CONFIG 0x1000
11 #define ADF_RING_CSR_RING_LBASE 0x1040
12 #define ADF_RING_CSR_RING_UBASE 0x1080
13 #define ADF_RING_CSR_RING_HEAD 0x0C0
14 #define ADF_RING_CSR_RING_TAIL 0x100
15 #define ADF_RING_CSR_E_STAT 0x14C
16 #define ADF_RING_CSR_INT_FLAG 0x170
17 #define ADF_RING_CSR_INT_SRCSEL 0x174
18 #define ADF_RING_CSR_INT_COL_CTL 0x180
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/marvell/
H A Dap80x-system-controller.txt14 SYSTEM CONTROLLER 0
24 - 0: reference clock of CPU cluster 0
51 mpp0 0 gpio, sdio(clk), spi0(clk)
91 reg = <0x6f4000 0x1000>;
104 offset = <0x1040>;
108 gpio-ranges = <&ap_pinctrl 0 0 19>;
109 marvell,pwm-offset = <0x10c0>;
146 reg = <0x6f8000 0x1000>;
150 reg = <0x80 0x10>;
177 reg = <0x6f8000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/mxs/
H A Dimx23-pinfunc.h13 #define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
14 #define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
15 #define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
16 #define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
17 #define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
18 #define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
19 #define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
20 #define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
21 #define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
22 #define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
[all …]
H A Dimx28-pinfunc.h13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
/freebsd/contrib/wpa/src/wps/
H A Dwps_defs.h25 #define WPS_VERSION 0x20
56 ATTR_AP_CHANNEL = 0x1001,
57 ATTR_ASSOC_STATE = 0x1002,
58 ATTR_AUTH_TYPE = 0x1003,
59 ATTR_AUTH_TYPE_FLAGS = 0x1004,
60 ATTR_AUTHENTICATOR = 0x1005,
61 ATTR_CONFIG_METHODS = 0x1008,
62 ATTR_CONFIG_ERROR = 0x1009,
63 ATTR_CONFIRM_URL4 = 0x100a,
64 ATTR_CONFIRM_URL6 = 0x100b,
[all …]
/freebsd/sys/dev/eqos/
H A Dif_eqos_reg.h38 #define GMAC_MAC_CONFIGURATION 0x0000
49 #define GMAC_MAC_CONFIGURATION_RE (1U << 0)
50 #define GMAC_MAC_EXT_CONFIGURATION 0x0004
51 #define GMAC_MAC_PACKET_FILTER 0x0008
59 #define GMAC_MAC_PACKET_FILTER_PR (1U << 0)
60 #define GMAC_MAC_WATCHDOG_TIMEOUT 0x000C
61 #define GMAC_MAC_HASH_TABLE_REG0 0x0010
62 #define GMAC_MAC_HASH_TABLE_REG1 0x0014
63 #define GMAC_MAC_VLAN_TAG 0x0050
64 #define GMAC_MAC_Q0_TX_FLOW_CTRL 0x0070
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-ap80x.dtsi41 reg = <0x0 0x4000000 0x0 0x200000>;
46 reg = <0 0x4400000 0 0x1000000>;
62 ranges = <0x0 0x
[all...]
/freebsd/crypto/openssh/
H A Dpkcs11.h208 #define CKN_SURRENDER (0)
224 #define CKF_TOKEN_PRESENT (1 << 0)
253 #define CKF_RNG (1 << 0)
273 #define CK_EFFECTIVELY_INFINITE (0)
278 #define CK_INVALID_HANDLE (0)
283 #define CKU_SO (0)
290 #define CKS_RO_PUBLIC_SESSION (0)
314 #define CKO_DATA (0)
335 #define CKK_RSA (0)
342 #define CKK_GENERIC_SECRET (0x10)
[all …]
/freebsd/crypto/heimdal/lib/hx509/ref/
H A Dpkcs11.h207 #define CKN_SURRENDER (0)
223 #define CKF_TOKEN_PRESENT (1 << 0)
252 #define CKF_RNG (1 << 0)
272 #define CK_EFFECTIVELY_INFINITE (0)
277 #define CK_INVALID_HANDLE (0)
282 #define CKU_SO (0)
289 #define CKS_RO_PUBLIC_SESSION (0)
313 #define CKO_DATA (0)
334 #define CKK_RSA (0)
341 #define CKK_GENERIC_SECRET (0x10)
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2g-ice.dts18 reg = <0x00000008 0x00000000 0x00000000 0x20000000>;
28 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
128 <&pca9536 0 GPIO_ACTIVE_HIGH>;
129 linux,axis = <0>; /* ABS_X */
136 pinctrl-0 = <&user_leds>;
223 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
224 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
230 K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */
231 K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */
232 K2G_CORE_IOPAD(0x120c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d0.qspi_d0 */
[all …]

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