Lines Matching +full:0 +full:x1040
14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0x0 0x0>;
49 reg = <0xd8140000 0x10000>;
58 reg = <0xD8150000 0x10000>;
64 reg = <0xd8110000 0x10000>;
73 reg = <0xd8130000 0x1000>;
77 #size-cells = <0>;
80 #clock-cells = <0>;
86 #clock-cells = <0>;
92 #clock-cells = <0>;
95 reg = <0x200>;
99 #clock-cells = <0>;
102 reg = <0x204>;
106 #clock-cells = <0>;
109 reg = <0x208>;
113 #clock-cells = <0>;
116 reg = <0x20C>;
120 #clock-cells = <0>;
123 reg = <0x210>;
127 #clock-cells = <0>;
130 divisor-reg = <0x300>;
134 #clock-cells = <0>;
137 divisor-reg = <0x304>;
141 #clock-cells = <0>;
144 divisor-reg = <0x320>;
148 #clock-cells = <0>;
151 divisor-reg = <0x310>;
155 #clock-cells = <0>;
158 enable-reg = <0x254>;
163 #clock-cells = <0>;
166 enable-reg = <0x254>;
171 #clock-cells = <0>;
174 enable-reg = <0x254>;
179 #clock-cells = <0>;
182 enable-reg = <0x254>;
187 #clock-cells = <0>;
190 enable-reg = <0x254>;
195 #clock-cells = <0>;
198 enable-reg = <0x254>;
203 #clock-cells = <0>;
206 divisor-reg = <0x350>;
207 enable-reg = <0x250>;
212 #clock-cells = <0>;
215 divisor-reg = <0x330>;
216 divisor-mask = <0x3f>;
217 enable-reg = <0x250>;
218 enable-bit = <0>;
222 #clock-cells = <0>;
225 divisor-reg = <0x3A0>;
226 enable-reg = <0x250>;
231 #clock-cells = <0>;
234 divisor-reg = <0x3A4>;
235 enable-reg = <0x250>;
244 reg = <0xd8220000 0x100>;
250 reg = <0xd8130100 0x28>;
256 reg = <0xd8007900 0x200>;
262 reg = <0xd8007b00 0x200>;
268 reg = <0xd8008d00 0x200>;
274 reg = <0xd8200000 0x1040>;
282 reg = <0xd82b0000 0x1040>;
290 reg = <0xd8210000 0x1040>;
298 reg = <0xd82c0000 0x1040>;
306 reg = <0xd8370000 0x1040>;
314 reg = <0xd8380000 0x1040>;
322 reg = <0xd8100000 0x10000>;
328 reg = <0xd800a000 0x1000>;
337 reg = <0xd8280000 0x1000>;
345 reg = <0xd8320000 0x1000>;