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/linux/arch/arm/mach-omap2/
H A Domap-headsmp.S22 #define AUX_CORE_BOOT0_PA 0x48281800
23 #define API_HYP_ENTRY 0x102
46 mrc p15, 0, r4, c0, c0, 5
47 and r4, r4, #0x0f
64 mrc p15, 0, r4, c0, c0, 5
65 and r4, r4, #0x0f
70 smc #0
82 hold: ldr r12,=0x103
84 smc #0 @ read from AuxCoreBoot0
86 mrc p15, 0, r4, c0, c0, 5
[all …]
H A Domap-smc.S30 smc #0
46 mov r1, #0x0 @ Process ID
47 mov r6, #0xff
48 mov r12, #0x00 @ Secure Service ID
49 mov r7, #0
50 mcr p15, 0, r7, c7, c5, 6
53 smc #0
68 mov r6, #0xff @ Indicate new Task call
76 ldr r12, =0x104
78 smc #0
[all …]
/linux/tools/perf/pmu-events/
H A Dempty-pmu-events.c22 /* offset=0 */ "default_core\000"
23 /* offset=13 */ "l1-dcache\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
24 /* offset=99 */ "l1-dcache-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
25 /* offset=190 */ "l1-dcache-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
26 /* offset=286 */ "l1-dcache-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
27 /* offset=387 */ "l1-dcache-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
28 /* offset=482 */ "l1-dcache-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
29 /* offset=580 */ "l1-dcache-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00000\000\000\000\000\000"
30 /* offset=682 */ "l1-dcache-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"
31 /* offset=782 */ "l1-dcache-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\00
[all...]
/linux/drivers/media/usb/au0828/
H A Dau0828-reg.h11 #define REG_000 0x000
12 #define REG_001 0x001
13 #define REG_002 0x002
14 #define REG_003 0x003
16 #define AU0828_SENSORCTRL_100 0x100
17 #define AU0828_SENSORCTRL_VBI_103 0x103
20 #define AU0828_I2C_TRIGGER_200 0x200
21 #define AU0828_I2C_STATUS_201 0x201
22 #define AU0828_I2C_CLK_DIVIDER_202 0x202
23 #define AU0828_I2C_DEST_ADDR_203 0x203
[all …]
/linux/include/linux/mfd/
H A Didt82p33_reg.h10 #define REG_ADDR(page, offset) (((page) << 0x7) | ((offset) & 0x7f))
13 #define DPLL1_TOD_CNFG 0x134
14 #define DPLL2_TOD_CNFG 0x1B4
16 #define DPLL1_TOD_STS 0x10B
17 #define DPLL2_TOD_STS 0x18B
19 #define DPLL1_TOD_TRIGGER 0x115
20 #define DPLL2_TOD_TRIGGER 0x195
22 #define DPLL1_OPERATING_MODE_CNFG 0x120
23 #define DPLL2_OPERATING_MODE_CNFG 0x1A0
25 #define DPLL1_HOLDOVER_FREQ_CNFG 0x12C
[all …]
/linux/sound/soc/qcom/qdsp6/
H A Dq6prm.h7 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT 0x100
9 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_EBIT 0x101
11 #define Q6PRM_LPASS_CLK_ID_SEC_MI2S_IBIT 0x102
13 #define Q6PRM_LPASS_CLK_ID_SEC_MI2S_EBIT 0x103
15 #define Q6PRM_LPASS_CLK_ID_TER_MI2S_IBIT 0x104
17 #define Q6PRM_LPASS_CLK_ID_TER_MI2S_EBIT 0x105
19 #define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_IBIT 0x106
21 #define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_EBIT 0x107
23 #define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_IBIT 0x108
25 #define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_EBIT 0x109
[all …]
/linux/tools/perf/pmu-events/arch/arm64/ampere/emag/
H A Dcache.json79 "EventCode": "0x34",
85 "EventCode": "0x35",
91 "EventCode": "0x102",
97 "EventCode": "0x103",
103 "EventCode": "0x104",
109 "EventCode": "0x105",
115 "EventCode": "0x106",
121 "EventCode": "0x107",
127 "EventCode": "0x111",
132 "PublicDescription": "Page walk cache level-0 stage-1 hit",
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-foxg20.dts21 reg = <0x20000000 0x4000000>;
37 timer@0 {
39 reg = <0>, <1>;
54 pinctrl-0 = <
68 pinctrl-0 =
121 pinctrl_i2c0: i2c0-0 {
140 i2c-gpio-0 {
142 pinctrl-0 = <&pinctrl_i2c0>;
164 linux,code = <0x103>;
H A Dat91sam9260ek.dts21 reg = <0x20000000 0x4000000>;
37 timer@0 {
39 reg = <0>, <1>;
54 pinctrl-0 = <
69 pinctrl-0 =
85 pinctrl-0 = <&pinctrl_ssc0_tx>;
94 cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
121 atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
153 linux,code = <0x103>;
165 i2c-gpio-0 {
[all …]
H A Dat91-kizbox3-hs.dts41 pinctrl-0 = <&pinctrl_led_red
62 pinctrl-0 = <&pinctrl_key_gpio_default>;
74 linux,code = <0x101>;
81 linux,code = <0x102>;
88 linux,code = <0x103>;
95 linux,code = <0x107>;
102 linux,code = <0x108>;
154 label = "io boot 0";
/linux/include/uapi/sound/
H A Dskl-tplg-interface.h16 * Default types range from 0~12. type can range from 0 to 0xff
19 #define SKL_CONTROL_TYPE_BYTE_TLV 0x100
20 #define SKL_CONTROL_TYPE_MIC_SELECT 0x102
21 #define SKL_CONTROL_TYPE_MULTI_IO_SELECT 0x103
22 #define SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC 0x104
30 /* Reserve event type 0 for no event handlers */
32 SKL_EVENT_NONE = 0,
57 SKL_CH_CFG_MONO = 0,
75 SKL_MODULE_TYPE_MIXER = 0,
86 SKL_AFFINITY_CORE_0 = 0,
[all …]
/linux/arch/powerpc/include/asm/
H A Dreg_fsl_emb.h38 #define PMRN_PMC0 0x010 /* Performance Monitor Counter 0 */
39 #define PMRN_PMC1 0x011 /* Performance Monitor Counter 1 */
40 #define PMRN_PMC2 0x012 /* Performance Monitor Counter 2 */
41 #define PMRN_PMC3 0x013 /* Performance Monitor Counter 3 */
42 #define PMRN_PMC4 0x014 /* Performance Monitor Counter 4 */
43 #define PMRN_PMC5 0x015 /* Performance Monitor Counter 5 */
44 #define PMRN_PMLCA0 0x090 /* PM Local Control A0 */
45 #define PMRN_PMLCA1 0x091 /* PM Local Control A1 */
46 #define PMRN_PMLCA2 0x092 /* PM Local Control A2 */
47 #define PMRN_PMLCA3 0x093 /* PM Local Control A3 */
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-mpic4.3.dtsi2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
37 #address-cells = <0>;
39 reg = <0x40000 0x40000>;
42 clock-frequency = <0x0>;
47 reg = <0x41100 0x100 0x41300 4>;
48 interrupts = <0 0 3 0
49 1 0 3 0
50 2 0 3 0
51 3 0 3 0>;
56 reg = <0x41600 0x200 0x44148 4>;
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dqcom,spmi-adc5-gen3.yaml38 const: 0
53 "^channel@[0-9a-f]+$":
102 #size-cells = <0>;
106 reg = <0x9000>, <0x9100>;
107 interrupts = <0x0 0x90 0x1 IRQ_TYPE_EDGE_RISING>,
108 <0x0 0x91 0x1 IRQ_TYPE_EDGE_RISING>;
110 #size-cells = <0>;
116 reg = <0x3>;
122 reg = <0x44>;
132 reg = <0x103>;
[all …]
/linux/include/scsi/fc/
H A Dfc_ms.h25 #define FC_FDMI_SUBTYPE 0x10 /* fs_ct_hdr.ct_fs_subtype */
37 FC_FDMI_GRHL = 0x0100, /* Get Registered HBA List */
38 FC_FDMI_GHAT = 0x0101, /* Get HBA Attributes */
39 FC_FDMI_GRPL = 0x0102, /* Get Registered Port List */
40 FC_FDMI_GPAT = 0x0110, /* Get Port Attributes */
41 FC_FDMI_RHBA = 0x0200, /* Register HBA */
42 FC_FDMI_RHAT = 0x0201, /* Register HBA Attributes */
43 FC_FDMI_RPRT = 0x0210, /* Register Port */
44 FC_FDMI_RPA = 0x0211, /* Register Port Attributes */
45 FC_FDMI_DHBA = 0x0300, /* Deregister HBA */
[all …]
/linux/drivers/media/pci/tw686x/
H A Dtw686x-regs.h6 a0 + 8, a0 + 0xa, a0 + 0xc, a0 + 0xe})
7 #define REG8_8(a0) ((const u16[8]) { a0, a0 + 8, a0 + 0x10, a0 + 0x18, \
8 a0 + 0x20, a0 + 0x28, a0 + 0x30, \
9 a0 + 0x38})
10 #define INT_STATUS 0x00
11 #define PB_STATUS 0x01
12 #define DMA_CMD 0x02
13 #define VIDEO_FIFO_STATUS 0x03
14 #define VIDEO_CHANNEL_ID 0x04
15 #define VIDEO_PARSER_STATUS 0x05
[all …]
/linux/tools/perf/pmu-events/arch/nds32/n13/
H A Datcpmu.json4 "EventCode": "0x102",
10 "EventCode": "0x103",
16 "EventCode": "0x104",
22 "EventCode": "0x105",
28 "EventCode": "0x106",
34 "EventCode": "0x107",
40 "EventCode": "0x108",
46 "EventCode": "0x109",
52 "EventCode": "0x10a",
58 "EventCode": "0x10b",
[all …]
/linux/arch/arm/boot/dts/intel/axm/
H A Daxm5516-cpus.dtsi11 #size-cells = <0>;
72 CPU0: cpu@0 {
75 reg = <0x00>;
77 cpu-release-addr = <0>; // Fixed by the boot loader
83 reg = <0x01>;
85 cpu-release-addr = <0>; // Fixed by the boot loader
91 reg = <0x02>;
93 cpu-release-addr = <0>; // Fixed by the boot loader
99 reg = <0x03>;
101 cpu-release-addr = <0>; // Fixed by the boot loader
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4.dtsi19 #size-cells = <0>;
58 cpu0: cpu@0 {
60 reg = <0x000>;
63 i-cache-size = <0xc000>;
66 d-cache-size = <0x8000>;
74 reg = <0x001>;
77 i-cache-size = <0xc000>;
80 d-cache-size = <0x8000>;
88 reg = <0x002>;
91 i-cache-size = <0xc000>;
[all …]
/linux/arch/arm64/boot/dts/amd/
H A Delba-16core.dtsi9 #size-cells = <0>;
41 /* CLUSTER 0 */
42 cpu0: cpu@0 {
45 reg = <0x0>;
53 reg = <0x1>;
61 reg = <0x2>;
69 reg = <0x3>;
84 reg = <0x100>;
92 reg = <0x101>;
100 reg = <0x102>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-cpus.dtsi22 #size-cells = <0>;
59 reg = <0x100>;
72 reg = <0x101>;
85 reg = <0x102>;
98 reg = <0x103>;
108 cpu4: cpu@0 {
111 reg = <0x0>;
124 reg = <0x1>;
137 reg = <0x2>;
150 reg = <0x3>;
H A Dexynos5420-cpus.dtsi23 #size-cells = <0>;
57 cpu0: cpu@0 {
60 reg = <0x0>;
72 reg = <0x1>;
84 reg = <0x2>;
96 reg = <0x3>;
108 reg = <0x100>;
120 reg = <0x101>;
132 reg = <0x102>;
144 reg = <0x103>;
/linux/lib/crypto/
H A Dcurve25519-fiat32.c18 * entries t[0]...t[9], represents the integer t[0]+2^26 t[1]+2^51 t[2]+2^77
41 h[0] = a0&((1<<26)-1); /* 26 used, 32-26 left. 26 */ in fe_frombytes_impl()
104 t = -!!t; /* all set if nonzero, 0 if 0 */ in cmovznz32()
119 { const u32 x2 = in1[0]; in fe_freeze()
120 { u32 x20; u8/*bool*/ x21 = subborrow_u26(0x0, x2, 0x3ffffed, &x20); in fe_freeze()
121 { u32 x23; u8/*bool*/ x24 = subborrow_u25(x21, x4, 0x1ffffff, &x23); in fe_freeze()
122 { u32 x26; u8/*bool*/ x27 = subborrow_u26(x24, x6, 0x3ffffff, &x26); in fe_freeze()
123 { u32 x29; u8/*bool*/ x30 = subborrow_u25(x27, x8, 0x1ffffff, &x29); in fe_freeze()
124 { u32 x32; u8/*bool*/ x33 = subborrow_u26(x30, x10, 0x3ffffff, &x32); in fe_freeze()
125 { u32 x35; u8/*bool*/ x36 = subborrow_u25(x33, x12, 0x1ffffff, &x35); in fe_freeze()
[all …]
/linux/drivers/staging/fbtft/
H A Dfb_bd663474.c31 write_reg(par, 0x000, 0x0001); /*oscillator 0: stop, 1: operation */ in init_display()
35 write_reg(par, 0x100, 0x0000); /* power supply setup */ in init_display()
36 write_reg(par, 0x101, 0x0000); in init_display()
37 write_reg(par, 0x102, 0x3110); in init_display()
38 write_reg(par, 0x103, 0xe200); in init_display()
39 write_reg(par, 0x110, 0x009d); in init_display()
40 write_reg(par, 0x111, 0x0022); in init_display()
41 write_reg(par, 0x100, 0x0120); in init_display()
44 write_reg(par, 0x100, 0x3120); in init_display()
47 write_reg(par, 0x001, 0x0100); in init_display()
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dfsl,mpic-msi.yaml145 reg = <0x41600 0x80>;
146 msi-available-ranges = <0 0x100>;
147 interrupts = <0xe0 0>, <0xe1 0>, <0xe2 0>, <0xe3 0>,
148 <0xe4 0>, <0xe5 0>, <0xe6 0>, <0xe7 0>;
154 reg = <0x41600 0x200>, <0x44148 4>;
155 interrupts = <0xe0 0 0 0>, <0xe1 0 0 0>, <0xe2 0 0 0>, <0xe3 0 0 0>,
156 <0xe4 0 0 0>, <0xe5 0 0 0>, <0xe6 0 0 0>, <0xe7 0 0 0>,
157 <0x100 0 0 0>, <0x101 0 0 0>, <0x102 0 0 0>, <0x103 0 0 0>,
158 <0x104 0 0 0>, <0x105 0 0 0>, <0x106 0 0 0>, <0x107 0 0 0>;

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