xref: /linux/Documentation/devicetree/bindings/iio/adc/qcom,spmi-adc5-gen3.yaml (revision cb4eb6771c0f8fd1c52a8f6fdec7762fb087380a)

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-adc5-gen3.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm's SPMI PMIC ADC5 Gen3

maintainers:
  - Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>

description: |
  SPMI PMIC5 Gen3 voltage ADC (ADC) provides interface to clients to read
  voltage. It is a 16-bit sigma-delta ADC. It also performs the same thermal
  monitoring function as the existing ADC_TM devices.

  The interface is implemented on SDAM (Shared Direct Access Memory) peripherals
  on the master PMIC rather than a dedicated ADC peripheral. The number of PMIC
  SDAM peripherals allocated for ADC is not correlated with the PMIC used, it is
  programmed in FW (PBS) and is fixed per SOC, based on the SOC requirements.
  All boards using a particular (SOC + master PMIC) combination will have the
  same number of ADC SDAMs supported on that PMIC.

properties:
  compatible:
    const: qcom,spmi-adc5-gen3

  reg:
    items:
      - description: SDAM0 base address in the SPMI PMIC register map
      - description: SDAM1 base address
    minItems: 1

  "#address-cells":
    const: 1

  "#size-cells":
    const: 0

  "#io-channel-cells":
    const: 1

  "#thermal-sensor-cells":
    const: 1

  interrupts:
    items:
      - description: SDAM0 end of conversion (EOC) interrupt
      - description: SDAM1 EOC interrupt
    minItems: 1

patternProperties:
  "^channel@[0-9a-f]+$":
    type: object
    unevaluatedProperties: false
    $ref: /schemas/iio/adc/qcom,spmi-vadc-common.yaml
    description:
      Represents the external channels which are connected to the ADC.

    properties:
      qcom,decimation:
        enum: [ 85, 340, 1360 ]
        default: 1360

      qcom,hw-settle-time:
        enum: [ 15, 100, 200, 300, 400, 500, 600, 700,
                1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000 ]
        default: 15

      qcom,avg-samples:
        enum: [ 1, 2, 4, 8, 16 ]
        default: 1

      qcom,adc-tm:
        description:
          ADC_TM is a threshold monitoring feature in HW which can be enabled
          on any ADC channel, to trigger an IRQ for threshold violation. In
          earlier ADC generations, it was implemented in a separate device
          (documented in Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml.)
          In Gen3, this feature can be enabled in the same ADC device for any
          channel and threshold monitoring and IRQ triggering are handled in FW
          (PBS) instead of another dedicated HW block.
          This property indicates ADC_TM monitoring is done on this channel.
        type: boolean

required:
  - compatible
  - reg
  - "#address-cells"
  - "#size-cells"
  - "#io-channel-cells"
  - interrupts

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>

    pmic {
      #address-cells = <1>;
      #size-cells = <0>;

      adc@9000 {
        compatible = "qcom,spmi-adc5-gen3";
        reg = <0x9000>, <0x9100>;
        interrupts = <0x0 0x90 0x1 IRQ_TYPE_EDGE_RISING>,
                      <0x0 0x91 0x1 IRQ_TYPE_EDGE_RISING>;
        #address-cells = <1>;
        #size-cells = <0>;
        #io-channel-cells = <1>;
        #thermal-sensor-cells = <1>;

        /* PMK8550 Channel nodes */
        channel@3 {
          reg = <0x3>;
          label = "pmk8550_die_temp";
          qcom,pre-scaling = <1 1>;
        };

        channel@44 {
          reg = <0x44>;
          label = "pmk8550_xo_therm";
          qcom,pre-scaling = <1 1>;
          qcom,ratiometric;
          qcom,hw-settle-time = <200>;
          qcom,adc-tm;
        };

        /* PM8550 Channel nodes */
        channel@103 {
          reg = <0x103>;
          label = "pm8550_die_temp";
          qcom,pre-scaling = <1 1>;
        };

        /* PM8550B Channel nodes */
        channel@78f {
          reg = <0x78f>;
          label = "pm8550b_vbat_sns_qbg";
          qcom,pre-scaling = <1 3>;
        };

        /* PM8550VS_C Channel nodes */
        channel@203 {
          reg = <0x203>;
          label = "pm8550vs_c_die_temp";
          qcom,pre-scaling = <1 1>;
        };
      };
    };