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/freebsd/sys/contrib/device-tree/Bindings/soc/sprd/
H A Dsprd,sc9863a-glbregs.yaml33 "@[0-9a-f]+$":
43 reg = <0x20e00000 0x4000>;
44 ranges = <0 0x20e00000 0x4000>;
48 apahb_gate: apahb-gate@0 {
50 reg = <0x0 0x1020>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dsprd,sc9863a-clk.yaml81 reg = <0x21500000 0x1000>;
90 reg = <0x20e00000 0x4000>;
93 ranges = <0 0x20e00000 0x4000>;
95 apahb_gate: apahb-gate@0 {
97 reg = <0x0 0x102
[all...]
/freebsd/sys/net80211/
H A Dieee80211_wps.h34 #define IEEE80211_WPS_ATTR_AP_CHANNEL 0x1001
35 #define IEEE80211_WPS_ATTR_ASSOC_STATE 0x1002
36 #define IEEE80211_WPS_ATTR_AUTH_TYPE 0x1003
37 #define IEEE80211_WPS_ATTR_AUTH_TYPE_FLAGS 0x1004
38 #define IEEE80211_WPS_ATTR_AUTHENTICATOR 0x1005
39 #define IEEE80211_WPS_ATTR_CONFIG_METHODS 0x1008
40 #define IEEE80211_WPS_ATTR_CONFIG_ERROR 0x1009
41 #define IEEE80211_WPS_ATTR_CONFIRM_URL4 0x100a
42 #define IEEE80211_WPS_ATTR_CONFIRM_URL6 0x100b
43 #define IEEE80211_WPS_ATTR_CONN_TYPE 0x100c
[all …]
/freebsd/sys/powerpc/include/
H A Dopenpicreg.h34 #define OPENPIC_SIZE 0x40000
37 * Per Processor Registers [private access] (0x00000 - 0x00fff)
41 #define OPENPIC_IPI_DISPATCH(ipi) (0x40 + (ipi) * 0x10)
44 #define OPENPIC_TPR 0x80
45 #define OPENPIC_TPR_MASK 0x0000000f
47 #define OPENPIC_WHOAMI 0x90
50 #define OPENPIC_IACK 0xa0
53 #define OPENPIC_EOI 0xb0
56 * Global registers (0x01000-0x0ffff)
59 /* feature reporting reg 0 */
[all …]
H A Dtrap.h39 #define EXC_RSVD 0x0000 /* Reserved */
40 #define EXC_RST 0x0100 /* Reset; all but IBM4xx */
41 #define EXC_MCHK 0x0200 /* Machine Check */
42 #define EXC_DSI 0x0300 /* Data Storage Interrupt */
43 #define EXC_DSE 0x0380 /* Data Segment Interrupt */
44 #define EXC_ISI 0x0400 /* Instruction Storage Interrupt */
45 #define EXC_ISE 0x0480 /* Instruction Segment Interrupt */
46 #define EXC_EXI 0x0500 /* External Interrupt */
47 #define EXC_ALI 0x0600 /* Alignment Interrupt */
48 #define EXC_PGM 0x0700 /* Program Interrupt */
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dusb_mac.c11 s8 offset = 0; in mt76x2u_mac_fixup_xtal()
16 offset = eep_val & 0x7f; in mt76x2u_mac_fixup_xtal()
17 if ((eep_val & 0xff) == 0xff) in mt76x2u_mac_fixup_xtal()
18 offset = 0; in mt76x2u_mac_fixup_xtal()
19 else if (eep_val & 0x80) in mt76x2u_mac_fixup_xtal()
20 offset = 0 - offset; in mt76x2u_mac_fixup_xtal()
23 if (eep_val == 0x00 || eep_val == 0xff) { in mt76x2u_mac_fixup_xtal()
25 eep_val &= 0xff; in mt76x2u_mac_fixup_xtal()
27 if (eep_val == 0x00 || eep_val == 0xff) in mt76x2u_mac_fixup_xtal()
28 eep_val = 0x14; in mt76x2u_mac_fixup_xtal()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,lpass-cpu.yaml78 const: 0
81 "^dai-link@[0-9a-f]+$":
254 reg = <0 0x62d87000 0 0x68000>,
255 <0 0x62f00000 0 0x29000>;
258 iommus = <&apps_smmu 0x1020 0>,
259 <&apps_smmu 0x1032 0>;
260 power-domains = <&lpass_hm 0>;
273 interrupts = <0 160 1>,
274 <0 268 1>;
280 #size-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/sprd/
H A Dsharkl3.dtsi22 reg = <0 0x20e00000 0 0x4000>;
25 ranges = <0 0 0x20e00000 0x4000>;
27 apahb_gate: apahb-gate@0 {
29 reg = <0x0 0x1020>;
37 reg = <0 0x402b0000 0 0x4000>;
40 ranges = <0 0 0x402b0000 0x4000>;
42 pmu_gate: pmu-gate@0 {
44 reg = <0 0x1200>;
54 reg = <0 0x402e0000 0 0x4000>;
57 ranges = <0 0 0x402e0000 0x4000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/mxs/
H A Dimx23-pinfunc.h13 #define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
14 #define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
15 #define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
16 #define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
17 #define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
18 #define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
19 #define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
20 #define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
21 #define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
22 #define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
[all …]
H A Dimx28-pinfunc.h13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
/freebsd/contrib/wpa/src/wps/
H A Dwps_defs.h25 #define WPS_VERSION 0x20
56 ATTR_AP_CHANNEL = 0x1001,
57 ATTR_ASSOC_STATE = 0x1002,
58 ATTR_AUTH_TYPE = 0x1003,
59 ATTR_AUTH_TYPE_FLAGS = 0x1004,
60 ATTR_AUTHENTICATOR = 0x1005,
61 ATTR_CONFIG_METHODS = 0x1008,
62 ATTR_CONFIG_ERROR = 0x1009,
63 ATTR_CONFIRM_URL4 = 0x100a,
64 ATTR_CONFIRM_URL6 = 0x100b,
[all …]
/freebsd/sys/arm64/include/
H A Dcmn600_reg.h34 #define CMN600_COMMON_PMU_EVENT_SEL 0x2000 /* rw */
36 #define CMN600_COMMON_PMU_EVENT_SEL_OCC_MASK (0x7UL << 32)
68 #define POR_CFGM_NODE_INFO 0x0000 /* ro */
69 #define POR_CFGM_NODE_INFO_LOGICAL_ID_MASK 0xffff00000000UL
71 #define POR_CFGM_NODE_INFO_NODE_ID_MASK 0xffff0000
73 #define POR_CFGM_NODE_INFO_NODE_TYPE_MASK 0xffff
74 #define POR_CFGM_NODE_INFO_NODE_TYPE_SHIFT 0
76 #define NODE_ID_SUB_MASK 0x3
77 #define NODE_ID_SUB_SHIFT 0
78 #define NODE_ID_PORT_MASK 0x4
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-ccimx6ulsbcpro.dts21 pwms = <&pwm5 0 50000 0>;
22 brightness-levels = <0 4 8 16 32 64 128 255>;
51 pinctrl-0 = <&pinctrl_adc1>;
57 pinctrl-0 = <&pinctrl_flexcan1>;
65 pinctrl-0 = <&pinctrl_flexcan2>;
73 pinctrl-0 = <&pinctrl_ecspi1_master>;
79 pinctrl-0 = <&pinctrl_enet1>;
87 pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
96 #size-cells = <0>;
98 ethphy0: ethernet-phy@0 {
[all …]
/freebsd/sys/dev/et/
H A Dif_etreg.h57 #define ET_PCIR_DEVICE_CAPS 0x4C
58 #define ET_PCIM_DEVICE_CAPS_MAX_PLSZ 0x7 /* Max playload size */
59 #define ET_PCIV_DEVICE_CAPS_PLSZ_128 0x0
60 #define ET_PCIV_DEVICE_CAPS_PLSZ_256 0x1
62 #define ET_PCIR_DEVICE_CTRL 0x50
63 #define ET_PCIM_DEVICE_CTRL_MAX_RRSZ 0x7000 /* Max read request size */
64 #define ET_PCIV_DEVICE_CTRL_RRSZ_2K 0x4000
66 #define ET_PCIR_MAC_ADDR0 0xA4
67 #define ET_PCIR_MAC_ADDR1 0xA8
69 #define ET_PCIR_EEPROM_STATUS 0xB2 /* XXX undocumented */
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeViewSymbols.def3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
27 CV_SYMBOL(S_COMPILE , 0x0001)
28 CV_SYMBOL(S_REGISTER_16t , 0x0002)
29 CV_SYMBOL(S_CONSTANT_16t , 0x0003)
30 CV_SYMBOL(S_UDT_16t , 0x0004)
31 CV_SYMBOL(S_SSEARCH , 0x0005)
32 CV_SYMBOL(S_SKIP , 0x0007)
33 CV_SYMBOL(S_CVRESERVE , 0x0008)
34 CV_SYMBOL(S_OBJNAME_ST , 0x0009)
35 CV_SYMBOL(S_ENDARG , 0x000
[all...]
/freebsd/sys/dev/dwc/
H A Ddwc1000_reg.h37 #define MAC_CONFIGURATION 0x0
47 #define MAC_FRAME_FILTER 0x4
53 #define FRAME_FILTER_PR (1 << 0) /* All Incoming Frames */
54 #define GMAC_MAC_HTHIGH 0x08
55 #define GMAC_MAC_HTLOW 0x0c
56 #define GMII_ADDRESS 0x10
57 #define GMII_ADDRESS_PA_MASK 0x1f /* Phy device */
59 #define GMII_ADDRESS_GR_MASK 0x1f /* Phy register */
61 #define GMII_ADDRESS_CR_MASK 0xf
64 #define GMII_ADDRESS_GB (1 << 0) /* Busy */
[all …]
/freebsd/sys/dev/sec/
H A Dsec.h33 * simultaneously active holding 96 descriptors. Each descriptor can use 0 or
47 #define SEC_20_ID 0x0000000000000040ULL
48 #define SEC_30_ID 0x0030030000000000ULL
49 #define SEC_31_ID 0x0030030100000000ULL
52 #define SEC_MAX_DMA_BLOCK_SIZE 0xFFFF
283 } while (0)
287 for (i = 0; i < SEC_POINTERS; i++) \
289 } while (0)
293 for (i = 0; i < SEC_POINTERS; i++) \
295 } while (0);
[all …]
/freebsd/sys/dev/siis/
H A Dsiis.h30 #define ATA_DATA 0 /* (RW) data */
33 #define ATA_F_DMA 0x01 /* enable DMA */
34 #define ATA_F_OVL 0x02 /* enable overlap */
42 #define ATA_D_LBA 0x40 /* use LBA addressing */
43 #define ATA_D_IBM 0xa0 /* 512 byte sectors, ECC */
48 #define ATA_E_ILI 0x01 /* illegal length */
49 #define ATA_E_NM 0x02 /* no media */
50 #define ATA_E_ABORT 0x04 /* command aborted */
51 #define ATA_E_MCR 0x08 /* media change request */
52 #define ATA_E_IDNF 0x10 /* ID not found */
[all …]
/freebsd/sys/dev/mii/
H A Drgephy.c82 DRIVER_MODULE(rgephy, miibus, rgephy_driver, 0, 0);
120 flags = 0; in rgephy_attach()
125 mii_phy_dev_attach(dev, flags, &rgephy_funcs, 0); in rgephy_attach()
146 return (0); in rgephy_attach()
174 return (0); in rgephy_service()
189 if ((ife->ifm_media & IFM_FLOW) != 0 && in rgephy_service()
190 (mii->mii_media.ifm_media & IFM_FLAG0) != 0) in rgephy_service()
193 if ((ife->ifm_media & IFM_FDX) != 0) { in rgephy_service()
197 if ((ife->ifm_media & IFM_FLOW) != 0 || in rgephy_service()
198 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) in rgephy_service()
[all …]
/freebsd/sys/dev/hdmi/
H A Ddwc_hdmireg.h29 #define HDMI_DESIGN_ID 0x0000
30 #define HDMI_REVISION_ID 0x0001
31 #define HDMI_PRODUCT_ID0 0x0002
32 #define HDMI_PRODUCT_ID1 0x0003
35 #define HDMI_IH_FC_STAT0 0x0100
36 #define HDMI_IH_FC_STAT1 0x0101
37 #define HDMI_IH_FC_STAT2 0x0102
38 #define HDMI_IH_AS_STAT0 0x0103
39 #define HDMI_IH_PHY_STAT0 0x0104
40 #define HDMI_IH_PHY_STAT0_HPD (1 << 0)
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_xmit.c83 q = 0; in ar5210SetupTxQueue()
190 (OS_REG_READ(ah, AR_PHY(17)) & ~0x7F) | 0x38); in ar5210ResetTxQueue()
195 0x2020 | in ar5210ResetTxQueue()
207 (OS_REG_READ(ah, AR_PHY(17)) & ~0x7F) | 0x1C); in ar5210ResetTxQueue()
211 AR_PHY_PARITY_ERR | AR_PHY_TIMING_ERR | 0x1020); in ar5210ResetTxQueue()
275 return 0xffffffff; in ar5210GetTxDP()
289 HALDEBUG(ah, HAL_DEBUG_TXQUEUE, "%s: queue %u 0x%x\n", in ar5210SetTxDP()
301 ath_hal_printf(ah, "%s: TXE asserted; AR_CR=0x%x\n", in ar5210SetTxDP()
421 return 0; in ar5210NumTxPending()
441 for (i = 0; i < 1000; i++) { in ar5210StopTxDma()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynosautov9.dtsi47 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0x0>;
91 reg = <0x100>;
98 reg = <0x200>;
105 reg = <0x300>;
112 reg = <0x10000>;
119 reg = <0x10100>;
126 reg = <0x10200>;
133 reg = <0x10300>;
[all …]
H A Dexynos850.dtsi52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
102 reg = <0x1>;
108 reg = <0x2>;
114 reg = <0x3>;
120 reg = <0x100>;
128 reg = <0x101>;
134 reg = <0x102>;
[all …]
/freebsd/contrib/wpa/src/common/
H A Ddpp.h42 DPP_PA_AUTHENTICATION_REQ = 0,
67 DPP_ATTR_STATUS = 0x1000,
68 DPP_ATTR_I_BOOTSTRAP_KEY_HASH = 0x1001,
69 DPP_ATTR_R_BOOTSTRAP_KEY_HASH = 0x1002,
70 DPP_ATTR_I_PROTOCOL_KEY = 0x1003,
71 DPP_ATTR_WRAPPED_DATA = 0x1004,
72 DPP_ATTR_I_NONCE = 0x1005,
73 DPP_ATTR_I_CAPABILITIES = 0x1006,
74 DPP_ATTR_R_NONCE = 0x1007,
75 DPP_ATTR_R_CAPABILITIES = 0x1008,
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Dpci.h10 #define MDIO_PG0_G1 0
14 #define RAC_CTRL_PPR 0x00
15 #define RAC_ANA03 0x03
17 #define RAC_ANA09 0x09
19 #define RAC_ANA0A 0x0A
21 #define RAC_ANA0C 0x0C
23 #define RAC_ANA0D 0x0D
25 #define RAC_ANA10 0x10
26 #define ADDR_SEL_PINOUT_DIS_VAL 0x3C4
28 #define RAC_REG_REV2 0x1
[all...]

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