/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra30-asus-tf300t.dts | 75 reg = <0x10>; 94 mount-matrix = "0", "-1", "0", 95 "-1", "0", "0", 96 "0", "0", "-1"; 100 mount-matrix = "-1", "0", "0", 101 "0", "1", "0", 102 "0", "0", "-1"; 107 mount-matrix = "0", "-1", "0", 108 "-1", "0", "0", 109 "0", "0", "1"; [all …]
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H A D | tegra30-asus-tf300tg.dts | 22 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>, 171 reg = <0x10>; 190 mount-matrix = "1", "0", "0", 191 "0", "-1", "0", 192 "0", "0", "-1"; 196 mount-matrix = "-1", "0", "0", 197 "0", "1", "0", 198 "0", "0", "-1"; 203 mount-matrix = "0", "-1", "0", 204 "-1", "0", "0", [all …]
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H A D | tegra30-asus-tf700t.dts | 92 reg = <0x10>; 111 mount-matrix = "1", "0", "0", 112 "0", "-1", "0", 113 "0", "0", "-1"; 117 mount-matrix = "0", "1", "0", 118 "1", "0", " [all...] |
H A D | tegra30-asus-tf201.dts | 67 reg = <0x4d>; 82 mount-matrix = "-1", "0", "0", 83 "0", "-1", "0", 84 "0", "0", "-1"; 88 mount-matrix = "0", "-1", "0", 89 "-1", "0", "0", 90 "0", "0", "-1"; 95 mount-matrix = "1", "0", "0", 96 "0", "-1", "0", 97 "0", "0", "1"; [all …]
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H A D | tegra30-lg-p880.dts | 17 pinctrl-0 = <&state_default>; 120 emc-timings-0 { 122 nvidia,ram-code = <0>; 127 nvidia,emem-configuration = < 0x00050001 0xc0000010 128 0x00000001 0x00000001 0x00000002 0x00000000 129 0x00000003 0x00000001 0x00000002 0x00000004 130 0x00000001 0x00000000 0x00000002 0x00000002 131 0x02020001 0x00060402 0x77230303 0x001f0000 >; 137 nvidia,emem-configuration = < 0x00020001 0xc0000010 138 0x00000001 0x00000001 0x00000002 0x00000000 [all …]
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H A D | tegra30-lg-p895.dts | 12 pinctrl-0 = <&state_default>; 123 nvidia,emem-configuration = < 0x00020001 0xc0000010 124 0x00000001 0x00000001 0x00000002 0x00000000 125 0x00000003 0x00000001 0x00000002 0x00000004 126 0x00000001 0x00000000 0x00000002 0x00000002 127 0x02020001 0x00060402 0x77230303 0x001f0000 >; 133 nvidia,emem-configuration = < 0x00030003 0xc0000010 134 0x00000001 0x00000001 0x00000002 0x00000000 135 0x00000003 0x00000001 0x00000002 0x00000004 136 0x00000001 0x00000000 0x00000002 0x00000002 [all …]
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H A D | tegra124-nyan-blaze-emc.dtsi | 92 0x40040001 93 0x8000000a 94 0x00000001 95 0x00000001 96 0x00000002 97 0x00000000 98 0x00000002 99 0x00000001 100 0x00000002 101 0x00000008 [all …]
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H A D | tegra124-apalis-emc.dtsi | 108 0x40040001 0x8000000a 109 0x00000001 0x00000001 110 0x00000002 0x00000000 111 0x00000002 0x00000001 112 0x00000003 0x00000008 113 0x00000003 0x00000002 114 0x00000003 0x00000006 115 0x06030203 0x000a0502 116 0x77e30303 0x70000f03 117 0x001f0000 [all …]
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H A D | tegra124-jetson-tk1-emc.dtsi | 104 0x40040001 105 0x8000000a 106 0x00000001 107 0x00000001 108 0x00000002 109 0x00000000 110 0x00000002 111 0x00000001 112 0x00000003 113 0x00000008 [all …]
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H A D | tegra30-pegatron-chagall.dts | 49 reg = <0x80000000 0x40000000>; 59 alloc-ranges = <0x80000000 0x30000000>; 60 size = <0x10000000>; /* 256MiB */ 67 reg = <0xbeb00000 0x10000>; /* 64kB */ 68 console-size = <0x8000>; /* 32kB */ 69 record-size = <0x400>; /* 1kB */ 74 reg = <0xbfe0000 [all...] |
H A D | tegra30-asus-nexus7-grouper-memory-timings.dtsi | 5 emc-timings-0 { 6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */ 12 0x00020001 /* MC_EMEM_ARB_CFG */ 13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ [all …]
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H A D | tegra124-nyan-big-emc.dtsi | 263 0x40040001 /* MC_EMEM_ARB_CFG */ 264 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */ 265 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 266 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 267 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 268 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 269 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 270 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 271 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 272 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ [all …]
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H A D | tegra30-ouya.dts | 32 tlm,version-major = <0x0>; 33 tlm,version-minor = <0x0>; 38 reg = <0x80000000 0x40000000>; 48 alloc-ranges = <0x80000000 0x30000000>; 49 size = <0x10000000>; /* 256MiB */ 56 reg = <0xbfdf0000 0x10000>; /* 64kB */ 57 console-size = <0x800 [all...] |
/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-xp-crs305-1g-4s-bit.dts | 18 flash@0 { 22 reg = <0>; /* Chip select 0 */ 27 reg = <0x00000000 0x001f0000>; 31 reg = <0x001f0000 0x00010000>; 35 reg = <0x00200000 0x03f00000>; 39 reg = <0x04100000 0x03f00000>;
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H A D | armada-xp-crs326-24g-2s-bit.dts | 18 flash@0 { 22 reg = <0>; /* Chip select 0 */ 27 reg = <0x00000000 0x001f0000>; 31 reg = <0x001f0000 0x00010000>; 35 reg = <0x00200000 0x03f00000>; 39 reg = <0x04100000 0x03f00000>;
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H A D | armada-xp-crs328-4c-20s-4s-bit.dts | 18 flash@0 { 22 reg = <0>; /* Chip select 0 */ 27 reg = <0x00000000 0x001f0000>; 31 reg = <0x001f0000 0x00010000>; 35 reg = <0x00200000 0x03f00000>; 39 reg = <0x04100000 0x03f00000>;
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H A D | armada-xp-crs326-24g-2s.dtsi | 11 * internal registers to 0xf1000000 (instead of the default 12 * 0xd0000000). The 0xf1000000 is the default used by the recent, 15 * left internal registers mapped at 0xd0000000. If you are in this 33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ 50 devbus,badr-skew-ps = <0>; 53 devbus,rd-setup-ps = <0>; 54 devbus,rd-hold-ps = <0>; 57 devbus,sync-enable = <0>; 83 flash@0 { 87 reg = <0>; /* Chip select 0 */ [all …]
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H A D | armada-xp-crs305-1g-4s.dtsi | 11 * internal registers to 0xf1000000 (instead of the default 12 * 0xd0000000). The 0xf1000000 is the default used by the recent, 15 * left internal registers mapped at 0xd0000000. If you are in this 33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ 50 devbus,badr-skew-ps = <0>; 53 devbus,rd-setup-ps = <0>; 54 devbus,rd-hold-ps = <0>; 57 devbus,sync-enable = <0>; 83 flash@0 { 87 reg = <0>; /* Chip select 0 */ [all …]
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H A D | armada-xp-crs328-4c-20s-4s.dtsi | 11 * internal registers to 0xf1000000 (instead of the default 12 * 0xd0000000). The 0xf1000000 is the default used by the recent, 15 * left internal registers mapped at 0xd0000000. If you are in this 33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ 50 devbus,badr-skew-ps = <0>; 53 devbus,rd-setup-ps = <0>; 54 devbus,rd-hold-ps = <0>; 57 devbus,sync-enable = <0>; 83 flash@0 { 87 reg = <0>; /* Chip select 0 */ [all …]
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/freebsd/sys/dev/age/ |
H A D | if_agereg.h | 36 #define VENDORID_ATTANSIC 0x1969 41 #define DEVICEID_ATTANSIC_L1 0x1048 43 #define AGE_VPD_REG_CONF_START 0x0100 44 #define AGE_VPD_REG_CONF_END 0x01FF 45 #define AGE_VPD_REG_CONF_SIG 0x5A 47 #define AGE_SPI_CTRL 0x200 48 #define SPI_STAT_NOT_READY 0x00000001 49 #define SPI_STAT_WR_ENB 0x00000002 50 #define SPI_STAT_WRP_ENB 0x00000080 51 #define SPI_INST_MASK 0x000000FF [all …]
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | qcom,sm7150-gcc.yaml | 45 reg = <0x00100000 0x001f0000>;
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/freebsd/sys/dev/bhnd/cores/chipc/ |
H A D | chipcreg.h | 46 #define CHIPC_GET_FLAG(_value, _flag) (((_value) & _flag) != 0) 50 #define CHIPC_ID 0x00 51 #define CHIPC_CAPABILITIES 0x04 52 #define CHIPC_CORECTRL 0x08 /* rev >= 1 */ 53 #define CHIPC_BIST 0x0C 55 #define CHIPC_OTPST 0x10 /**< otp status */ 56 #define CHIPC_OTPCTRL 0x14 /**< otp control */ 57 #define CHIPC_OTPPROG 0x18 58 #define CHIPC_OTPLAYOUT 0x1C /**< otp layout (IPX OTP) */ 60 #define CHIPC_INTST 0x20 /**< interrupt status */ [all …]
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/freebsd/sys/dev/rtwn/rtl8812a/ |
H A D | r12a_tx_desc.h | 35 #define R12A_FLAGS0_BMCAST 0x01 36 #define R12A_FLAGS0_LSG 0x04 37 #define R12A_FLAGS0_FSG 0x08 38 #define R12A_FLAGS0_OWN 0x80 41 #define R12A_TXDW1_MACID_M 0x0000003f 42 #define R12A_TXDW1_MACID_S 0 43 #define R12A_TXDW1_QSEL_M 0x00001f00 46 #define R12A_TXDW1_QSEL_BE 0x00 /* or 0x03 */ 47 #define R12A_TXDW1_QSEL_BK 0x01 /* or 0x02 */ 48 #define R12A_TXDW1_QSEL_VI 0x04 /* or 0x05 */ [all …]
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | nvidia,tegra124-mc.yaml | 47 "^emc-timings-[0-9]+$": 56 "^timing-[0-9]+$": 118 reg = <0x70019000 0x1000>; 122 interrupts = <0 77 4>; 135 0x40040001 /* MC_EMEM_ARB_CFG */ 136 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */ 137 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 138 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 139 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 140 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
H A D | armada-8040-puzzle-m801.dts | 31 memory@0 { 33 reg = <0x0 0x0 0x0 0x80000000>; 51 pinctrl-0 = <&cp0_xhci_vbus_pins>; 83 tx-fault-gpios = <&sfpplus_gpio 0 GPIO_ACTIVE_HIGH>; 90 pinctrl-0 = <&cp0_sfpplus_led_pins &cp1_sfpplus_led_pins>; 93 led-0 { 96 function-enumerator = <0>; 182 reg = <0x32>; 188 flash@0 { 189 #address-cells = <0x1>; [all …]
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