1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree file for CRS328-4C-20S-4S+ board 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2016 Allied Telesis Labs 6*f126890aSEmmanuel Vadot * Copyright (C) 2020 Sartura Ltd. 7*f126890aSEmmanuel Vadot * 8*f126890aSEmmanuel Vadot * Based on armada-xp-db.dts 9*f126890aSEmmanuel Vadot * 10*f126890aSEmmanuel Vadot * Note: this Device Tree assumes that the bootloader has remapped the 11*f126890aSEmmanuel Vadot * internal registers to 0xf1000000 (instead of the default 12*f126890aSEmmanuel Vadot * 0xd0000000). The 0xf1000000 is the default used by the recent, 13*f126890aSEmmanuel Vadot * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 14*f126890aSEmmanuel Vadot * boards were delivered with an older version of the bootloader that 15*f126890aSEmmanuel Vadot * left internal registers mapped at 0xd0000000. If you are in this 16*f126890aSEmmanuel Vadot * situation, you should either update your bootloader (preferred 17*f126890aSEmmanuel Vadot * solution) or the below Device Tree should be adjusted. 18*f126890aSEmmanuel Vadot */ 19*f126890aSEmmanuel Vadot 20*f126890aSEmmanuel Vadot/dts-v1/; 21*f126890aSEmmanuel Vadot#include "armada-xp-98dx3236.dtsi" 22*f126890aSEmmanuel Vadot 23*f126890aSEmmanuel Vadot/ { 24*f126890aSEmmanuel Vadot model = "CRS328-4C-20S-4S+"; 25*f126890aSEmmanuel Vadot compatible = "mikrotik,crs328-4c-20s-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp"; 26*f126890aSEmmanuel Vadot 27*f126890aSEmmanuel Vadot chosen { 28*f126890aSEmmanuel Vadot bootargs = "console=ttyS0,115200 earlyprintk"; 29*f126890aSEmmanuel Vadot }; 30*f126890aSEmmanuel Vadot 31*f126890aSEmmanuel Vadot memory { 32*f126890aSEmmanuel Vadot device_type = "memory"; 33*f126890aSEmmanuel Vadot reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ 34*f126890aSEmmanuel Vadot }; 35*f126890aSEmmanuel Vadot}; 36*f126890aSEmmanuel Vadot 37*f126890aSEmmanuel Vadot&L2 { 38*f126890aSEmmanuel Vadot arm,parity-enable; 39*f126890aSEmmanuel Vadot marvell,ecc-enable; 40*f126890aSEmmanuel Vadot}; 41*f126890aSEmmanuel Vadot 42*f126890aSEmmanuel Vadot&devbus_bootcs { 43*f126890aSEmmanuel Vadot status = "okay"; 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot /* Device Bus parameters are required */ 46*f126890aSEmmanuel Vadot 47*f126890aSEmmanuel Vadot /* Read parameters */ 48*f126890aSEmmanuel Vadot devbus,bus-width = <16>; 49*f126890aSEmmanuel Vadot devbus,turn-off-ps = <60000>; 50*f126890aSEmmanuel Vadot devbus,badr-skew-ps = <0>; 51*f126890aSEmmanuel Vadot devbus,acc-first-ps = <124000>; 52*f126890aSEmmanuel Vadot devbus,acc-next-ps = <248000>; 53*f126890aSEmmanuel Vadot devbus,rd-setup-ps = <0>; 54*f126890aSEmmanuel Vadot devbus,rd-hold-ps = <0>; 55*f126890aSEmmanuel Vadot 56*f126890aSEmmanuel Vadot /* Write parameters */ 57*f126890aSEmmanuel Vadot devbus,sync-enable = <0>; 58*f126890aSEmmanuel Vadot devbus,wr-high-ps = <60000>; 59*f126890aSEmmanuel Vadot devbus,wr-low-ps = <60000>; 60*f126890aSEmmanuel Vadot devbus,ale-wr-ps = <60000>; 61*f126890aSEmmanuel Vadot}; 62*f126890aSEmmanuel Vadot 63*f126890aSEmmanuel Vadot&uart0 { 64*f126890aSEmmanuel Vadot status = "okay"; 65*f126890aSEmmanuel Vadot}; 66*f126890aSEmmanuel Vadot 67*f126890aSEmmanuel Vadot&uart1 { 68*f126890aSEmmanuel Vadot status = "okay"; 69*f126890aSEmmanuel Vadot}; 70*f126890aSEmmanuel Vadot 71*f126890aSEmmanuel Vadot&i2c0 { 72*f126890aSEmmanuel Vadot clock-frequency = <100000>; 73*f126890aSEmmanuel Vadot status = "okay"; 74*f126890aSEmmanuel Vadot}; 75*f126890aSEmmanuel Vadot 76*f126890aSEmmanuel Vadot&usb0 { 77*f126890aSEmmanuel Vadot status = "okay"; 78*f126890aSEmmanuel Vadot}; 79*f126890aSEmmanuel Vadot 80*f126890aSEmmanuel Vadot&spi0 { 81*f126890aSEmmanuel Vadot status = "okay"; 82*f126890aSEmmanuel Vadot 83*f126890aSEmmanuel Vadot flash@0 { 84*f126890aSEmmanuel Vadot #address-cells = <1>; 85*f126890aSEmmanuel Vadot #size-cells = <1>; 86*f126890aSEmmanuel Vadot compatible = "jedec,spi-nor"; 87*f126890aSEmmanuel Vadot reg = <0>; /* Chip select 0 */ 88*f126890aSEmmanuel Vadot spi-max-frequency = <108000000>; 89*f126890aSEmmanuel Vadot m25p,fast-read; 90*f126890aSEmmanuel Vadot 91*f126890aSEmmanuel Vadot partition@u-boot { 92*f126890aSEmmanuel Vadot reg = <0x00000000 0x001f0000>; 93*f126890aSEmmanuel Vadot label = "u-boot"; 94*f126890aSEmmanuel Vadot }; 95*f126890aSEmmanuel Vadot partition@u-boot-env { 96*f126890aSEmmanuel Vadot reg = <0x001f0000 0x00010000>; 97*f126890aSEmmanuel Vadot label = "u-boot-env"; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot partition@ubi1 { 100*f126890aSEmmanuel Vadot reg = <0x00200000 0x00e00000>; 101*f126890aSEmmanuel Vadot label = "ubi1"; 102*f126890aSEmmanuel Vadot }; 103*f126890aSEmmanuel Vadot }; 104*f126890aSEmmanuel Vadot}; 105