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Searched defs:NBIO_BASE (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.c52 static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0… variable
/linux/drivers/gpu/drm/amd/display/dc/resource/dce120/
H A Ddce120_resource.c129 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/
H A Ddcn201_resource.c282 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c136 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.c164 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.c161 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c129 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c191 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/
H A Ddcn301_resource.c164 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c188 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c205 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c171 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c186 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c177 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c202 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c160 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/include/
H A Dcyan_skillfish_ip_offset.h97 static const struct IP_BASE NBIO_BASE ={ { { { 0x00000000, 0x00000014, 0x00000D20, 0x000… variable
H A Dnavi10_ip_offset.h97 static const struct IP_BASE NBIO_BASE ={ { { { 0x00000000, 0x00000014, 0x00000D20, 0x000… variable
H A Ddimgrey_cavefish_ip_offset.h121 static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0… variable
H A Dvega20_ip_offset.h97 static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0, … variable
H A Dsienna_cichlid_ip_offset.h128 static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0… variable
H A Dvega10_ip_offset.h41 static const struct IP_BASE __maybe_unused NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, … variable
H A Dbeige_goby_ip_offset.h136 static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0… variable
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c165 #define NBIO_BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c185 #define NBIO_BASE(seg) \ macro

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