| 70bb8437 | 23-Mar-2026 |
Felix Gu <ustc.gu@gmail.com> |
PCI/pwrctrl: Fix pci_pwrctrl_is_required() device node leak
The for_each_endpoint_of_node() macro requires calling of_node_put() on the endpoint node when breaking out of the loop early.
Add of_nod
PCI/pwrctrl: Fix pci_pwrctrl_is_required() device node leak
The for_each_endpoint_of_node() macro requires calling of_node_put() on the endpoint node when breaking out of the loop early.
Add of_node_put(endpoint) before the early return to release the reference.
Fixes: cf3287fb2c1f ("PCI/pwrctrl: Ensure that remote endpoint node parent has supply requirement") Signed-off-by: Felix Gu <ustc.gu@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20260323-pwctrl-v1-1-f5c03a2df7fb@gmail.com
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| bd3622e5 | 20-Feb-2026 |
Neil Armstrong <neil.armstrong@linaro.org> |
PCI/pwrctrl: generic: Add UPD720201/UPD720202 USB 3.0 xHCI Host Controller support
Enable the generic pwrctrl driver to control power of PCIe UPD720201/UPD720202 USB 3.0 xHCI Host Controller.
Signe
PCI/pwrctrl: generic: Add UPD720201/UPD720202 USB 3.0 xHCI Host Controller support
Enable the generic pwrctrl driver to control power of PCIe UPD720201/UPD720202 USB 3.0 xHCI Host Controller.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260220-topic-sm8650-ayaneo-pocket-s2-base-v5-4-1ad79caa1efa@linaro.org
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| 0862e2b0 | 20-Feb-2026 |
Neil Armstrong <neil.armstrong@linaro.org> |
PCI/pwrctrl: generic: Simplify dev_err_probe() usage
dev_err_probe() returns the error code passed to it, so this:
dev_err_probe(dev, ret, "Failed to get slot regulators\n"); return ret;
is eq
PCI/pwrctrl: generic: Simplify dev_err_probe() usage
dev_err_probe() returns the error code passed to it, so this:
dev_err_probe(dev, ret, "Failed to get slot regulators\n"); return ret;
is equivalent to this:
return dev_err_probe(dev, ret, "Failed to get slot regulators\n");
Simplify by using the latter.
Suggested-by: Bartosz Golaszewski <brgl@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20260220-topic-sm8650-ayaneo-pocket-s2-base-v5-2-1ad79caa1efa@linaro.org
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| ee226656 | 23-Feb-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Create pwrctrl devices only for PCI device nodes
A PCI host bridge node can have non-PCI child nodes (OPP tables, USB hub, etc.) as well as PCI device child nodes.
Ensure that pwrctrl
PCI/pwrctrl: Create pwrctrl devices only for PCI device nodes
A PCI host bridge node can have non-PCI child nodes (OPP tables, USB hub, etc.) as well as PCI device child nodes.
Ensure that pwrctrl devices are only created for PCI device nodes by checking for the 'pci' prefix in the compatible property.
Fixes: 4c4132489201 ("PCI/pwrctrl: Add APIs to create, destroy pwrctrl devices") Reported-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Closes: https://lore.kernel.org/all/20260212-rb3gen2-upd-gl3590-v1-1-18fb04bb32b0@oss.qualcomm.com Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20260223-pwrctrl-fixes-7-0-v2-2-97566dfb1809@oss.qualcomm.com
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| 9db82620 | 28-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Create pwrctrl device if graph port is found
The devicetree node of the PCIe Root Port/Slot could have the graph port to link the PCIe M.2 connector node. Since the M.2 connectors are m
PCI/pwrctrl: Create pwrctrl device if graph port is found
The devicetree node of the PCIe Root Port/Slot could have the graph port to link the PCIe M.2 connector node. Since the M.2 connectors are modeled as Power Sequencing devices, they need to be controlled by the pwrctrl driver like the Root Port/Slot supplies.
Hence, create the pwrctrl device if the graph port is found in the node.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/20260128-pci-m2-v7-2-9b3a5fe3d244@oss.qualcomm.com
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| 9cb64f61 | 28-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Add PCIe M.2 connector support
Add support for handling PCIe M.2 connectors as Power Sequencing devices. These connectors are exposed as Power Sequencing devices as they often support m
PCI/pwrctrl: Add PCIe M.2 connector support
Add support for handling PCIe M.2 connectors as Power Sequencing devices. These connectors are exposed as Power Sequencing devices as they often support multiple interfaces like PCIe/SATA, USB/UART to the host machine, and the interfaces may be driven by different client drivers at the same time.
This driver handles the PCIe interface of these connectors. It first checks for the presence of the graph port in the Root Port node with the help of of_graph_is_present() API. If present, it acquires/powers ON the corresponding pwrseq device.
Once the pwrseq device is powered ON, the driver will skip parsing the Root Port/Slot resources and register with the pwrctrl framework.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/20260128-pci-m2-v7-1-9b3a5fe3d244@oss.qualcomm.com
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| b921aa3f | 15-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Switch to pwrctrl create, power on/off, destroy APIs
Adopt pwrctrl APIs to create, power on/off, and destroy pwrctrl devices.
In qcom_pcie_host_init(), call pci_pwrctrl_create_devices(
PCI/pwrctrl: Switch to pwrctrl create, power on/off, destroy APIs
Adopt pwrctrl APIs to create, power on/off, and destroy pwrctrl devices.
In qcom_pcie_host_init(), call pci_pwrctrl_create_devices() to create devices, then pci_pwrctrl_power_on_devices() to power them on, both after controller resource initialization. Once successful, deassert PERST# for all devices.
In qcom_pcie_host_deinit(), call pci_pwrctrl_power_off_devices() after asserting PERST#. Note that pci_pwrctrl_destroy_devices() is not called here, as deinit is only invoked during system suspend where device destruction is unnecessary. If the driver becomes removable in future, pci_pwrctrl_destroy_devices() should be called in the remove() handler.
Remove the old pwrctrl framework code from the PCI core (including devlinks) as the new APIs are now the sole consumer of pwrctrl functionality. And also do not power on the pwrctrl drivers during probe() as this is now handled by the APIs.
Co-developed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-12-9d26da3ce903@oss.qualcomm.com
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| b35cf3b6 | 15-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Add APIs to power on/off pwrctrl devices
To fix bridge resource allocation issues when powering PCI bridges with the pwrctrl driver, introduce APIs to explicitly power on and off all re
PCI/pwrctrl: Add APIs to power on/off pwrctrl devices
To fix bridge resource allocation issues when powering PCI bridges with the pwrctrl driver, introduce APIs to explicitly power on and off all related devices simultaneously.
Previously, the individual pwrctrl drivers powered on/off the PCI devices autonomously, without any control from the controller drivers. But to enforce ordering with respect to powering on the devices, these APIs will power on/off all the devices at the same time.
The pci_pwrctrl_power_on_devices() API recursively scans the PCI child nodes, makes sure that pwrctrl drivers are bound to devices, and calls their power_on() callbacks. If any pwrctrl driver is not bound, it will return -EPROBE_DEFER.
Similarly, pci_pwrctrl_power_off_devices() API powers off devices recursively via their power_off() callbacks.
These APIs are expected to be called during the controller probe and suspend/resume time to power on/off the devices. But before calling these APIs, the pwrctrl devices should be created using the pci_pwrctrl_{create/destroy}_devices() APIs.
Co-developed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-11-9d26da3ce903@oss.qualcomm.com
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| 4c413248 | 15-Jan-2026 |
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> |
PCI/pwrctrl: Add APIs to create, destroy pwrctrl devices
Previously, the PCI core created pwrctrl devices during pci_scan_device() on its own and then skipped enumeration of those devices, hoping th
PCI/pwrctrl: Add APIs to create, destroy pwrctrl devices
Previously, the PCI core created pwrctrl devices during pci_scan_device() on its own and then skipped enumeration of those devices, hoping the pwrctrl driver would power them on and trigger a bus rescan.
This approach works for endpoint devices directly connected to Root Ports, but it fails for PCIe switches acting as bus extenders. When the switch requires pwrctrl support and the pwrctrl driver is not available during the pwrctrl device creation, its enumeration will be skipped during the initial PCI bus scan.
This premature scan leads the PCI core to allocate resources (bridge windows, bus numbers) for the upstream bridge based on available downstream buses at scan time. For non-hotplug capable bridges, PCI core typically allocates resources based on the number of buses available during the initial bus scan, which happens to be just one if the switch is not powered on and enumerated at that time. When the switch gets enumerated later on, it will fail due to the lack of upstream resources.
As a result, a PCIe switch powered on by the pwrctrl driver cannot be reliably enumerated currently. Either the switch has to be enabled in the bootloader or the switch pwrctrl driver has to be loaded during the pwrctrl device creation time to work around these issues.
Introduce new APIs to explicitly create and destroy pwrctrl devices from controller drivers by recursively scanning the PCI child nodes of the controller. These APIs allow creating pwrctrl devices based on the original criteria and are intended to be called during controller probe and removal.
These APIs, together with the upcoming APIs for power on/off will allow the controller drivers to power on all the devices before starting the initial bus scan, thereby solving the resource allocation issue.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> [mani: splitted the patch, cleaned up the code, and rewrote description] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-10-9d26da3ce903@oss.qualcomm.com
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| 113f44ed | 15-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: Add 'struct pci_pwrctrl::power_{on/off}' callbacks
To allow the pwrctrl core to control the power on/off sequences of the pwrctrl drivers, add the 'struct pci_pwrctrl::power_{on/off}' c
PCI/pwrctrl: Add 'struct pci_pwrctrl::power_{on/off}' callbacks
To allow the pwrctrl core to control the power on/off sequences of the pwrctrl drivers, add the 'struct pci_pwrctrl::power_{on/off}' callbacks and populate them in the respective pwrctrl drivers.
The pwrctrl drivers still power on the resources on their own now. So there is no functional change.
Co-developed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-9-9d26da3ce903@oss.qualcomm.com
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| 2045c352 | 16-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: pwrseq: Factor out power on/off code to helpers
In order to allow the pwrctrl core to control the power on/off logic of the pwrctrl pwrseq driver, move the power on/off code to pci_pwrc
PCI/pwrctrl: pwrseq: Factor out power on/off code to helpers
In order to allow the pwrctrl core to control the power on/off logic of the pwrctrl pwrseq driver, move the power on/off code to pci_pwrctrl_pwrseq_power_{off/on} helper functions.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com > Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-8-9d26da3ce903@oss.qualcomm.com
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| 0afc90ce | 16-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: slot: Factor out power on/off code to helpers
In order to allow the pwrctrl core to control the power on/off logic of the pwrctrl slot driver, move the power on/off code to pci_pwrctrl_
PCI/pwrctrl: slot: Factor out power on/off code to helpers
In order to allow the pwrctrl core to control the power on/off logic of the pwrctrl slot driver, move the power on/off code to pci_pwrctrl_slot_power_{off/on} helper functions.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-7-9d26da3ce903@oss.qualcomm.com
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| 370d2de0 | 15-Jan-2026 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI/pwrctrl: tc9563: Rename private struct and pointers for consistency
Previously the pwrseq, tc9563, and slot pwrctrl drivers used different naming conventions for their private data structs and p
PCI/pwrctrl: tc9563: Rename private struct and pointers for consistency
Previously the pwrseq, tc9563, and slot pwrctrl drivers used different naming conventions for their private data structs and pointers to them, which makes patches hard to read.
Rename struct and variables to be shorter and more specific:
struct tc9563_pwrctrl_ctx -> struct tc9563_pwrctrl struct tc9563_pwrctrl_ctx *ctx -> struct tc9563_pwrctrl *tc9563
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-6-9d26da3ce903@oss.qualcomm.com
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| c105a3ed | 15-Jan-2026 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI/pwrctrl: tc9563: Add local variables to reduce repetition
Add local struct device * and struct device_node * variables to reduce repetitive pointer chasing. No functional changes intended.
Sig
PCI/pwrctrl: tc9563: Add local variables to reduce repetition
Add local struct device * and struct device_node * variables to reduce repetitive pointer chasing. No functional changes intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-5-9d26da3ce903@oss.qualcomm.com
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| dc534bdc | 15-Jan-2026 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI/pwrctrl: tc9563: Clean up whitespace
Most of pci-pwrctrl-tc9563.c fits in 80 columns. Wrap lines that are gratuitously longer. Whitespace changes only.
Signed-off-by: Bjorn Helgaas <bhelgaas@
PCI/pwrctrl: tc9563: Clean up whitespace
Most of pci-pwrctrl-tc9563.c fits in 80 columns. Wrap lines that are gratuitously longer. Whitespace changes only.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-4-9d26da3ce903@oss.qualcomm.com
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| 99ee5837 | 15-Jan-2026 |
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> |
PCI/pwrctrl: tc9563: Use put_device() instead of i2c_put_adapter()
The API comment for of_find_i2c_adapter_by_node() recommends using put_device() to drop the reference count of I2C adapter instead
PCI/pwrctrl: tc9563: Use put_device() instead of i2c_put_adapter()
The API comment for of_find_i2c_adapter_by_node() recommends using put_device() to drop the reference count of I2C adapter instead of using i2c_put_adapter(). So replace i2c_put_adapter() with put_device().
Fixes: 4c9c7be47310 ("PCI: pwrctrl: Add power control driver for TC9563") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-3-9d26da3ce903@oss.qualcomm.com
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| e40d16e6 | 15-Jan-2026 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI/pwrctrl: slot: Rename private struct and pointers for consistency
Previously the pwrseq, tc9563, and slot pwrctrl drivers used different naming conventions for their private data structs and poi
PCI/pwrctrl: slot: Rename private struct and pointers for consistency
Previously the pwrseq, tc9563, and slot pwrctrl drivers used different naming conventions for their private data structs and pointers to them, which makes patches hard to read.
Rename structs, variables, and functions to reduce boiler-plate and start with "slot":
struct pci_pwrctrl_slot_data -> struct slot_pwrctrl struct pci_pwrctrl ctx -> struct pci_pwrctrl pwrctrl pci_pwrctrl_slot_probe() -> slot_pwrctrl_probe() pci_pwrctrl_slot_of_match[] -> slot_pwrctrl_of_match[] pci_pwrctrl_slot_driver -> slot_pwrctrl_driver devm_pci_pwrctrl_slot_power_off() -> devm_slot_pwrctrl_power_off()
No functional change intended.
[bhelgaas: move "slot" to beginning, also rename functions, etc] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260115-pci-pwrctrl-rework-v5-2-9d26da3ce903@oss.qualcomm.com
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