1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * From setup-res.c, by: 4 * Dave Rusling (david.rusling@reo.mts.dec.com) 5 * David Mosberger (davidm@cs.arizona.edu) 6 * David Miller (davem@redhat.com) 7 * Ivan Kokshaysky (ink@jurassic.park.msu.ru) 8 */ 9 #include <linux/module.h> 10 #include <linux/kernel.h> 11 #include <linux/pci.h> 12 #include <linux/errno.h> 13 #include <linux/ioport.h> 14 #include <linux/of.h> 15 #include <linux/of_platform.h> 16 #include <linux/platform_device.h> 17 #include <linux/proc_fs.h> 18 #include <linux/slab.h> 19 20 #include "pci.h" 21 22 void pci_add_resource_offset(struct list_head *resources, struct resource *res, 23 resource_size_t offset) 24 { 25 struct resource_entry *entry; 26 27 entry = resource_list_create_entry(res, 0); 28 if (!entry) { 29 pr_err("PCI: can't add host bridge window %pR\n", res); 30 return; 31 } 32 33 entry->offset = offset; 34 resource_list_add_tail(entry, resources); 35 } 36 EXPORT_SYMBOL(pci_add_resource_offset); 37 38 void pci_add_resource(struct list_head *resources, struct resource *res) 39 { 40 pci_add_resource_offset(resources, res, 0); 41 } 42 EXPORT_SYMBOL(pci_add_resource); 43 44 void pci_free_resource_list(struct list_head *resources) 45 { 46 resource_list_free(resources); 47 } 48 EXPORT_SYMBOL(pci_free_resource_list); 49 50 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, 51 unsigned int flags) 52 { 53 struct pci_bus_resource *bus_res; 54 55 bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL); 56 if (!bus_res) { 57 dev_err(&bus->dev, "can't add %pR resource\n", res); 58 return; 59 } 60 61 bus_res->res = res; 62 bus_res->flags = flags; 63 list_add_tail(&bus_res->list, &bus->resources); 64 } 65 66 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n) 67 { 68 struct pci_bus_resource *bus_res; 69 70 if (n < PCI_BRIDGE_RESOURCE_NUM) 71 return bus->resource[n]; 72 73 n -= PCI_BRIDGE_RESOURCE_NUM; 74 list_for_each_entry(bus_res, &bus->resources, list) { 75 if (n-- == 0) 76 return bus_res->res; 77 } 78 return NULL; 79 } 80 EXPORT_SYMBOL_GPL(pci_bus_resource_n); 81 82 void pci_bus_remove_resource(struct pci_bus *bus, struct resource *res) 83 { 84 struct pci_bus_resource *bus_res, *tmp; 85 int i; 86 87 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) { 88 if (bus->resource[i] == res) { 89 bus->resource[i] = NULL; 90 return; 91 } 92 } 93 94 list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) { 95 if (bus_res->res == res) { 96 list_del(&bus_res->list); 97 kfree(bus_res); 98 return; 99 } 100 } 101 } 102 103 void pci_bus_remove_resources(struct pci_bus *bus) 104 { 105 int i; 106 struct pci_bus_resource *bus_res, *tmp; 107 108 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) 109 bus->resource[i] = NULL; 110 111 list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) { 112 list_del(&bus_res->list); 113 kfree(bus_res); 114 } 115 } 116 117 int devm_request_pci_bus_resources(struct device *dev, 118 struct list_head *resources) 119 { 120 struct resource_entry *win; 121 struct resource *parent, *res; 122 int err; 123 124 resource_list_for_each_entry(win, resources) { 125 res = win->res; 126 switch (resource_type(res)) { 127 case IORESOURCE_IO: 128 parent = &ioport_resource; 129 break; 130 case IORESOURCE_MEM: 131 parent = &iomem_resource; 132 break; 133 default: 134 continue; 135 } 136 137 err = devm_request_resource(dev, parent, res); 138 if (err) 139 return err; 140 } 141 142 return 0; 143 } 144 EXPORT_SYMBOL_GPL(devm_request_pci_bus_resources); 145 146 static struct pci_bus_region pci_32_bit = {0, 0xffffffffULL}; 147 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 148 static struct pci_bus_region pci_64_bit = {0, 149 (pci_bus_addr_t) 0xffffffffffffffffULL}; 150 static struct pci_bus_region pci_high = {(pci_bus_addr_t) 0x100000000ULL, 151 (pci_bus_addr_t) 0xffffffffffffffffULL}; 152 #endif 153 154 /* 155 * @res contains CPU addresses. Clip it so the corresponding bus addresses 156 * on @bus are entirely within @region. This is used to control the bus 157 * addresses of resources we allocate, e.g., we may need a resource that 158 * can be mapped by a 32-bit BAR. 159 */ 160 static void pci_clip_resource_to_region(struct pci_bus *bus, 161 struct resource *res, 162 struct pci_bus_region *region) 163 { 164 struct pci_bus_region r; 165 166 pcibios_resource_to_bus(bus, &r, res); 167 if (r.start < region->start) 168 r.start = region->start; 169 if (r.end > region->end) 170 r.end = region->end; 171 172 if (r.end < r.start) 173 res->end = res->start - 1; 174 else 175 pcibios_bus_to_resource(bus, res, &r); 176 } 177 178 static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res, 179 resource_size_t size, resource_size_t align, 180 resource_size_t min, unsigned long type_mask, 181 resource_alignf alignf, 182 void *alignf_data, 183 struct pci_bus_region *region) 184 { 185 struct resource *r, avail; 186 resource_size_t max; 187 int ret; 188 189 type_mask |= IORESOURCE_TYPE_BITS; 190 191 pci_bus_for_each_resource(bus, r) { 192 resource_size_t min_used = min; 193 194 if (!r) 195 continue; 196 197 /* type_mask must match */ 198 if ((res->flags ^ r->flags) & type_mask) 199 continue; 200 201 /* We cannot allocate a non-prefetching resource 202 from a pre-fetching area */ 203 if ((r->flags & IORESOURCE_PREFETCH) && 204 !(res->flags & IORESOURCE_PREFETCH)) 205 continue; 206 207 avail = *r; 208 pci_clip_resource_to_region(bus, &avail, region); 209 210 /* 211 * "min" is typically PCIBIOS_MIN_IO or PCIBIOS_MIN_MEM to 212 * protect badly documented motherboard resources, but if 213 * this is an already-configured bridge window, its start 214 * overrides "min". 215 */ 216 if (avail.start) 217 min_used = avail.start; 218 219 max = avail.end; 220 221 /* Don't bother if available space isn't large enough */ 222 if (size > max - min_used + 1) 223 continue; 224 225 /* Ok, try it out.. */ 226 ret = allocate_resource(r, res, size, min_used, max, 227 align, alignf, alignf_data); 228 if (ret == 0) 229 return 0; 230 } 231 return -ENOMEM; 232 } 233 234 /** 235 * pci_bus_alloc_resource - allocate a resource from a parent bus 236 * @bus: PCI bus 237 * @res: resource to allocate 238 * @size: size of resource to allocate 239 * @align: alignment of resource to allocate 240 * @min: minimum /proc/iomem address to allocate 241 * @type_mask: IORESOURCE_* type flags 242 * @alignf: resource alignment function 243 * @alignf_data: data argument for resource alignment function 244 * 245 * Given the PCI bus a device resides on, the size, minimum address, 246 * alignment and type, try to find an acceptable resource allocation 247 * for a specific device resource. 248 */ 249 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, 250 resource_size_t size, resource_size_t align, 251 resource_size_t min, unsigned long type_mask, 252 resource_alignf alignf, 253 void *alignf_data) 254 { 255 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 256 int rc; 257 258 if (res->flags & IORESOURCE_MEM_64) { 259 rc = pci_bus_alloc_from_region(bus, res, size, align, min, 260 type_mask, alignf, alignf_data, 261 &pci_high); 262 if (rc == 0) 263 return 0; 264 265 return pci_bus_alloc_from_region(bus, res, size, align, min, 266 type_mask, alignf, alignf_data, 267 &pci_64_bit); 268 } 269 #endif 270 271 return pci_bus_alloc_from_region(bus, res, size, align, min, 272 type_mask, alignf, alignf_data, 273 &pci_32_bit); 274 } 275 EXPORT_SYMBOL(pci_bus_alloc_resource); 276 277 /* 278 * The @idx resource of @dev should be a PCI-PCI bridge window. If this 279 * resource fits inside a window of an upstream bridge, do nothing. If it 280 * overlaps an upstream window but extends outside it, clip the resource so 281 * it fits completely inside. 282 */ 283 bool pci_bus_clip_resource(struct pci_dev *dev, int idx) 284 { 285 struct pci_bus *bus = dev->bus; 286 struct resource *res = &dev->resource[idx]; 287 struct resource orig_res = *res; 288 struct resource *r; 289 290 pci_bus_for_each_resource(bus, r) { 291 resource_size_t start, end; 292 293 if (!r) 294 continue; 295 296 if (resource_type(res) != resource_type(r)) 297 continue; 298 299 start = max(r->start, res->start); 300 end = min(r->end, res->end); 301 302 if (start > end) 303 continue; /* no overlap */ 304 305 if (res->start == start && res->end == end) 306 return false; /* no change */ 307 308 res->start = start; 309 res->end = end; 310 res->flags &= ~IORESOURCE_UNSET; 311 orig_res.flags &= ~IORESOURCE_UNSET; 312 pci_info(dev, "%pR clipped to %pR\n", &orig_res, res); 313 314 return true; 315 } 316 317 return false; 318 } 319 320 void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { } 321 322 void __weak pcibios_bus_add_device(struct pci_dev *pdev) { } 323 324 /* 325 * Create pwrctrl devices (if required) for the PCI devices to handle the power 326 * state. 327 */ 328 static void pci_pwrctrl_create_devices(struct pci_dev *dev) 329 { 330 struct device_node *np = dev_of_node(&dev->dev); 331 struct device *parent = &dev->dev; 332 struct platform_device *pdev; 333 334 /* 335 * First ensure that we are starting from a PCI bridge and it has a 336 * corresponding devicetree node. 337 */ 338 if (np && pci_is_bridge(dev)) { 339 /* 340 * Now look for the child PCI device nodes and create pwrctrl 341 * devices for them. The pwrctrl device drivers will manage the 342 * power state of the devices. 343 */ 344 for_each_available_child_of_node_scoped(np, child) { 345 /* 346 * First check whether the pwrctrl device really 347 * needs to be created or not. This is decided 348 * based on at least one of the power supplies 349 * being defined in the devicetree node of the 350 * device. 351 */ 352 if (!of_pci_supply_present(child)) { 353 pci_dbg(dev, "skipping OF node: %s\n", child->name); 354 return; 355 } 356 357 /* Now create the pwrctrl device */ 358 pdev = of_platform_device_create(child, NULL, parent); 359 if (!pdev) 360 pci_err(dev, "failed to create OF node: %s\n", child->name); 361 } 362 } 363 } 364 365 /** 366 * pci_bus_add_device - start driver for a single device 367 * @dev: device to add 368 * 369 * This adds add sysfs entries and start device drivers 370 */ 371 void pci_bus_add_device(struct pci_dev *dev) 372 { 373 struct device_node *dn = dev->dev.of_node; 374 struct platform_device *pdev; 375 int retval; 376 377 /* 378 * Can not put in pci_device_add yet because resources 379 * are not assigned yet for some devices. 380 */ 381 pcibios_bus_add_device(dev); 382 pci_fixup_device(pci_fixup_final, dev); 383 if (pci_is_bridge(dev)) 384 of_pci_make_dev_node(dev); 385 pci_create_sysfs_dev_files(dev); 386 pci_proc_attach_device(dev); 387 pci_bridge_d3_update(dev); 388 389 pci_pwrctrl_create_devices(dev); 390 391 /* 392 * If the PCI device is associated with a pwrctrl device with a 393 * power supply, create a device link between the PCI device and 394 * pwrctrl device. This ensures that pwrctrl drivers are probed 395 * before PCI client drivers. 396 */ 397 pdev = of_find_device_by_node(dn); 398 if (pdev && of_pci_supply_present(dn)) { 399 if (!device_link_add(&dev->dev, &pdev->dev, 400 DL_FLAG_AUTOREMOVE_CONSUMER)) 401 pci_err(dev, "failed to add device link to power control device %s\n", 402 pdev->name); 403 } 404 405 dev->match_driver = !dn || of_device_is_available(dn); 406 retval = device_attach(&dev->dev); 407 if (retval < 0 && retval != -EPROBE_DEFER) 408 pci_warn(dev, "device attach failed (%d)\n", retval); 409 410 pci_dev_assign_added(dev, true); 411 } 412 EXPORT_SYMBOL_GPL(pci_bus_add_device); 413 414 /** 415 * pci_bus_add_devices - start driver for PCI devices 416 * @bus: bus to check for new devices 417 * 418 * Start driver for PCI devices and add some sysfs entries. 419 */ 420 void pci_bus_add_devices(const struct pci_bus *bus) 421 { 422 struct pci_dev *dev; 423 struct pci_bus *child; 424 425 list_for_each_entry(dev, &bus->devices, bus_list) { 426 /* Skip already-added devices */ 427 if (pci_dev_is_added(dev)) 428 continue; 429 pci_bus_add_device(dev); 430 } 431 432 list_for_each_entry(dev, &bus->devices, bus_list) { 433 /* Skip if device attach failed */ 434 if (!pci_dev_is_added(dev)) 435 continue; 436 child = dev->subordinate; 437 if (child) 438 pci_bus_add_devices(child); 439 } 440 } 441 EXPORT_SYMBOL(pci_bus_add_devices); 442 443 static void __pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), 444 void *userdata, bool locked) 445 { 446 struct pci_dev *dev; 447 struct pci_bus *bus; 448 struct list_head *next; 449 int retval; 450 451 bus = top; 452 if (!locked) 453 down_read(&pci_bus_sem); 454 next = top->devices.next; 455 for (;;) { 456 if (next == &bus->devices) { 457 /* end of this bus, go up or finish */ 458 if (bus == top) 459 break; 460 next = bus->self->bus_list.next; 461 bus = bus->self->bus; 462 continue; 463 } 464 dev = list_entry(next, struct pci_dev, bus_list); 465 if (dev->subordinate) { 466 /* this is a pci-pci bridge, do its devices next */ 467 next = dev->subordinate->devices.next; 468 bus = dev->subordinate; 469 } else 470 next = dev->bus_list.next; 471 472 retval = cb(dev, userdata); 473 if (retval) 474 break; 475 } 476 if (!locked) 477 up_read(&pci_bus_sem); 478 } 479 480 /** 481 * pci_walk_bus - walk devices on/under bus, calling callback. 482 * @top: bus whose devices should be walked 483 * @cb: callback to be called for each device found 484 * @userdata: arbitrary pointer to be passed to callback 485 * 486 * Walk the given bus, including any bridged devices 487 * on buses under this bus. Call the provided callback 488 * on each device found. 489 * 490 * We check the return of @cb each time. If it returns anything 491 * other than 0, we break out. 492 */ 493 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata) 494 { 495 __pci_walk_bus(top, cb, userdata, false); 496 } 497 EXPORT_SYMBOL_GPL(pci_walk_bus); 498 499 void pci_walk_bus_locked(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata) 500 { 501 lockdep_assert_held(&pci_bus_sem); 502 503 __pci_walk_bus(top, cb, userdata, true); 504 } 505 EXPORT_SYMBOL_GPL(pci_walk_bus_locked); 506 507 struct pci_bus *pci_bus_get(struct pci_bus *bus) 508 { 509 if (bus) 510 get_device(&bus->dev); 511 return bus; 512 } 513 514 void pci_bus_put(struct pci_bus *bus) 515 { 516 if (bus) 517 put_device(&bus->dev); 518 } 519