#
3e70c5d6 |
| 26-Dec-2016 |
Nicolas Iooss <nicolas.iooss_linux@m4x.org> |
drm/i915/gvt: verify functions types in new_mmio_info()
The current prototype of new_mmio_info() uses void* for parameters read and write, which are functions with precise calling conventions (argum
drm/i915/gvt: verify functions types in new_mmio_info()
The current prototype of new_mmio_info() uses void* for parameters read and write, which are functions with precise calling conventions (argument types and return type). Write down these conventions in new_mmio_info() definition.
This has been reported by the following warnings when clang is used to build the kernel:
drivers/gpu/drm/i915/gvt/handlers.c:124:21: error: pointer type mismatch ('void *' and 'int (*)(struct intel_vgpu *, unsigned int, void *, unsigned int)') [-Werror,-Wpointer-type-mismatch] info->read = read ? read : intel_vgpu_default_mmio_read; ^ ~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/gvt/handlers.c:125:23: error: pointer type mismatch ('void *' and 'int (*)(struct intel_vgpu *, unsigned int, void *, unsigned int)') [-Werror,-Wpointer-type-mismatch] info->write = write ? write : intel_vgpu_default_mmio_write; ^ ~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This allows the compiler to detect that sbi_ctl_mmio_write() returns a "bool" value instead of an expected "int" one. Fix this.
Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
54ab6db0 |
| 27-Dec-2016 |
Jonathan Corbet <corbet@lwn.net> |
Merge tag 'v4.10-rc1' into docs-next
Linux 4.10-rc1
|
#
bd361f5d |
| 26-Dec-2016 |
Mauro Carvalho Chehab <mchehab@s-opensource.com> |
Merge tag 'v4.10-rc1' into patchwork
Linux 4.10-rc1
* tag 'v4.10-rc1': (11427 commits) Linux 4.10-rc1 powerpc: Fix build warning on 32-bit PPC avoid spurious "may be used uninitialized" warni
Merge tag 'v4.10-rc1' into patchwork
Linux 4.10-rc1
* tag 'v4.10-rc1': (11427 commits) Linux 4.10-rc1 powerpc: Fix build warning on 32-bit PPC avoid spurious "may be used uninitialized" warning mm: add PageWaiters indicating tasks are waiting for a page bit mm: Use owner_priv bit for PageSwapCache, valid when PageSwapBacked ktime: Get rid of ktime_equal() ktime: Cleanup ktime_set() usage ktime: Get rid of the union clocksource: Use a plain u64 instead of cycle_t irqchip/armada-xp: Consolidate hotplug state space irqchip/gic: Consolidate hotplug state space coresight/etm3/4x: Consolidate hotplug state space cpu/hotplug: Cleanup state names cpu/hotplug: Remove obsolete cpu hotplug register/unregister functions staging/lustre/libcfs: Convert to hotplug state machine scsi/bnx2i: Convert to hotplug state machine scsi/bnx2fc: Convert to hotplug state machine cpu/hotplug: Prevent overwriting of callbacks x86/msr: Remove bogus cleanup from the error path bus: arm-ccn: Prevent hotplug callback leak ...
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Revision tags: v4.10-rc1 |
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#
9439b371 |
| 13-Dec-2016 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'drm-for-v4.10' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie: "This is the main pull request for drm for 4.10 kernel.
New drivers: - ZTE VOU disp
Merge tag 'drm-for-v4.10' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie: "This is the main pull request for drm for 4.10 kernel.
New drivers: - ZTE VOU display driver (zxdrm) - Amlogic Meson Graphic Controller GXBB/GXL/GXM SoCs (meson) - MXSFB support (mxsfb)
Core: - Format handling has been reworked - Better atomic state debugging - drm_mm leak debugging - Atomic explicit fencing support - fbdev helper ops - Documentation updates - MST fbcon fixes
Bridge: - Silicon Image SiI8620 driver
Panel: - Add support for new simple panels
i915: - GVT Device model - Better HDMI2.0 support on skylake - More watermark fixes - GPU idling rework for suspend/resume - DP Audio workarounds - Scheduler prep-work - Opregion CADL handling - GPU scheduler and priority boosting
amdgfx/radeon: - Support for virtual devices - New VM manager for non-contig VRAM buffers - UVD powergating - SI register header cleanup - Cursor fixes - Powermanagement fixes
nouveau: - Powermangement reworks for better voltage/clock changes - Atomic modesetting support - Displayport Multistream (MST) support. - GP102/104 hang and cursor fixes - GP106 support
hisilicon: - hibmc support (BMC chip for aarch64 servers)
armada: - add tracing support for overlay change - refactor plane support - de-midlayer the driver
omapdrm: - Timing code cleanups
rcar-du: - R8A7792/R8A7796 support - Misc fixes.
sunxi: - A31 SoC display engine support
imx-drm: - YUV format support - Cleanup plane atomic update
mali-dp: - Misc fixes
dw-hdmi: - Add support for HDMI i2c master controller
tegra: - IOMMU support fixes - Error handling fixes
tda998x: - Fix connector registration - Improved robustness - Fix infoframe/audio compliance
virtio: - fix busid issues - allocate more vbufs
qxl: - misc fixes and cleanups.
vc4: - Fragment shader threading - ETC1 support - VEC (tv-out) support
msm: - A5XX GPU support - Lots of atomic changes
tilcdc: - Misc fixes and cleanups.
etnaviv: - Fix dma-buf export path - DRAW_INSTANCED support - fix driver on i.MX6SX
exynos: - HDMI refactoring
fsl-dcu: - fbdev changes"
* tag 'drm-for-v4.10' of git://people.freedesktop.org/~airlied/linux: (1343 commits) drm/nouveau/kms/nv50: fix atomic regression on original G80 drm/nouveau/bl: Do not register interface if Apple GMUX detected drm/nouveau/bl: Assign different names to interfaces drm/nouveau/bios/dp: fix handling of LevelEntryTableIndex on DP table 4.2 drm/nouveau/ltc: protect clearing of comptags with mutex drm/nouveau/gr/gf100-: handle GPC/TPC/MPC trap drm/nouveau/core: recognise GP106 chipset drm/nouveau/ttm: wait for bo fence to signal before unmapping vmas drm/nouveau/gr/gf100-: FECS intr handling is not relevant on proprietary ucode drm/nouveau/gr/gf100-: properly ack all FECS error interrupts drm/nouveau/fifo/gf100-: recover from host mmu faults drm: Add fake controlD* symlinks for backwards compat drm/vc4: Don't use drm_put_dev drm/vc4: Document VEC DT binding drm/vc4: Add support for the VEC (Video Encoder) IP drm: Add TV connector states to drm_connector_state drm: Turn DRM_MODE_SUBCONNECTOR_xx definitions into an enum drm/vc4: Fix ->clock_select setting for the VEC encoder drm/amdgpu/dce6: Set MASTER_UPDATE_MODE to 0 in resume_mc_access as well drm/amdgpu: use pin rather than pin_restricted in a few cases ...
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Revision tags: v4.9 |
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#
75e75cbd |
| 06-Dec-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
Merge remote-tracking branch 'airlied/drm-next' into drm-misc-next
Backmerge v4.9-rc8 to get at
commit e94bd1736f1f60e916a85a80c0b0ebeaae36cce5 Author: Michel Dänzer <michel.daenzer@amd.com> Date:
Merge remote-tracking branch 'airlied/drm-next' into drm-misc-next
Backmerge v4.9-rc8 to get at
commit e94bd1736f1f60e916a85a80c0b0ebeaae36cce5 Author: Michel Dänzer <michel.daenzer@amd.com> Date: Wed Nov 30 17:30:01 2016 +0900
drm: Don't call drm_for_each_crtc with a non-KMS driver
so I can apply Michel's follow-up patch.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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Revision tags: v4.9-rc8 |
|
#
35838b47 |
| 30-Nov-2016 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'drm-intel-next-2016-11-21' of git://anongit.freedesktop.org/git/drm-intel into drm-next
Final 4.10 updates:
- fine-tune fb flushing and tracking (Chris Wilson) - refactor state check dum
Merge tag 'drm-intel-next-2016-11-21' of git://anongit.freedesktop.org/git/drm-intel into drm-next
Final 4.10 updates:
- fine-tune fb flushing and tracking (Chris Wilson) - refactor state check dumper code for more conciseness (Tvrtko) - roll out dev_priv all over the place (Tvrkto) - finally remove __i915__ magic macro (Tvrtko) - more gvt bugfixes (Zhenyu&team) - better opregion CADL handling (Jani) - refactor/clean up wm programming (Maarten) - gpu scheduler + priority boosting for flips as first user (Chris Wilson) - make fbc use more atomic (Paulo) - initial kvm-gvt framework, but not yet complete (Zhenyu&team)
* tag 'drm-intel-next-2016-11-21' of git://anongit.freedesktop.org/git/drm-intel: (127 commits) drm/i915: Update DRIVER_DATE to 20161121 drm/i915: Skip final clflush if LLC is coherent drm/i915: Always flush the dirty CPU cache when pinning the scanout drm/i915: Don't touch NULL sg on i915_gem_object_get_pages_gtt() error drm/i915: Check that each request phase is completed before retiring drm/i915: i915_pages_create_for_stolen should return err ptr drm/i915: Enable support for nonblocking modeset drm/i915: Be more careful to drop the GT wakeref drm/i915: Move frontbuffer CS write tracking from ggtt vma to object drm/i915: Only dump dp_m2_n2 configuration when drrs is used drm/i915: don't leak global_timeline drm/i915: add i915_address_space_fini drm/i915: Add a few more sanity checks for stolen handling drm/i915: Waterproof verification of gen9 forcewake table ranges drm/i915: Introduce enableddisabled helper drm/i915: Only dump possible panel fitter config for the platform drm/i915: Only dump scaler config where supported drm/i915: Compact a few pipe config debug lines drm/i915: Don't log pipe config kernel pointer and duplicated pipe name drm/i915: Dump FDI config only where applicable ...
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Revision tags: v4.9-rc7, v4.9-rc6, v4.9-rc5 |
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#
a941795a |
| 07-Nov-2016 |
Robert Bragg <robert@sixbynine.org> |
drm/i915: rename OACONTROL GEN7_OACONTROL
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers
drm/i915: rename OACONTROL GEN7_OACONTROL
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers
Signed-off-by: Robert Bragg <robert@sixbynine.org> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Sourab Gupta <sourab.gupta@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161107194957.3385-3-robert@sixbynine.org
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#
d15d47ac |
| 17-Nov-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
Merge tag 'gvt-next-2016-11-17' of https://github.com/01org/gvt-linux into drm-intel-next-queued
From Zhenyu Wang:
gvt-next-2016-11-17
- Fix lock order issue found in guest stress test - Fix sever
Merge tag 'gvt-next-2016-11-17' of https://github.com/01org/gvt-linux into drm-intel-next-queued
From Zhenyu Wang:
gvt-next-2016-11-17
- Fix lock order issue found in guest stress test - Fix several MMIO handlers to correct behavior - Fix crash for vgpu execlist reset and memleak - Fix a possible conflict for unresolved vfio mdev dependency - other misc fixes
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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#
955c1dd1 |
| 16-Nov-2016 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915/gvt: drop checks for early Skylake revisions
We no longer cater for pre-production revisions of Skylake.
Fixes: d4362225e8cb ("drm/i915/gvt: update misc ctl regs base on stepping info") Cc
drm/i915/gvt: drop checks for early Skylake revisions
We no longer cater for pre-production revisions of Skylake.
Fixes: d4362225e8cb ("drm/i915/gvt: update misc ctl regs base on stepping info") Cc: Ping Gao <ping.a.gao@intel.com> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhi Wang <zhi.a.wang@intel.com> Cc: <intel-gfx@lists.freedesktop.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
a045fba4 |
| 14-Nov-2016 |
Ping Gao <ping.a.gao@intel.com> |
drm/i915/gvt: add more MMIO regs with command access flag
Add more MMIO regs with command access flag for whitelist as they are accessed by command.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> S
drm/i915/gvt: add more MMIO regs with command access flag
Add more MMIO regs with command access flag for whitelist as they are accessed by command.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
4f3f1aed |
| 10-Nov-2016 |
Ping Gao <ping.a.gao@intel.com> |
drm/i915/gvt: emulate right behavior for tlb_control
Emulate right behavior for tlb_control, set to ZERO upon write.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Min He <min.he@int
drm/i915/gvt: emulate right behavior for tlb_control
Emulate right behavior for tlb_control, set to ZERO upon write.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Min He <min.he@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
db8feb69 |
| 11-Nov-2016 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'drm-intel-next-2016-11-08' of git://anongit.freedesktop.org/git/drm-intel into drm-next
- gpu idling rework for s/r (Imre) - vlv mappable scanout fix - speed up probing in resume (Lyude)
Merge tag 'drm-intel-next-2016-11-08' of git://anongit.freedesktop.org/git/drm-intel into drm-next
- gpu idling rework for s/r (Imre) - vlv mappable scanout fix - speed up probing in resume (Lyude) - dp audio workarounds for gen9 (Dhinakaran) - more conversion to using dev_priv internally (Ville) - more gen9+ wm fixes and cleanups (Maarten) - shrinker cleanup&fixes (Chris) - reorg plane init code (Ville) - implement support for multiple timelines (prep work for scheduler) from Chris and all - untangle dev->struct_mutex locking as prep for multiple timelines (Chris) - refactor bxt phy code and collect it all in intel_dpio_phy.c (Ander) - another gvt with bugfixes all over from Zhenyu - piles of lspcon fixes from Imre - 90/270 rotation fixes (Ville) - guc log buffer support (Akash+Sagar) - fbc fixes from Paulo - untangle rpm vs. tiling-fences/mmaps (Chris) - fix atomic commit to wait on the right fences (Daniel Stone)
* tag 'drm-intel-next-2016-11-08' of git://anongit.freedesktop.org/git/drm-intel: (181 commits) drm/i915: Update DRIVER_DATE to 20161108 drm/i915: Mark CPU cache as dirty when used for rendering drm/i915: Add assert for no pending GPU requests during suspend/resume in LR mode drm/i915: Make sure engines are idle during GPU idling in LR mode drm/i915: Avoid early GPU idling due to race with new request drm/i915: Avoid early GPU idling due to already pending idle work drm/i915: Limit Valleyview and earlier to only using mappable scanout drm/i915: Round tile chunks up for constructing partial VMAs drm/i915: Remove the vma from the object list upon close drm/i915: Reinit polling before hpd when resuming drm/i915: Remove redundant reprobe in i915_drm_resume drm/i915/dp: Extend BDW DP audio workaround to GEN9 platforms drm/i915/dp: BDW cdclk fix for DP audio drm/i915: Fix pages pin counting around swizzle quirk drm/i915: Fix test on inputs for vma_compare() drm/i915/guc: Cache the client mapping drm/i915: Tidy slab cache allocations drm/i915: Introduce HAS_64BIT_RELOC drm/i915: Show the execlist queue in debugfs/i915_engine_info drm/i915: Unify global_list into global_link ...
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#
d7931c18 |
| 08-Nov-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
Merge tag 'gvt-next-2016-11-07' of https://github.com/01org/gvt-linux into drm-intel-next-queued
gvt-next-2016-11-07
- Fix regression from e95433c73a11 - Some MMIO handler fixes - Add better handli
Merge tag 'gvt-next-2016-11-07' of https://github.com/01org/gvt-linux into drm-intel-next-queued
gvt-next-2016-11-07
- Fix regression from e95433c73a11 - Some MMIO handler fixes - Add better handling for guest reset control - stratch page table tree for shadow ppgtt
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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Revision tags: v4.9-rc4 |
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#
2fb39fad |
| 04-Nov-2016 |
Du, Changbin <changbin.du@intel.com> |
drm/i915/gvt: emulate vgpu engine reset control behavior
When SW wishes to reset the render engine, it will program engine's reset control register and wait response from HW. We need emulate the beh
drm/i915/gvt: emulate vgpu engine reset control behavior
When SW wishes to reset the render engine, it will program engine's reset control register and wait response from HW. We need emulate the behavior of this register so guest i915 driver could walk through the engine reset flow. The registers are not emulated in gvt yet, this patch add the emulation logic.
v2: add more desc info in commit message.
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Du, Changbin <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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Revision tags: v4.9-rc3 |
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#
d4362225 |
| 28-Oct-2016 |
Ping Gao <ping.a.gao@intel.com> |
drm/i915/gvt: update misc ctl regs base on stepping info
Misc ctl related registers are for WA purpose, should detect the stepping info first before updating HW value.
Signed-off-by: Ping Gao <ping
drm/i915/gvt: update misc ctl regs base on stepping info
Misc ctl related registers are for WA purpose, should detect the stepping info first before updating HW value.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
f24940e0 |
| 27-Oct-2016 |
Ping Gao <ping.a.gao@intel.com> |
drm/i915/gvt: correct the emulation in TLB control handler
Need a explicit write_vreg in TLB MMIO write handler, beside that TLB vreg should update correspondingly following HW status to do correct
drm/i915/gvt: correct the emulation in TLB control handler
Need a explicit write_vreg in TLB MMIO write handler, beside that TLB vreg should update correspondingly following HW status to do correct emulation.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
5f399f11 |
| 27-Oct-2016 |
Ping Gao <ping.a.gao@intel.com> |
drm/i915/gvt: add write vreg in MMIO DMA_CTRL handler
Missing write_vreg in DMA_CTRL write handler would make obsolete value return when read vreg.
v2: get data from vreg after updating it.
Signed
drm/i915/gvt: add write vreg in MMIO DMA_CTRL handler
Missing write_vreg in DMA_CTRL write handler would make obsolete value return when read vreg.
v2: get data from vreg after updating it.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
f6c499ec |
| 27-Oct-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
Merge tag 'gvt-next-2016-10-27' of https://github.com/01org/gvt-linux into drm-intel-next-queued
gvt-next-2016-10-27
- Resolve current left build issue with ACPI=n and 32bit kernel - TLB workaround
Merge tag 'gvt-next-2016-10-27' of https://github.com/01org/gvt-linux into drm-intel-next-queued
gvt-next-2016-10-27
- Resolve current left build issue with ACPI=n and 32bit kernel - TLB workaround from Arkadiusz - vGPU reset fix from Ping - workload scheduler nesting sleep fix from Changbin - more misc fixes for sparse warnings and cleanups
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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#
6fb5082a |
| 31-Oct-2016 |
Bing Niu <bing.niu@intel.com> |
drm/i915/gvt: throw error basing on execlist submit result
throw error message in elsp emulation handler basing on execlist submit result. guest will trigger tdr process for recovering, gvt just fol
drm/i915/gvt: throw error basing on execlist submit result
throw error message in elsp emulation handler basing on execlist submit result. guest will trigger tdr process for recovering, gvt just follow guest's desire.
v2: populate error to top of mmio emulation logic, comments from zhenyu
Signed-off-by: Bing Niu <bing.niu@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
23736d1b |
| 26-Oct-2016 |
Ping Gao <ping.a.gao@intel.com> |
drm/i915/gvt: add full vGPU reset support
Full vGPU reset need to release all the shadow PPGGT pages to avoid unnecessary write-protect and also should re-initialize pvinfo after resetting vregs to
drm/i915/gvt: add full vGPU reset support
Full vGPU reset need to release all the shadow PPGGT pages to avoid unnecessary write-protect and also should re-initialize pvinfo after resetting vregs to keep pvinfo correct.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
0a8b66e3 |
| 26-Oct-2016 |
Ping Gao <ping.a.gao@intel.com> |
drm/i915/gvt: correct the reset logic
The current_vgpu will set to NULL after stopping the scheduler when the reset is triggered by current vgpu, so here need change the judgement condition for curr
drm/i915/gvt: correct the reset logic
The current_vgpu will set to NULL after stopping the scheduler when the reset is triggered by current vgpu, so here need change the judgement condition for current vgpu detection.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
40d2428b |
| 26-Oct-2016 |
Ping Gao <ping.a.gao@intel.com> |
drm/i915/gvt: add vreg write for GDRST handler
The emulation handler for MMIO GDRST miss vreg write in it, as result the vreg cannot update correspondingly.
Signed-off-by: Ping Gao <ping.a.gao@inte
drm/i915/gvt: add vreg write for GDRST handler
The emulation handler for MMIO GDRST miss vreg write in it, as result the vreg cannot update correspondingly.
Signed-off-by: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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#
0fc4f78f |
| 25-Oct-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
Merge remote-tracking branch 'airlied/drm-next' into topic/drm-misc
Backmerge latest drm-next to have a baseline for the s/fence/dma_fence/ patch from Chris.
Signed-off-by: Daniel Vetter <daniel.ve
Merge remote-tracking branch 'airlied/drm-next' into topic/drm-misc
Backmerge latest drm-next to have a baseline for the s/fence/dma_fence/ patch from Chris.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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#
5481e27f |
| 25-Oct-2016 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'drm-intel-next-2016-10-24' of git://anongit.freedesktop.org/drm-intel into drm-next
- first slice of the gvt device model (Zhenyu et al) - compression support for gpu error states (Chris)
Merge tag 'drm-intel-next-2016-10-24' of git://anongit.freedesktop.org/drm-intel into drm-next
- first slice of the gvt device model (Zhenyu et al) - compression support for gpu error states (Chris) - sunset clause on gpu errors resulting in dmesg noise telling users how to report them - .rodata diet from Tvrtko - switch over lots of macros to only take dev_priv (Tvrtko) - underrun suppression for dp link training (Ville) - lspcon (hmdi 2.0 on skl/bxt) support from Shashank Sharma, polish from Jani - gen9 wm fixes from Paulo&Lyude - updated ddi programming for kbl (Rodrigo) - respect alternate aux/ddc pins (from vbt) for all ddi ports (Ville)
* tag 'drm-intel-next-2016-10-24' of git://anongit.freedesktop.org/drm-intel: (227 commits) drm/i915: Update DRIVER_DATE to 20161024 drm/i915: Stop setting SNB min-freq-table 0 on powersave setup drm/i915/dp: add lane_count check in intel_dp_check_link_status drm/i915: Fix whitespace issues drm/i915: Clean up DDI DDC/AUX CH sanitation drm/i915: Respect alternate_ddc_pin for all DDI ports drm/i915: Respect alternate_aux_channel for all DDI ports drm/i915/gen9: Remove WaEnableYV12BugFixInHalfSliceChicken7 drm/i915: KBL - Recommended buffer translation programming for DisplayPort drm/i915: Move down skl/kbl ddi iboost and n_edp_entires fixup drm/i915: Add a sunset clause to GPU hang logging drm/i915: Stop reporting error details in dmesg as well as the error-state drm/i915/gvt: do not ignore return value of create_scratch_page drm/i915/gvt: fix spare warnings on odd constant _Bool cast drm/i915/gvt: mark symbols static where possible drm/i915/gvt: fix sparse warnings on different address spaces drm/i915/gvt: properly access enabled intel_engine_cs drm/i915/gvt: Remove defunct vmap_batch() drm/i915/gvt: Use common mapping routines for shadow_bb object drm/i915/gvt: Use common mapping routines for indirect_ctx object ...
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Revision tags: v4.9-rc2 |
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41842d6b |
| 20-Oct-2016 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
Merge tag 'gvt-next-fix-2016-10-20' of https://github.com/01org/gvt-linux into drm-intel-next-queued
gvt-next-fix-2016-10-20
This contains fix for first pull request. - clean up header mess between
Merge tag 'gvt-next-fix-2016-10-20' of https://github.com/01org/gvt-linux into drm-intel-next-queued
gvt-next-fix-2016-10-20
This contains fix for first pull request. - clean up header mess between i915 core and gvt - new MAINTAINERS item - new kernel-doc section - fix compiling warnings - gvt gem fix series from Chris - fix for i915 intel_engine_cs change - some sparse fixes from Changbin
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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