drm/amd/display: Refactoring if and endif statements to enable DC_LOGGER[Why]For Header related changes for core[How]Refactoring if and endif statements to enable DC_LOGGERReviewed-by: Mounik
drm/amd/display: Refactoring if and endif statements to enable DC_LOGGER[Why]For Header related changes for core[How]Refactoring if and endif statements to enable DC_LOGGERReviewed-by: Mounika Adhuri <mounika.adhuri@amd.com>Reviewed-by: Alvin Lee <alvin.lee2@amd.com>Signed-off-by: Lohita Mudimela <lohita.mudimela@amd.com>Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
show more ...
drm/amd/display: Remove redundant checks for ctx->dc_biosThe null checks for ctx->dc_bios are redundant as it was alreadydereferenced previously, as reported by Coverity; therefore thenull checks
drm/amd/display: Remove redundant checks for ctx->dc_biosThe null checks for ctx->dc_bios are redundant as it was alreadydereferenced previously, as reported by Coverity; therefore thenull checks are removed.This fixes 7 REVERSE_INULL issues reported by Coverity.Reviewed-by: Harry Wentland <harry.wentland@amd.com>Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Alex Hung <alex.hung@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Adjust some includes used by displaySome of the includes used in the DC can be removed and others need to beupdate. This commit adjusts some of those headers in the display code.
drm/amd/display: Adjust some includes used by displaySome of the includes used in the DC can be removed and others need to beupdate. This commit adjusts some of those headers in the display code.Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fix compiler warnings on high compiler warning levels[why]Enabling higher compiler warning levels results in many issues that canbe trivially resolved as well as some potentially
drm/amd/display: Fix compiler warnings on high compiler warning levels[why]Enabling higher compiler warning levels results in many issues that canbe trivially resolved as well as some potentially critical issues.[how]Fix all compiler warnings found with various compilers and higherwarning levels. Primarily, potentially uninitialized variables andunreachable code.Reviewed-by: Leo Li <sunpeng.li@amd.com>Acked-by: Roman Li <roman.li@amd.com>Signed-off-by: Aric Cyr <aric.cyr@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Drop legacy codeDisplay code keeps getting improvements, and because of that, somelegacy code is left behind. This commit drops some of those unusedcodes.Acked-by: Hamza Mahfoo
drm/amd/display: Drop legacy codeDisplay code keeps getting improvements, and because of that, somelegacy code is left behind. This commit drops some of those unusedcodes.Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Wake DMCUB before sending a command[Why]We can hang in place trying to send commands when the DMCUB isn'tpowered on.[How]For functions that execute within a DC context or DC l
drm/amd/display: Wake DMCUB before sending a command[Why]We can hang in place trying to send commands when the DMCUB isn'tpowered on.[How]For functions that execute within a DC context or DC lock we canwrap the direct calls to dm_execute_dmub_cmd/list with code thatexits idle power optimizations and reallows once we're done withthe command submission on success.For DM direct submissions the DM will need to manage the enter/exitsequencing manually.We cannot invoke a DMCUB command directly within the DM executionhelper or we can deadlock.Cc: Mario Limonciello <mario.limonciello@amd.com>Cc: Alex Deucher <alexander.deucher@amd.com>Cc: stable@vger.kernel.orgReviewed-by: Hansen Dsouza <hansen.dsouza@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Keep PHY active for DP displays on DCN31[Why & How]Port of a change that went into DCN314 to keep the PHY enabledwhen we have a connected and active DP display.The PHY can hang
drm/amd/display: Keep PHY active for DP displays on DCN31[Why & How]Port of a change that went into DCN314 to keep the PHY enabledwhen we have a connected and active DP display.The PHY can hang if PHY refclk is disabled inadvertently.Cc: Mario Limonciello <mario.limonciello@amd.com>Cc: Alex Deucher <alexander.deucher@amd.com>Cc: stable@vger.kernel.orgReviewed-by: Josip Pavic <josip.pavic@amd.com>Acked-by: Alan Liu <haoping.liu@amd.com>Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Clean FPGA code in dc[Why]Drop dead code for Linux.[How]Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DCReviewed-by: Ariel Bernstein <eric.bernstein@amd.com>Acked-by: Tom Chung
drm/amd/display: Clean FPGA code in dc[Why]Drop dead code for Linux.[How]Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DCReviewed-by: Ariel Bernstein <eric.bernstein@amd.com>Acked-by: Tom Chung <chiahsuan.chung@amd.com>Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd: Downgrade message about watermarks table after s0i3 to debugThis message shows up on s0i3 resume for DCN31 and DCN314 platforms butit has been decided that this flow won't be changed and
drm/amd: Downgrade message about watermarks table after s0i3 to debugThis message shows up on s0i3 resume for DCN31 and DCN314 platforms butit has been decided that this flow won't be changed and the message isexpected behavior.Downgrade the message to debug.Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>Acked-by: Alex Deucher <alexander.deucher@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: refactor dmub commands into single function[Why & How]Consolidate dmub access to a single interface. This makes it easier toadd code in the future that needs to run every time a
drm/amd/display: refactor dmub commands into single function[Why & How]Consolidate dmub access to a single interface. This makes it easier toadd code in the future that needs to run every time a dmub command isrequested (e.g. instrumentation, locking etc).Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: merge dc_link_dp into dc_link[why]Temporarly merge dc_link_dp functions into dc_link for thepurpose of removing dc_link_dp files. This is a transitionalchange for later commits
drm/amd/display: merge dc_link_dp into dc_link[why]Temporarly merge dc_link_dp functions into dc_link for thepurpose of removing dc_link_dp files. This is a transitionalchange for later commits where we will further refactor dc_linkfile.Reviewed-by: George Shen <George.Shen@amd.com>Acked-by: Alan Liu <HaoPing.Liu@amd.com>Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add Z8 allow states to z-state support list[Why]Even if we block Z9 based on crossover threshold it's possible toallow for Z8.[How]There's support for this on DCN314, so updat
drm/amd/display: Add Z8 allow states to z-state support list[Why]Even if we block Z9 based on crossover threshold it's possible toallow for Z8.[How]There's support for this on DCN314, so update the support types toinclude a z8 only and z8_z10 only state.Update the decide_zstate_support function to allow for specifyingthese modes based on the Z8 threshold.DCN31 has z-state disabled, but still update the legacy code tomap z8_only = disallow and z10_z8_only = z10_only to keep the supportthe same.Reviewed-by: Jun Lei <Jun.Lei@amd.com>Acked-by: Brian Chang <Brian.Chang@amd.com>Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: fix dcn3.1x mode validation on high bandwidth config[why]1. correct dram_channel_width (was hard coded to 4 for 32bit)2. use dm's is_hvm_enable status flag for hostvm_en input fo
drm/amd/display: fix dcn3.1x mode validation on high bandwidth config[why]1. correct dram_channel_width (was hard coded to 4 for 32bit)2. use dm's is_hvm_enable status flag for hostvm_en input for dml.3. add a function to override to all dcn3.1x.Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>Acked-by: Tom Chung <chiahsuan.chung@amd.com>Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Display distortion after hotplug 5K tiled display[Why]During hot plug of specific 5K tiled display, sometimes both the tilesare not synchronized resulting in distortion. The reas
drm/amd/display: Display distortion after hotplug 5K tiled display[Why]During hot plug of specific 5K tiled display, sometimes both the tilesare not synchronized resulting in distortion. The reason is that otgs ofboth the tiles goes out of sync when otg workaround (dcnxxx_disable_otg_wa)is applied for bandwidth optimization. The otg workaround reenables otgbut otg synchronization context is not reset and hence dc_trigger_sync()does not resynchronize otg again.[How]Implement reset_sync_context_for_pipe() to reset the otg synchronizationcontext for the disabled pipe and its slave pipes when otg workaround isapplied.Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Adding log clock table from SMU[Why & How]Adding log for clock table from SMU helps with the debugging process.Implemented using DC_LOG_SMU to output log.Reviewed-by: Charlene
drm/amd/display: Adding log clock table from SMU[Why & How]Adding log for clock table from SMU helps with the debugging process.Implemented using DC_LOG_SMU to output log.Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>Acked-by: Brian Chang <Brian.Chang@amd.com>Signed-off-by: Leo Chen <sancchen@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Clean up some inconsistent indentingNo functional modification involved.smatch warning:drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:726 dcn31_clk_mgr_
drm/amd/display: Clean up some inconsistent indentingNo functional modification involved.smatch warning:drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:726 dcn31_clk_mgr_construct() warn: inconsistent indenting.Reported-by: Abaci Robot <abaci@linux.alibaba.com>Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Removing assert statements for Linux[WHY]Assert statements causing several bugs on Linux DM[HOW]Removing assert statement for Linux DM(ASSERT(result == VBIOSSMC_Result_OK)). A
drm/amd/display: Removing assert statements for Linux[WHY]Assert statements causing several bugs on Linux DM[HOW]Removing assert statement for Linux DM(ASSERT(result == VBIOSSMC_Result_OK)). Also addinglogging statements for setting dcfclk.Bug: https://bugzilla.kernel.org/show_bug.cgi?id=216092Fixes: c1b972a18d05 ("drm/amd/display: Insert pulling smu busy status before sending another request")Reviewed-by: Gabe Teeger <Gabe.Teeger@amd.com>Acked-by: Solomon Chiu <solomon.chiu@amd.com>Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add SMU logging code[WHY]Logging for SMU response value after the wait allows us to knowimmediately what the response value was. Makes it easier to debug shouldthe value be anyt
drm/amd/display: Add SMU logging code[WHY]Logging for SMU response value after the wait allows us to knowimmediately what the response value was. Makes it easier to debug shouldthe value be anything other than OK.[HOW]Using the the already available DC SMU logging functions.Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Revert "drm/amd/display: Pass the new context into disable OTG WA"This reverts commit 8440f57532496d398a461887e56ca6f45089fbcf.Causes a hang when hotplugging DP, shutting down system, orenabling
Revert "drm/amd/display: Pass the new context into disable OTG WA"This reverts commit 8440f57532496d398a461887e56ca6f45089fbcf.Causes a hang when hotplugging DP, shutting down system, orenabling dual eDP.Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Don't clear ref_dtbclk value[Description]ref_dtbclk value is assigned in clk_mgr_construct,but the clks struct is cleared in init_clocks.Make sure to restore the value or we wil
drm/amd/display: Don't clear ref_dtbclk value[Description]ref_dtbclk value is assigned in clk_mgr_construct,but the clks struct is cleared in init_clocks.Make sure to restore the value or we will get0 value for ref_dtbclk in DCN31.Reviewed-by: Chris Park <Chris.Park@amd.com>Acked-by: Jasdeep Dhillon <jdhillon@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Pass the new context into disable OTG WA[Why]When enabling an HPO stream for the first time after having previouslyenabled a DIO stream there may be lingering DIO FIFO errors eve
drm/amd/display: Pass the new context into disable OTG WA[Why]When enabling an HPO stream for the first time after having previouslyenabled a DIO stream there may be lingering DIO FIFO errors even thoughthe DIO is no longer enabled.These can cause display clock change to hang if we don't apply theOTG disable workaround since the ramping logic is tied to OTG on.[How]The workaround wasn't being applied in the sequence of:1 DIO stream0 streams1 HPO streambecause current_state has no stream or planes in its context - andit's only swapped after optimize has finished.We should be using the incoming context instead to determine whetherthis logic is needed or not.Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>Acked-by: Jasdeep Dhillon <jdhillon@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: revert Blank eDP on disable/enable drvwhy and how:Revert this change. It was causing a black screen with certain blocksReviewed-by: George Shen <George.Shen@amd.com>Acked-by: J
drm/amd/display: revert Blank eDP on disable/enable drvwhy and how:Revert this change. It was causing a black screen with certain blocksReviewed-by: George Shen <George.Shen@amd.com>Acked-by: Jasdeep Dhillon <jdhillon@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Leung, Martin <Martin.Leung@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/display: Make dcn31_set_low_power_state staticIt's not used outside of dcn31_clk_mgr.c.Reported-by: kernel test robot <lkp@intel.com>Reviewed-by: Harry Wentland <harry.wentland@amd.co
drm/amdgpu/display: Make dcn31_set_low_power_state staticIt's not used outside of dcn31_clk_mgr.c.Reported-by: kernel test robot <lkp@intel.com>Reviewed-by: Harry Wentland <harry.wentland@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Power down hardware if timer not trigger[WHY]In headless systems, if SetMode/Power down timeris not called, hardware will not be powered downcausing HW/SW discrepancies. Powerin
drm/amd/display: Power down hardware if timer not trigger[WHY]In headless systems, if SetMode/Power down timeris not called, hardware will not be powered downcausing HW/SW discrepancies. Powering down hardwareon SetPowerState to D3 will ensure SW/HW state is accurate.[HOW]1. If PowerDownThread timer is not trigger but OS callSetPowerState to D3, power down hardware.2. Update HDMI hang w/a to apply to all TMDS signals onheadless systemReviewed-by: Martin Leung <Martin.Leung@amd.com>Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>Signed-off-by: Paul Hsieh <paul.hsieh@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: revert Power down hardware if timer not triggerTested-by: Daniel Wheeler <daniel.wheeler@amd.com>Reviewed-by: George Shen <George.Shen@amd.com>Acked-by: Tom Chung <chiahsuan.chun
drm/amd/display: revert Power down hardware if timer not triggerTested-by: Daniel Wheeler <daniel.wheeler@amd.com>Reviewed-by: George Shen <George.Shen@amd.com>Acked-by: Tom Chung <chiahsuan.chung@amd.com>Signed-off-by: Martin Leung <Martin.Leung@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
12