1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern const struct pr_ops nvme_pr_ops; 23 24 extern unsigned int nvme_io_timeout; 25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 26 27 extern unsigned int admin_timeout; 28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 29 30 #define NVME_DEFAULT_KATO 5 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 /* 41 * Default to a 4K page size, with the intention to update this 42 * path in the future to accommodate architectures with differing 43 * kernel and IO page sizes. 44 */ 45 #define NVME_CTRL_PAGE_SHIFT 12 46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 47 48 extern struct workqueue_struct *nvme_wq; 49 extern struct workqueue_struct *nvme_reset_wq; 50 extern struct workqueue_struct *nvme_delete_wq; 51 52 /* 53 * List of workarounds for devices that required behavior not specified in 54 * the standard. 55 */ 56 enum nvme_quirks { 57 /* 58 * Prefers I/O aligned to a stripe size specified in a vendor 59 * specific Identify field. 60 */ 61 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 62 63 /* 64 * The controller doesn't handle Identify value others than 0 or 1 65 * correctly. 66 */ 67 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 68 69 /* 70 * The controller deterministically returns O's on reads to 71 * logical blocks that deallocate was called on. 72 */ 73 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 74 75 /* 76 * The controller needs a delay before starts checking the device 77 * readiness, which is done by reading the NVME_CSTS_RDY bit. 78 */ 79 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 80 81 /* 82 * APST should not be used. 83 */ 84 NVME_QUIRK_NO_APST = (1 << 4), 85 86 /* 87 * The deepest sleep state should not be used. 88 */ 89 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 90 91 /* 92 * Set MEDIUM priority on SQ creation 93 */ 94 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 95 96 /* 97 * Ignore device provided subnqn. 98 */ 99 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 100 101 /* 102 * Broken Write Zeroes. 103 */ 104 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 105 106 /* 107 * Force simple suspend/resume path. 108 */ 109 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 110 111 /* 112 * Use only one interrupt vector for all queues 113 */ 114 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 115 116 /* 117 * Use non-standard 128 bytes SQEs. 118 */ 119 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 120 121 /* 122 * Prevent tag overlap between queues 123 */ 124 NVME_QUIRK_SHARED_TAGS = (1 << 13), 125 126 /* 127 * Don't change the value of the temperature threshold feature 128 */ 129 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 130 131 /* 132 * The controller doesn't handle the Identify Namespace 133 * Identification Descriptor list subcommand despite claiming 134 * NVMe 1.3 compliance. 135 */ 136 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 137 138 /* 139 * The controller does not properly handle DMA addresses over 140 * 48 bits. 141 */ 142 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 143 144 /* 145 * The controller requires the command_id value be limited, so skip 146 * encoding the generation sequence number. 147 */ 148 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 149 150 /* 151 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 152 */ 153 NVME_QUIRK_BOGUS_NID = (1 << 18), 154 155 /* 156 * No temperature thresholds for channels other than 0 (Composite). 157 */ 158 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 159 160 /* 161 * Disables simple suspend/resume path. 162 */ 163 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 164 }; 165 166 /* 167 * Common request structure for NVMe passthrough. All drivers must have 168 * this structure as the first member of their request-private data. 169 */ 170 struct nvme_request { 171 struct nvme_command *cmd; 172 union nvme_result result; 173 u8 genctr; 174 u8 retries; 175 u8 flags; 176 u16 status; 177 #ifdef CONFIG_NVME_MULTIPATH 178 unsigned long start_time; 179 #endif 180 struct nvme_ctrl *ctrl; 181 }; 182 183 /* 184 * Mark a bio as coming in through the mpath node. 185 */ 186 #define REQ_NVME_MPATH REQ_DRV 187 188 enum { 189 NVME_REQ_CANCELLED = (1 << 0), 190 NVME_REQ_USERCMD = (1 << 1), 191 NVME_MPATH_IO_STATS = (1 << 2), 192 }; 193 194 static inline struct nvme_request *nvme_req(struct request *req) 195 { 196 return blk_mq_rq_to_pdu(req); 197 } 198 199 static inline u16 nvme_req_qid(struct request *req) 200 { 201 if (!req->q->queuedata) 202 return 0; 203 204 return req->mq_hctx->queue_num + 1; 205 } 206 207 /* The below value is the specific amount of delay needed before checking 208 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 209 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 210 * found empirically. 211 */ 212 #define NVME_QUIRK_DELAY_AMOUNT 2300 213 214 /* 215 * enum nvme_ctrl_state: Controller state 216 * 217 * @NVME_CTRL_NEW: New controller just allocated, initial state 218 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 219 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 220 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 221 * transport 222 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 223 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 224 * disabled/failed immediately. This state comes 225 * after all async event processing took place and 226 * before ns removal and the controller deletion 227 * progress 228 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 229 * shutdown or removal. In this case we forcibly 230 * kill all inflight I/O as they have no chance to 231 * complete 232 */ 233 enum nvme_ctrl_state { 234 NVME_CTRL_NEW, 235 NVME_CTRL_LIVE, 236 NVME_CTRL_RESETTING, 237 NVME_CTRL_CONNECTING, 238 NVME_CTRL_DELETING, 239 NVME_CTRL_DELETING_NOIO, 240 NVME_CTRL_DEAD, 241 }; 242 243 struct nvme_fault_inject { 244 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 245 struct fault_attr attr; 246 struct dentry *parent; 247 bool dont_retry; /* DNR, do not retry */ 248 u16 status; /* status code */ 249 #endif 250 }; 251 252 enum nvme_ctrl_flags { 253 NVME_CTRL_FAILFAST_EXPIRED = 0, 254 NVME_CTRL_ADMIN_Q_STOPPED = 1, 255 NVME_CTRL_STARTED_ONCE = 2, 256 NVME_CTRL_STOPPED = 3, 257 NVME_CTRL_SKIP_ID_CNS_CS = 4, 258 NVME_CTRL_DIRTY_CAPABILITY = 5, 259 NVME_CTRL_FROZEN = 6, 260 }; 261 262 struct nvme_ctrl { 263 bool comp_seen; 264 bool identified; 265 enum nvme_ctrl_state state; 266 spinlock_t lock; 267 struct mutex scan_lock; 268 const struct nvme_ctrl_ops *ops; 269 struct request_queue *admin_q; 270 struct request_queue *connect_q; 271 struct request_queue *fabrics_q; 272 struct device *dev; 273 int instance; 274 int numa_node; 275 struct blk_mq_tag_set *tagset; 276 struct blk_mq_tag_set *admin_tagset; 277 struct list_head namespaces; 278 struct rw_semaphore namespaces_rwsem; 279 struct device ctrl_device; 280 struct device *device; /* char device */ 281 #ifdef CONFIG_NVME_HWMON 282 struct device *hwmon_device; 283 #endif 284 struct cdev cdev; 285 struct work_struct reset_work; 286 struct work_struct delete_work; 287 wait_queue_head_t state_wq; 288 289 struct nvme_subsystem *subsys; 290 struct list_head subsys_entry; 291 292 struct opal_dev *opal_dev; 293 294 char name[12]; 295 u16 cntlid; 296 297 u16 mtfa; 298 u32 ctrl_config; 299 u32 queue_count; 300 301 u64 cap; 302 u32 max_hw_sectors; 303 u32 max_segments; 304 u32 max_integrity_segments; 305 u32 max_discard_sectors; 306 u32 max_discard_segments; 307 u32 max_zeroes_sectors; 308 #ifdef CONFIG_BLK_DEV_ZONED 309 u32 max_zone_append; 310 #endif 311 u16 crdt[3]; 312 u16 oncs; 313 u32 dmrsl; 314 u16 oacs; 315 u16 sqsize; 316 u32 max_namespaces; 317 atomic_t abort_limit; 318 u8 vwc; 319 u32 vs; 320 u32 sgls; 321 u16 kas; 322 u8 npss; 323 u8 apsta; 324 u16 wctemp; 325 u16 cctemp; 326 u32 oaes; 327 u32 aen_result; 328 u32 ctratt; 329 unsigned int shutdown_timeout; 330 unsigned int kato; 331 bool subsystem; 332 unsigned long quirks; 333 struct nvme_id_power_state psd[32]; 334 struct nvme_effects_log *effects; 335 struct xarray cels; 336 struct work_struct scan_work; 337 struct work_struct async_event_work; 338 struct delayed_work ka_work; 339 struct delayed_work failfast_work; 340 struct nvme_command ka_cmd; 341 unsigned long ka_last_check_time; 342 struct work_struct fw_act_work; 343 unsigned long events; 344 345 #ifdef CONFIG_NVME_MULTIPATH 346 /* asymmetric namespace access: */ 347 u8 anacap; 348 u8 anatt; 349 u32 anagrpmax; 350 u32 nanagrpid; 351 struct mutex ana_lock; 352 struct nvme_ana_rsp_hdr *ana_log_buf; 353 size_t ana_log_size; 354 struct timer_list anatt_timer; 355 struct work_struct ana_work; 356 #endif 357 358 #ifdef CONFIG_NVME_HOST_AUTH 359 struct work_struct dhchap_auth_work; 360 struct mutex dhchap_auth_mutex; 361 struct nvme_dhchap_queue_context *dhchap_ctxs; 362 struct nvme_dhchap_key *host_key; 363 struct nvme_dhchap_key *ctrl_key; 364 u16 transaction; 365 #endif 366 struct key *tls_key; 367 368 /* Power saving configuration */ 369 u64 ps_max_latency_us; 370 bool apst_enabled; 371 372 /* PCIe only: */ 373 u16 hmmaxd; 374 u32 hmpre; 375 u32 hmmin; 376 u32 hmminds; 377 378 /* Fabrics only */ 379 u32 ioccsz; 380 u32 iorcsz; 381 u16 icdoff; 382 u16 maxcmd; 383 int nr_reconnects; 384 unsigned long flags; 385 struct nvmf_ctrl_options *opts; 386 387 struct page *discard_page; 388 unsigned long discard_page_busy; 389 390 struct nvme_fault_inject fault_inject; 391 392 enum nvme_ctrl_type cntrltype; 393 enum nvme_dctype dctype; 394 }; 395 396 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 397 { 398 return READ_ONCE(ctrl->state); 399 } 400 401 enum nvme_iopolicy { 402 NVME_IOPOLICY_NUMA, 403 NVME_IOPOLICY_RR, 404 }; 405 406 struct nvme_subsystem { 407 int instance; 408 struct device dev; 409 /* 410 * Because we unregister the device on the last put we need 411 * a separate refcount. 412 */ 413 struct kref ref; 414 struct list_head entry; 415 struct mutex lock; 416 struct list_head ctrls; 417 struct list_head nsheads; 418 char subnqn[NVMF_NQN_SIZE]; 419 char serial[20]; 420 char model[40]; 421 char firmware_rev[8]; 422 u8 cmic; 423 enum nvme_subsys_type subtype; 424 u16 vendor_id; 425 u16 awupf; /* 0's based awupf value. */ 426 struct ida ns_ida; 427 #ifdef CONFIG_NVME_MULTIPATH 428 enum nvme_iopolicy iopolicy; 429 #endif 430 }; 431 432 /* 433 * Container structure for uniqueue namespace identifiers. 434 */ 435 struct nvme_ns_ids { 436 u8 eui64[8]; 437 u8 nguid[16]; 438 uuid_t uuid; 439 u8 csi; 440 }; 441 442 /* 443 * Anchor structure for namespaces. There is one for each namespace in a 444 * NVMe subsystem that any of our controllers can see, and the namespace 445 * structure for each controller is chained of it. For private namespaces 446 * there is a 1:1 relation to our namespace structures, that is ->list 447 * only ever has a single entry for private namespaces. 448 */ 449 struct nvme_ns_head { 450 struct list_head list; 451 struct srcu_struct srcu; 452 struct nvme_subsystem *subsys; 453 unsigned ns_id; 454 struct nvme_ns_ids ids; 455 struct list_head entry; 456 struct kref ref; 457 bool shared; 458 int instance; 459 struct nvme_effects_log *effects; 460 461 struct cdev cdev; 462 struct device cdev_device; 463 464 struct gendisk *disk; 465 #ifdef CONFIG_NVME_MULTIPATH 466 struct bio_list requeue_list; 467 spinlock_t requeue_lock; 468 struct work_struct requeue_work; 469 struct mutex lock; 470 unsigned long flags; 471 #define NVME_NSHEAD_DISK_LIVE 0 472 struct nvme_ns __rcu *current_path[]; 473 #endif 474 }; 475 476 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 477 { 478 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 479 } 480 481 enum nvme_ns_features { 482 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 483 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 484 NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */ 485 }; 486 487 struct nvme_ns { 488 struct list_head list; 489 490 struct nvme_ctrl *ctrl; 491 struct request_queue *queue; 492 struct gendisk *disk; 493 #ifdef CONFIG_NVME_MULTIPATH 494 enum nvme_ana_state ana_state; 495 u32 ana_grpid; 496 #endif 497 struct list_head siblings; 498 struct kref kref; 499 struct nvme_ns_head *head; 500 501 int lba_shift; 502 u16 ms; 503 u16 pi_size; 504 u16 sgs; 505 u32 sws; 506 u8 pi_type; 507 u8 guard_type; 508 #ifdef CONFIG_BLK_DEV_ZONED 509 u64 zsze; 510 #endif 511 unsigned long features; 512 unsigned long flags; 513 #define NVME_NS_REMOVING 0 514 #define NVME_NS_ANA_PENDING 2 515 #define NVME_NS_FORCE_RO 3 516 #define NVME_NS_READY 4 517 518 struct cdev cdev; 519 struct device cdev_device; 520 521 struct nvme_fault_inject fault_inject; 522 523 }; 524 525 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 526 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 527 { 528 return ns->pi_type && ns->ms == ns->pi_size; 529 } 530 531 struct nvme_ctrl_ops { 532 const char *name; 533 struct module *module; 534 unsigned int flags; 535 #define NVME_F_FABRICS (1 << 0) 536 #define NVME_F_METADATA_SUPPORTED (1 << 1) 537 #define NVME_F_BLOCKING (1 << 2) 538 539 const struct attribute_group **dev_attr_groups; 540 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 541 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 542 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 543 void (*free_ctrl)(struct nvme_ctrl *ctrl); 544 void (*submit_async_event)(struct nvme_ctrl *ctrl); 545 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 546 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 547 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 548 void (*print_device_info)(struct nvme_ctrl *ctrl); 549 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 550 }; 551 552 /* 553 * nvme command_id is constructed as such: 554 * | xxxx | xxxxxxxxxxxx | 555 * gen request tag 556 */ 557 #define nvme_genctr_mask(gen) (gen & 0xf) 558 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 559 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 560 #define nvme_tag_from_cid(cid) (cid & 0xfff) 561 562 static inline u16 nvme_cid(struct request *rq) 563 { 564 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 565 } 566 567 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 568 u16 command_id) 569 { 570 u8 genctr = nvme_genctr_from_cid(command_id); 571 u16 tag = nvme_tag_from_cid(command_id); 572 struct request *rq; 573 574 rq = blk_mq_tag_to_rq(tags, tag); 575 if (unlikely(!rq)) { 576 pr_err("could not locate request for tag %#x\n", 577 tag); 578 return NULL; 579 } 580 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 581 dev_err(nvme_req(rq)->ctrl->device, 582 "request %#x genctr mismatch (got %#x expected %#x)\n", 583 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 584 return NULL; 585 } 586 return rq; 587 } 588 589 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 590 u16 command_id) 591 { 592 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 593 } 594 595 /* 596 * Return the length of the string without the space padding 597 */ 598 static inline int nvme_strlen(char *s, int len) 599 { 600 while (s[len - 1] == ' ') 601 len--; 602 return len; 603 } 604 605 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 606 { 607 struct nvme_subsystem *subsys = ctrl->subsys; 608 609 if (ctrl->ops->print_device_info) { 610 ctrl->ops->print_device_info(ctrl); 611 return; 612 } 613 614 dev_err(ctrl->device, 615 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 616 nvme_strlen(subsys->model, sizeof(subsys->model)), 617 subsys->model, nvme_strlen(subsys->firmware_rev, 618 sizeof(subsys->firmware_rev)), 619 subsys->firmware_rev); 620 } 621 622 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 623 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 624 const char *dev_name); 625 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 626 void nvme_should_fail(struct request *req); 627 #else 628 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 629 const char *dev_name) 630 { 631 } 632 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 633 { 634 } 635 static inline void nvme_should_fail(struct request *req) {} 636 #endif 637 638 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 639 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 640 641 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 642 { 643 int ret; 644 645 if (!ctrl->subsystem) 646 return -ENOTTY; 647 if (!nvme_wait_reset(ctrl)) 648 return -EBUSY; 649 650 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 651 if (ret) 652 return ret; 653 654 return nvme_try_sched_reset(ctrl); 655 } 656 657 /* 658 * Convert a 512B sector number to a device logical block number. 659 */ 660 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 661 { 662 return sector >> (ns->lba_shift - SECTOR_SHIFT); 663 } 664 665 /* 666 * Convert a device logical block number to a 512B sector number. 667 */ 668 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 669 { 670 return lba << (ns->lba_shift - SECTOR_SHIFT); 671 } 672 673 /* 674 * Convert byte length to nvme's 0-based num dwords 675 */ 676 static inline u32 nvme_bytes_to_numd(size_t len) 677 { 678 return (len >> 2) - 1; 679 } 680 681 static inline bool nvme_is_ana_error(u16 status) 682 { 683 switch (status & 0x7ff) { 684 case NVME_SC_ANA_TRANSITION: 685 case NVME_SC_ANA_INACCESSIBLE: 686 case NVME_SC_ANA_PERSISTENT_LOSS: 687 return true; 688 default: 689 return false; 690 } 691 } 692 693 static inline bool nvme_is_path_error(u16 status) 694 { 695 /* check for a status code type of 'path related status' */ 696 return (status & 0x700) == 0x300; 697 } 698 699 /* 700 * Fill in the status and result information from the CQE, and then figure out 701 * if blk-mq will need to use IPI magic to complete the request, and if yes do 702 * so. If not let the caller complete the request without an indirect function 703 * call. 704 */ 705 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 706 union nvme_result result) 707 { 708 struct nvme_request *rq = nvme_req(req); 709 struct nvme_ctrl *ctrl = rq->ctrl; 710 711 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 712 rq->genctr++; 713 714 rq->status = le16_to_cpu(status) >> 1; 715 rq->result = result; 716 /* inject error when permitted by fault injection framework */ 717 nvme_should_fail(req); 718 if (unlikely(blk_should_fake_timeout(req->q))) 719 return true; 720 return blk_mq_complete_request_remote(req); 721 } 722 723 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 724 { 725 get_device(ctrl->device); 726 } 727 728 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 729 { 730 put_device(ctrl->device); 731 } 732 733 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 734 { 735 return !qid && 736 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 737 } 738 739 void nvme_complete_rq(struct request *req); 740 void nvme_complete_batch_req(struct request *req); 741 742 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 743 void (*fn)(struct request *rq)) 744 { 745 struct request *req; 746 747 rq_list_for_each(&iob->req_list, req) { 748 fn(req); 749 nvme_complete_batch_req(req); 750 } 751 blk_mq_end_request_batch(iob); 752 } 753 754 blk_status_t nvme_host_path_error(struct request *req); 755 bool nvme_cancel_request(struct request *req, void *data); 756 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 757 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 758 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 759 enum nvme_ctrl_state new_state); 760 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 761 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 762 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 763 const struct nvme_ctrl_ops *ops, unsigned long quirks); 764 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 765 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 766 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 767 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 768 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 769 const struct blk_mq_ops *ops, unsigned int cmd_size); 770 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 771 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 772 const struct blk_mq_ops *ops, unsigned int nr_maps, 773 unsigned int cmd_size); 774 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 775 776 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 777 778 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 779 volatile union nvme_result *res); 780 781 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 782 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 783 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 784 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 785 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 786 void nvme_sync_queues(struct nvme_ctrl *ctrl); 787 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 788 void nvme_unfreeze(struct nvme_ctrl *ctrl); 789 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 790 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 791 void nvme_start_freeze(struct nvme_ctrl *ctrl); 792 793 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 794 { 795 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 796 } 797 798 #define NVME_QID_ANY -1 799 void nvme_init_request(struct request *req, struct nvme_command *cmd); 800 void nvme_cleanup_cmd(struct request *req); 801 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 802 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 803 struct request *req); 804 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 805 bool queue_live); 806 807 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 808 bool queue_live) 809 { 810 if (likely(ctrl->state == NVME_CTRL_LIVE)) 811 return true; 812 if (ctrl->ops->flags & NVME_F_FABRICS && 813 ctrl->state == NVME_CTRL_DELETING) 814 return queue_live; 815 return __nvme_check_ready(ctrl, rq, queue_live); 816 } 817 818 /* 819 * NSID shall be unique for all shared namespaces, or if at least one of the 820 * following conditions is met: 821 * 1. Namespace Management is supported by the controller 822 * 2. ANA is supported by the controller 823 * 3. NVM Set are supported by the controller 824 * 825 * In other case, private namespace are not required to report a unique NSID. 826 */ 827 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 828 struct nvme_ns_head *head) 829 { 830 return head->shared || 831 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 832 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 833 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 834 } 835 836 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 837 void *buf, unsigned bufflen); 838 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 839 union nvme_result *result, void *buffer, unsigned bufflen, 840 int qid, int at_head, 841 blk_mq_req_flags_t flags); 842 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 843 unsigned int dword11, void *buffer, size_t buflen, 844 u32 *result); 845 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 846 unsigned int dword11, void *buffer, size_t buflen, 847 u32 *result); 848 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 849 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 850 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 851 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 852 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 853 void nvme_queue_scan(struct nvme_ctrl *ctrl); 854 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 855 void *log, size_t size, u64 offset); 856 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 857 void nvme_put_ns_head(struct nvme_ns_head *head); 858 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 859 const struct file_operations *fops, struct module *owner); 860 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 861 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 862 unsigned int cmd, unsigned long arg); 863 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 864 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 865 unsigned int cmd, unsigned long arg); 866 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 867 unsigned long arg); 868 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 869 unsigned long arg); 870 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 871 struct io_comp_batch *iob, unsigned int poll_flags); 872 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 873 unsigned int issue_flags); 874 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 875 unsigned int issue_flags); 876 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 877 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 878 879 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 880 extern const struct pr_ops nvme_pr_ops; 881 extern const struct block_device_operations nvme_ns_head_ops; 882 extern const struct attribute_group nvme_dev_attrs_group; 883 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 884 extern const struct attribute_group *nvme_dev_attr_groups[]; 885 extern const struct block_device_operations nvme_bdev_ops; 886 887 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 888 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 889 #ifdef CONFIG_NVME_MULTIPATH 890 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 891 { 892 return ctrl->ana_log_buf != NULL; 893 } 894 895 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 896 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 897 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 898 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 899 void nvme_failover_req(struct request *req); 900 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 901 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 902 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 903 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 904 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 905 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 906 void nvme_mpath_update(struct nvme_ctrl *ctrl); 907 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 908 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 909 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 910 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 911 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 912 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 913 void nvme_mpath_start_request(struct request *rq); 914 void nvme_mpath_end_request(struct request *rq); 915 916 static inline void nvme_trace_bio_complete(struct request *req) 917 { 918 struct nvme_ns *ns = req->q->queuedata; 919 920 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 921 trace_block_bio_complete(ns->head->disk->queue, req->bio); 922 } 923 924 extern bool multipath; 925 extern struct device_attribute dev_attr_ana_grpid; 926 extern struct device_attribute dev_attr_ana_state; 927 extern struct device_attribute subsys_attr_iopolicy; 928 929 #else 930 #define multipath false 931 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 932 { 933 return false; 934 } 935 static inline void nvme_failover_req(struct request *req) 936 { 937 } 938 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 939 { 940 } 941 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 942 struct nvme_ns_head *head) 943 { 944 return 0; 945 } 946 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 947 { 948 } 949 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 950 { 951 } 952 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 953 { 954 return false; 955 } 956 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 957 { 958 } 959 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 960 { 961 } 962 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 963 { 964 } 965 static inline void nvme_trace_bio_complete(struct request *req) 966 { 967 } 968 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 969 { 970 } 971 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 972 struct nvme_id_ctrl *id) 973 { 974 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 975 dev_warn(ctrl->device, 976 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 977 return 0; 978 } 979 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 980 { 981 } 982 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 983 { 984 } 985 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 986 { 987 } 988 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 989 { 990 } 991 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 992 { 993 } 994 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 995 { 996 } 997 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 998 { 999 } 1000 static inline void nvme_mpath_start_request(struct request *rq) 1001 { 1002 } 1003 static inline void nvme_mpath_end_request(struct request *rq) 1004 { 1005 } 1006 #endif /* CONFIG_NVME_MULTIPATH */ 1007 1008 int nvme_revalidate_zones(struct nvme_ns *ns); 1009 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1010 unsigned int nr_zones, report_zones_cb cb, void *data); 1011 #ifdef CONFIG_BLK_DEV_ZONED 1012 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1013 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1014 struct nvme_command *cmnd, 1015 enum nvme_zone_mgmt_action action); 1016 #else 1017 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1018 struct request *req, struct nvme_command *cmnd, 1019 enum nvme_zone_mgmt_action action) 1020 { 1021 return BLK_STS_NOTSUPP; 1022 } 1023 1024 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1025 { 1026 dev_warn(ns->ctrl->device, 1027 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1028 return -EPROTONOSUPPORT; 1029 } 1030 #endif 1031 1032 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1033 { 1034 return dev_to_disk(dev)->private_data; 1035 } 1036 1037 #ifdef CONFIG_NVME_HWMON 1038 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1039 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1040 #else 1041 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1042 { 1043 return 0; 1044 } 1045 1046 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1047 { 1048 } 1049 #endif 1050 1051 static inline void nvme_start_request(struct request *rq) 1052 { 1053 if (rq->cmd_flags & REQ_NVME_MPATH) 1054 nvme_mpath_start_request(rq); 1055 blk_mq_start_request(rq); 1056 } 1057 1058 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1059 { 1060 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1061 } 1062 1063 #ifdef CONFIG_NVME_HOST_AUTH 1064 int __init nvme_init_auth(void); 1065 void __exit nvme_exit_auth(void); 1066 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1067 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1068 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1069 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1070 void nvme_auth_free(struct nvme_ctrl *ctrl); 1071 #else 1072 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1073 { 1074 return 0; 1075 } 1076 static inline int __init nvme_init_auth(void) 1077 { 1078 return 0; 1079 } 1080 static inline void __exit nvme_exit_auth(void) 1081 { 1082 } 1083 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1084 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1085 { 1086 return -EPROTONOSUPPORT; 1087 } 1088 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1089 { 1090 return NVME_SC_AUTH_REQUIRED; 1091 } 1092 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1093 #endif 1094 1095 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1096 u8 opcode); 1097 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1098 int nvme_execute_rq(struct request *rq, bool at_head); 1099 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1100 struct nvme_command *cmd, int status); 1101 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1102 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1103 void nvme_put_ns(struct nvme_ns *ns); 1104 1105 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1106 { 1107 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1108 } 1109 1110 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1111 const unsigned char *nvme_get_error_status_str(u16 status); 1112 const unsigned char *nvme_get_opcode_str(u8 opcode); 1113 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1114 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1115 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1116 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1117 { 1118 return "I/O Error"; 1119 } 1120 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1121 { 1122 return "I/O Cmd"; 1123 } 1124 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1125 { 1126 return "Admin Cmd"; 1127 } 1128 1129 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1130 { 1131 return "Fabrics Cmd"; 1132 } 1133 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1134 1135 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1136 { 1137 if (opcode == nvme_fabrics_command) 1138 return nvme_get_fabrics_opcode_str(fctype); 1139 return qid ? nvme_get_opcode_str(opcode) : 1140 nvme_get_admin_opcode_str(opcode); 1141 } 1142 #endif /* _NVME_H */ 1143