| fc18139c | 04-Jun-2023 |
Paul Cercueil <paul@crapouillou.net> |
mips: ingenic: Enable EXT/2 divider on JZ4750/55/60 if EXT is 24 MHz
The JZ4750, JZ4755 and JZ4760 (non-B version) support using a 24 MHz
external crystal oscillator instead of the typical 12 MHz on
mips: ingenic: Enable EXT/2 divider on JZ4750/55/60 if EXT is 24 MHz
The JZ4750, JZ4755 and JZ4760 (non-B version) support using a 24 MHz
external crystal oscillator instead of the typical 12 MHz one.
However, most of the SoC's IP blocks only work with a 12 MHz clock.
Thanksfully, there is a /2 divider we can enable when a 24 MHz external
crystal is present.
Force-enable this /2 divider when the oscillator is 24 MHz, so that the
SoC always uses a 12 MHz clock internally.
It is done here, and not in the clocks driver, because we need the EXT
clock to be 12 MHz for the early console to work, and the clocks driver
probes way too late.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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| 79876cc1 | 22-Dec-2021 |
YunQiang Su <yunqiang.su@cipunited.com> |
MIPS: new Kconfig option ZBOOT_LOAD_ADDRESS
If this option is not 0x0, it will be used for zboot load address.
Otherwise, the result of calc_vmlinuz_load_addr will be used.
The zload-y value for ge
MIPS: new Kconfig option ZBOOT_LOAD_ADDRESS
If this option is not 0x0, it will be used for zboot load address.
Otherwise, the result of calc_vmlinuz_load_addr will be used.
The zload-y value for generic are also removed then, as the current
value breaks booting on qemu -M boston.
The result of calc_vmlinuz_load_addr works well for most of cases.
The default value of bcm47xx keeps as it currently.
Signed-off-by: YunQiang Su <yunqiang.su@cipunited.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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| 71f8817c | 23-Aug-2021 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: ingenic: Unconditionally enable clock of CPU #0
Make sure that the PLL that feeds the CPU won't be stopped while the
kernel is running.
This fixes a problem on JZ4760 (and probably others) wh
MIPS: ingenic: Unconditionally enable clock of CPU #0
Make sure that the PLL that feeds the CPU won't be stopped while the
kernel is running.
This fixes a problem on JZ4760 (and probably others) where under very
specific conditions, the main PLL would be turned OFF when the kernel
was shutting down, causing the shutdown process to fail.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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| 2825f4c0 | 10-Nov-2020 |
Gregory CLEMENT <gregory.clement@bootlin.com> |
MIPS: mscc: Fix configuration name for ocelot legacy boards
Ocelots is supported by the generic MIPS build so make it clears that
LEGACY_BOARD_OCELOT is only needed for legacy boards which didn't ha
MIPS: mscc: Fix configuration name for ocelot legacy boards
Ocelots is supported by the generic MIPS build so make it clears that
LEGACY_BOARD_OCELOT is only needed for legacy boards which didn't have
bootloader supporting device tree.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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| a103e9b9 | 06-Sep-2020 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: jz4740: Rename jz4740 folders to ingenic
Now that all the jz4740 platform code has been removed, and we're left
with only a Kconfig and the cpu-feature-overrides.h file, finalize the
cleanup p
MIPS: jz4740: Rename jz4740 folders to ingenic
Now that all the jz4740 platform code has been removed, and we're left
with only a Kconfig and the cpu-feature-overrides.h file, finalize the
cleanup process by renaming the jz4740 and include/mach-jz4740 folders
to ingenic and include/mach-ingenic.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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