xref: /linux/drivers/reset/Kconfig (revision 68f41105ea07d4be68e77666fcebbd34ea3612a8)
1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only
261fc4131SPhilipp Zabelconfig ARCH_HAS_RESET_CONTROLLER
361fc4131SPhilipp Zabel	bool
461fc4131SPhilipp Zabel
561fc4131SPhilipp Zabelmenuconfig RESET_CONTROLLER
661fc4131SPhilipp Zabel	bool "Reset Controller Support"
761fc4131SPhilipp Zabel	default y if ARCH_HAS_RESET_CONTROLLER
861fc4131SPhilipp Zabel	help
961fc4131SPhilipp Zabel	  Generic Reset Controller support.
1061fc4131SPhilipp Zabel
1161fc4131SPhilipp Zabel	  This framework is designed to abstract reset handling of devices
1261fc4131SPhilipp Zabel	  via GPIOs or SoC-internal reset controller modules.
1361fc4131SPhilipp Zabel
1461fc4131SPhilipp Zabel	  If unsure, say no.
15e5d76075SStephen Gallimore
16998cd463SMasahiro Yamadaif RESET_CONTROLLER
17998cd463SMasahiro Yamada
1862700682SThor Thayerconfig RESET_A10SR
1962700682SThor Thayer	tristate "Altera Arria10 System Resource Reset"
20af19f193SPhilipp Zabel	depends on MFD_ALTERA_A10SR || COMPILE_TEST
2162700682SThor Thayer	help
2262700682SThor Thayer	  This option enables support for the external reset functions for
2362700682SThor Thayer	  peripheral PHYs on the Altera Arria10 System Resource Chip.
2462700682SThor Thayer
25e27b4a6eSPhilipp Zabelconfig RESET_ATH79
26e27b4a6eSPhilipp Zabel	bool "AR71xx Reset Driver" if COMPILE_TEST
27e27b4a6eSPhilipp Zabel	default ATH79
28e27b4a6eSPhilipp Zabel	help
29e27b4a6eSPhilipp Zabel	  This enables the ATH79 reset controller driver that supports the
30e27b4a6eSPhilipp Zabel	  AR71xx SoC reset controller.
31e27b4a6eSPhilipp Zabel
3237634923SEugeniy Paltsevconfig RESET_AXS10X
3337634923SEugeniy Paltsev	bool "AXS10x Reset Driver" if COMPILE_TEST
3437634923SEugeniy Paltsev	default ARC_PLAT_AXS10X
3537634923SEugeniy Paltsev	help
3637634923SEugeniy Paltsev	  This enables the reset controller driver for AXS10x.
3737634923SEugeniy Paltsev
38aac02543SÁlvaro Fernández Rojasconfig RESET_BCM6345
39aac02543SÁlvaro Fernández Rojas	bool "BCM6345 Reset Controller"
40aac02543SÁlvaro Fernández Rojas	depends on BMIPS_GENERIC || COMPILE_TEST
41aac02543SÁlvaro Fernández Rojas	default BMIPS_GENERIC
42aac02543SÁlvaro Fernández Rojas	help
43aac02543SÁlvaro Fernández Rojas	  This enables the reset controller driver for BCM6345 SoCs.
44aac02543SÁlvaro Fernández Rojas
4570d467eaSPhilipp Zabelconfig RESET_BERLIN
465e787cdfSJisheng Zhang	tristate "Berlin Reset Driver"
475e787cdfSJisheng Zhang	depends on ARCH_BERLIN || COMPILE_TEST
485e787cdfSJisheng Zhang	default m if ARCH_BERLIN
4970d467eaSPhilipp Zabel	help
5070d467eaSPhilipp Zabel	  This enables the reset controller driver for Marvell Berlin SoCs.
5170d467eaSPhilipp Zabel
5277750bc0SFlorian Fainelliconfig RESET_BRCMSTB
5377750bc0SFlorian Fainelli	tristate "Broadcom STB reset controller"
5477750bc0SFlorian Fainelli	depends on ARCH_BRCMSTB || COMPILE_TEST
5577750bc0SFlorian Fainelli	default ARCH_BRCMSTB
5677750bc0SFlorian Fainelli	help
5777750bc0SFlorian Fainelli	  This enables the reset controller driver for Broadcom STB SoCs using
5877750bc0SFlorian Fainelli	  a SUN_TOP_CTRL_SW_INIT style controller.
5977750bc0SFlorian Fainelli
604cf176e5SJim Quinlanconfig RESET_BRCMSTB_RESCAL
615694ca29SFlorian Fainelli	tristate "Broadcom STB RESCAL reset controller"
627fbcc535SBrendan Higgins	depends on HAS_IOMEM
6342f6a76fSGeert Uytterhoeven	depends on ARCH_BRCMSTB || COMPILE_TEST
6442f6a76fSGeert Uytterhoeven	default ARCH_BRCMSTB
654cf176e5SJim Quinlan	help
664cf176e5SJim Quinlan	  This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
674cf176e5SJim Quinlan	  BCM7216.
684cf176e5SJim Quinlan
69cee544a4SKrzysztof Kozlowskiconfig RESET_GPIO
70cee544a4SKrzysztof Kozlowski	tristate "GPIO reset controller"
71cee544a4SKrzysztof Kozlowski	help
72cee544a4SKrzysztof Kozlowski	  This enables a generic reset controller for resets attached via
73cee544a4SKrzysztof Kozlowski	  GPIOs.  Typically for OF platforms this driver expects "reset-gpios"
74cee544a4SKrzysztof Kozlowski	  property.
75cee544a4SKrzysztof Kozlowski
76cee544a4SKrzysztof Kozlowski	  If compiled as module, it will be called reset-gpio.
77cee544a4SKrzysztof Kozlowski
7813541226SVineet Guptaconfig RESET_HSDK
7913541226SVineet Gupta	bool "Synopsys HSDK Reset Driver"
802d48a237SThomas Meyer	depends on HAS_IOMEM
81544e3bf4SGeert Uytterhoeven	depends on ARC_SOC_HSDK || COMPILE_TEST
82e0be864fSEugeniy Paltsev	help
8313541226SVineet Gupta	  This enables the reset controller driver for HSDK board.
84e0be864fSEugeniy Paltsev
85abf97755SAndrey Smirnovconfig RESET_IMX7
86a442abbbSAnson Huang	tristate "i.MX7/8 Reset Driver"
878fa56620SMasahiro Yamada	depends on HAS_IOMEM
88a442abbbSAnson Huang	depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
89a442abbbSAnson Huang	default y if SOC_IMX7D
90abf97755SAndrey Smirnov	select MFD_SYSCON
91abf97755SAndrey Smirnov	help
92abf97755SAndrey Smirnov	  This enables the reset controller driver for i.MX7 SoCs.
93abf97755SAndrey Smirnov
94c9aef213SDilip Kotaconfig RESET_INTEL_GW
95c9aef213SDilip Kota	bool "Intel Reset Controller Driver"
966ab9d621SGeert Uytterhoeven	depends on X86 || COMPILE_TEST
97b460e0a9SBrendan Higgins	depends on OF && HAS_IOMEM
98c9aef213SDilip Kota	select REGMAP_MMIO
99c9aef213SDilip Kota	help
100c9aef213SDilip Kota	  This enables the reset controller driver for Intel Gateway SoCs.
101c9aef213SDilip Kota	  Say Y to control the reset signals provided by reset controller.
102c9aef213SDilip Kota	  Otherwise, say N.
103c9aef213SDilip Kota
1045a2308daSDamien Le Moalconfig RESET_K210
1055a2308daSDamien Le Moal	bool "Reset controller driver for Canaan Kendryte K210 SoC"
106*68f41105SYangyu Chen	depends on (SOC_CANAAN_K210 || COMPILE_TEST) && OF
1075a2308daSDamien Le Moal	select MFD_SYSCON
108*68f41105SYangyu Chen	default SOC_CANAAN_K210
1095a2308daSDamien Le Moal	help
1105a2308daSDamien Le Moal	  Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
1115a2308daSDamien Le Moal	  Say Y if you want to control reset signals provided by this
1125a2308daSDamien Le Moal	  controller.
1135a2308daSDamien Le Moal
11479797b6fSMartin Blumenstinglconfig RESET_LANTIQ
11579797b6fSMartin Blumenstingl	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
11679797b6fSMartin Blumenstingl	default SOC_TYPE_XWAY
11779797b6fSMartin Blumenstingl	help
11879797b6fSMartin Blumenstingl	  This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
11979797b6fSMartin Blumenstingl
120cd7f4b81SPhilipp Zabelconfig RESET_LPC18XX
121cd7f4b81SPhilipp Zabel	bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
122cd7f4b81SPhilipp Zabel	default ARCH_LPC18XX
123cd7f4b81SPhilipp Zabel	help
124cd7f4b81SPhilipp Zabel	  This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
125cd7f4b81SPhilipp Zabel
126453ed428SSteen Hegelundconfig RESET_MCHP_SPARX5
127453ed428SSteen Hegelund	bool "Microchip Sparx5 reset driver"
1288c81620aSHoratiu Vultur	depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST
129453ed428SSteen Hegelund	default y if SPARX5_SWITCH
130453ed428SSteen Hegelund	select MFD_SYSCON
131453ed428SSteen Hegelund	help
132453ed428SSteen Hegelund	  This driver supports switch core reset for the Microchip Sparx5 SoC.
133453ed428SSteen Hegelund
13444336c24SPhilipp Zabelconfig RESET_MESON
1353bfe8933SNeil Armstrong	tristate "Meson Reset Driver"
1363bfe8933SNeil Armstrong	depends on ARCH_MESON || COMPILE_TEST
13744336c24SPhilipp Zabel	default ARCH_MESON
13844336c24SPhilipp Zabel	help
13944336c24SPhilipp Zabel	  This enables the reset driver for Amlogic Meson SoCs.
14044336c24SPhilipp Zabel
141d903779bSJerome Brunetconfig RESET_MESON_AUDIO_ARB
142d903779bSJerome Brunet	tristate "Meson Audio Memory Arbiter Reset Driver"
143d903779bSJerome Brunet	depends on ARCH_MESON || COMPILE_TEST
144d903779bSJerome Brunet	help
145d903779bSJerome Brunet	  This enables the reset driver for Audio Memory Arbiter of
146d903779bSJerome Brunet	  Amlogic's A113 based SoCs
147d903779bSJerome Brunet
1489c81b2ccSTomer Maimonconfig RESET_NPCM
1499c81b2ccSTomer Maimon	bool "NPCM BMC Reset Driver" if COMPILE_TEST
1509c81b2ccSTomer Maimon	default ARCH_NPCM
1519c81b2ccSTomer Maimon	help
1529c81b2ccSTomer Maimon	  This enables the reset controller driver for Nuvoton NPCM
1539c81b2ccSTomer Maimon	  BMC SoCs.
1549c81b2ccSTomer Maimon
155e4bb55d6SJacky Huangconfig RESET_NUVOTON_MA35D1
156aead1076SGeert Uytterhoeven	bool "Nuvoton MA35D1 Reset Driver"
157aead1076SGeert Uytterhoeven	depends on ARCH_MA35 || COMPILE_TEST
158aead1076SGeert Uytterhoeven	default ARCH_MA35
159e4bb55d6SJacky Huang	help
160e4bb55d6SJacky Huang	  This enables the reset controller driver for Nuvoton MA35D1 SoC.
161e4bb55d6SJacky Huang
162fab3f730SPhilipp Zabelconfig RESET_PISTACHIO
1634af16070SGeert Uytterhoeven	bool "Pistachio Reset Driver"
1644af16070SGeert Uytterhoeven	depends on MIPS || COMPILE_TEST
165fab3f730SPhilipp Zabel	help
166fab3f730SPhilipp Zabel	  This enables the reset driver for ImgTec Pistachio SoCs.
167fab3f730SPhilipp Zabel
16805f9e363SConor Dooleyconfig RESET_POLARFIRE_SOC
16905f9e363SConor Dooley	bool "Microchip PolarFire SoC (MPFS) Reset Driver"
170afb39e2bSPhilipp Zabel	depends on MCHP_CLK_MPFS
171afb39e2bSPhilipp Zabel	select AUXILIARY_BUS
17205f9e363SConor Dooley	default MCHP_CLK_MPFS
17305f9e363SConor Dooley	help
17405f9e363SConor Dooley	  This driver supports peripheral reset for the Microchip PolarFire SoC
17505f9e363SConor Dooley
1765ecb0651SSibi Sankarconfig RESET_QCOM_AOSS
177e2d5e833SJohn Stultz	tristate "Qcom AOSS Reset Driver"
1785ecb0651SSibi Sankar	depends on ARCH_QCOM || COMPILE_TEST
1795ecb0651SSibi Sankar	help
1805ecb0651SSibi Sankar	  This enables the AOSS (always on subsystem) reset driver
1815ecb0651SSibi Sankar	  for Qualcomm SDM845 SoCs. Say Y if you want to control
1825ecb0651SSibi Sankar	  reset signals provided by AOSS for Modem, Venus, ADSP,
1835ecb0651SSibi Sankar	  GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
1845ecb0651SSibi Sankar
185eea2926bSSibi Sankarconfig RESET_QCOM_PDC
186eea2926bSSibi Sankar	tristate "Qualcomm PDC Reset Driver"
187eea2926bSSibi Sankar	depends on ARCH_QCOM || COMPILE_TEST
188eea2926bSSibi Sankar	help
189eea2926bSSibi Sankar	  This enables the PDC (Power Domain Controller) reset driver
190eea2926bSSibi Sankar	  for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
191eea2926bSSibi Sankar	  to control reset signals provided by PDC for Modem, Compute,
192eea2926bSSibi Sankar	  Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
193eea2926bSSibi Sankar
194abffc82aSNicolas Saenz Julienneconfig RESET_RASPBERRYPI
195abffc82aSNicolas Saenz Julienne	tristate "Raspberry Pi 4 Firmware Reset Driver"
196abffc82aSNicolas Saenz Julienne	depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
197abffc82aSNicolas Saenz Julienne	default USB_XHCI_PCI
198abffc82aSNicolas Saenz Julienne	help
199abffc82aSNicolas Saenz Julienne	  Raspberry Pi 4's co-processor controls some of the board's HW
200abffc82aSNicolas Saenz Julienne	  initialization process, but it's up to Linux to trigger it when
201abffc82aSNicolas Saenz Julienne	  relevant. This driver provides a reset controller capable of
202abffc82aSNicolas Saenz Julienne	  interfacing with RPi4's co-processor and model these firmware
203abffc82aSNicolas Saenz Julienne	  initialization routines as reset lines.
204abffc82aSNicolas Saenz Julienne
205bee08559SBiju Dasconfig RESET_RZG2L_USBPHY_CTRL
206bee08559SBiju Das	tristate "Renesas RZ/G2L USBPHY control driver"
2079fe7dd4eSLad Prabhakar	depends on ARCH_RZG2L || COMPILE_TEST
208bee08559SBiju Das	help
209bee08559SBiju Das	  Support for USBPHY Control found on RZ/G2L family. It mainly
210bee08559SBiju Das	  controls reset and power down of the USB/PHY.
211bee08559SBiju Das
212c8ae9c2dSSudeep Hollaconfig RESET_SCMI
213c8ae9c2dSSudeep Holla	tristate "Reset driver controlled via ARM SCMI interface"
214c8ae9c2dSSudeep Holla	depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
215c8ae9c2dSSudeep Holla	default ARM_SCMI_PROTOCOL
216c8ae9c2dSSudeep Holla	help
217c8ae9c2dSSudeep Holla	  This driver provides support for reset signal/domains that are
218c8ae9c2dSSudeep Holla	  controlled by firmware that implements the SCMI interface.
219c8ae9c2dSSudeep Holla
220c8ae9c2dSSudeep Holla	  This driver uses SCMI Message Protocol to interact with the
221c8ae9c2dSSudeep Holla	  firmware controlling all the reset signals.
222c8ae9c2dSSudeep Holla
22381c22ad0SPhilipp Zabelconfig RESET_SIMPLE
22418d1909bSBen Dooks	bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
225a6166a4dSChen Wang	default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_SOPHGO || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
226c4ada3caSBen Dooks	depends on HAS_IOMEM
22781c22ad0SPhilipp Zabel	help
22881c22ad0SPhilipp Zabel	  This enables a simple reset controller driver for reset lines that
22981c22ad0SPhilipp Zabel	  that can be asserted and deasserted by toggling bits in a contiguous,
23081c22ad0SPhilipp Zabel	  exclusive register space.
23181c22ad0SPhilipp Zabel
2321d7592f8SJoel Stanley	  Currently this driver supports:
2331d7592f8SJoel Stanley	   - Altera SoCFPGAs
2341d7592f8SJoel Stanley	   - ASPEED BMC SoCs
2355ac33eebSAndreas Färber	   - Bitmain BM1880 SoC
2363ab831e5SAndreas Färber	   - Realtek SoCs
2371d7592f8SJoel Stanley	   - RCC reset controller in STM32 MCUs
2381d7592f8SJoel Stanley	   - Allwinner SoCs
239e4d368e0SGreentime Hu	   - SiFive FU740 SoCs
240a6166a4dSChen Wang	   - Sophgo SoCs
2417e0e901dSPhilipp Zabel
242b3ca9888SDinh Nguyenconfig RESET_SOCFPGA
243225c13f0SKrzysztof Kozlowski	bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
244225c13f0SKrzysztof Kozlowski	default ARM && ARCH_INTEL_SOCFPGA
245b3ca9888SDinh Nguyen	select RESET_SIMPLE
246b3ca9888SDinh Nguyen	help
247b3ca9888SDinh Nguyen	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
248b3ca9888SDinh Nguyen	  driver gets initialized early during platform init calls.
249b3ca9888SDinh Nguyen
250dbf018beSQin Jianconfig RESET_SUNPLUS
251dbf018beSQin Jian	bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
252dbf018beSQin Jian	default ARCH_SUNPLUS
253dbf018beSQin Jian	help
254dbf018beSQin Jian	  This enables the reset driver support for Sunplus SoCs.
255dbf018beSQin Jian	  The reset lines that can be asserted and deasserted by toggling bits
256dbf018beSQin Jian	  in a contiguous, exclusive register space. The register is HIWORD_MASKED,
257dbf018beSQin Jian	  which means each register holds 16 reset lines.
258dbf018beSQin Jian
2590ae08419SPhilipp Zabelconfig RESET_SUNXI
2600ae08419SPhilipp Zabel	bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
2610ae08419SPhilipp Zabel	default ARCH_SUNXI
262e13c205aSPhilipp Zabel	select RESET_SIMPLE
2630ae08419SPhilipp Zabel	help
2640ae08419SPhilipp Zabel	  This enables the reset driver for Allwinner SoCs.
2650ae08419SPhilipp Zabel
26628df169bSAndrew F. Davisconfig RESET_TI_SCI
26728df169bSAndrew F. Davis	tristate "TI System Control Interface (TI-SCI) reset driver"
26813678f3fSRandy Dunlap	depends on TI_SCI_PROTOCOL || (COMPILE_TEST && TI_SCI_PROTOCOL=n)
26928df169bSAndrew F. Davis	help
27028df169bSAndrew F. Davis	  This enables the reset driver support over TI System Control Interface
27128df169bSAndrew F. Davis	  available on some new TI's SoCs. If you wish to use reset resources
27228df169bSAndrew F. Davis	  managed by the TI System Controller, say Y here. Otherwise, say N.
27328df169bSAndrew F. Davis
274dd9bf863SSuman Annaconfig RESET_TI_SYSCON
275cc7c2bb1SAndrew F. Davis	tristate "TI SYSCON Reset Driver"
276cc7c2bb1SAndrew F. Davis	depends on HAS_IOMEM
277cc7c2bb1SAndrew F. Davis	select MFD_SYSCON
278cc7c2bb1SAndrew F. Davis	help
279cc7c2bb1SAndrew F. Davis	  This enables the reset driver support for TI devices with
280cc7c2bb1SAndrew F. Davis	  memory-mapped reset registers as part of a syscon device node. If
281cc7c2bb1SAndrew F. Davis	  you wish to use the reset framework for such memory-mapped devices,
282cc7c2bb1SAndrew F. Davis	  say Y here. Otherwise, say N.
283cc7c2bb1SAndrew F. Davis
2848a4e6154SMarco Felschconfig RESET_TI_TPS380X
2858a4e6154SMarco Felsch	tristate "TI TPS380x Reset Driver"
2868a4e6154SMarco Felsch	select GPIOLIB
2878a4e6154SMarco Felsch	help
2888a4e6154SMarco Felsch	  This enables the reset driver support for TI TPS380x devices. If
2898a4e6154SMarco Felsch	  you wish to use the reset framework for such devices, say Y here.
2908a4e6154SMarco Felsch	  Otherwise, say N.
2918a4e6154SMarco Felsch
2925cd3921dSRobert Markoconfig RESET_TN48M_CPLD
2935cd3921dSRobert Marko	tristate "Delta Networks TN48M switch CPLD reset controller"
2945cd3921dSRobert Marko	depends on MFD_TN48M_CPLD || COMPILE_TEST
2955cd3921dSRobert Marko	default MFD_TN48M_CPLD
2965cd3921dSRobert Marko	help
2975cd3921dSRobert Marko	  This enables the reset controller driver for the Delta TN48M CPLD.
2985cd3921dSRobert Marko	  It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X
2995cd3921dSRobert Marko	  switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and
3005cd3921dSRobert Marko	  Microchip PD69200 PoE PSE controller.
3015cd3921dSRobert Marko
3025cd3921dSRobert Marko	  This driver can also be built as a module. If so, the module will be
3035cd3921dSRobert Marko	  called reset-tn48m.
3045cd3921dSRobert Marko
30554e991b5SMasahiro Yamadaconfig RESET_UNIPHIER
30654e991b5SMasahiro Yamada	tristate "Reset controller driver for UniPhier SoCs"
30754e991b5SMasahiro Yamada	depends on ARCH_UNIPHIER || COMPILE_TEST
30854e991b5SMasahiro Yamada	depends on OF && MFD_SYSCON
30954e991b5SMasahiro Yamada	default ARCH_UNIPHIER
31054e991b5SMasahiro Yamada	help
31154e991b5SMasahiro Yamada	  Support for reset controllers on UniPhier SoCs.
31254e991b5SMasahiro Yamada	  Say Y if you want to control reset signals provided by System Control
31354e991b5SMasahiro Yamada	  block, Media I/O block, Peripheral Block.
31454e991b5SMasahiro Yamada
3153eb8f765SKunihiko Hayashiconfig RESET_UNIPHIER_GLUE
3163eb8f765SKunihiko Hayashi	tristate "Reset driver in glue layer for UniPhier SoCs"
317499fef09SKunihiko Hayashi	depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
318499fef09SKunihiko Hayashi	default ARCH_UNIPHIER
319499fef09SKunihiko Hayashi	select RESET_SIMPLE
320499fef09SKunihiko Hayashi	help
3213eb8f765SKunihiko Hayashi	  Support for peripheral core reset included in its own glue layer
3223eb8f765SKunihiko Hayashi	  on UniPhier SoCs. Say Y if you want to control reset signals
3233eb8f765SKunihiko Hayashi	  provided by the glue layer.
324499fef09SKunihiko Hayashi
3256f51b860SPhilipp Zabelconfig RESET_ZYNQ
3266f51b860SPhilipp Zabel	bool "ZYNQ Reset Driver" if COMPILE_TEST
3276f51b860SPhilipp Zabel	default ARCH_ZYNQ
3286f51b860SPhilipp Zabel	help
3296f51b860SPhilipp Zabel	  This enables the reset controller driver for Xilinx Zynq SoCs.
3306f51b860SPhilipp Zabel
33169bfec75SEmil Renner Berthingsource "drivers/reset/starfive/Kconfig"
332e5d76075SStephen Gallimoresource "drivers/reset/sti/Kconfig"
333f59d23c2SChen Fengsource "drivers/reset/hisilicon/Kconfig"
334dc606c52SThierry Redingsource "drivers/reset/tegra/Kconfig"
335998cd463SMasahiro Yamada
336998cd463SMasahiro Yamadaendif
337