1# SPDX-License-Identifier: GPL-2.0 2 3config HAVE_CLK 4 bool 5 help 6 The <linux/clk.h> calls support software clock gating and 7 thus are a key power management tool on many systems. 8 9config HAVE_CLK_PREPARE 10 bool 11 12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated 13 bool 14 select HAVE_CLK 15 help 16 Select this option when the clock API in <linux/clk.h> is implemented 17 by platform/architecture code. This method is deprecated. Modern 18 code should select COMMON_CLK instead and not define a custom 19 'struct clk'. 20 21menuconfig COMMON_CLK 22 bool "Common Clock Framework" 23 depends on !HAVE_LEGACY_CLK 24 select HAVE_CLK_PREPARE 25 select HAVE_CLK 26 select RATIONAL 27 help 28 The common clock framework is a single definition of struct 29 clk, useful across many platforms, as well as an 30 implementation of the clock API in include/linux/clk.h. 31 Architectures utilizing the common struct clk should select 32 this option. 33 34if COMMON_CLK 35 36config COMMON_CLK_WM831X 37 tristate "Clock driver for WM831x/2x PMICs" 38 depends on MFD_WM831X 39 help 40 Supports the clocking subsystem of the WM831x/2x series of 41 PMICs from Wolfson Microelectronics. 42 43source "drivers/clk/versatile/Kconfig" 44 45config CLK_HSDK 46 bool "PLL Driver for HSDK platform" 47 depends on ARC_SOC_HSDK || COMPILE_TEST 48 depends on HAS_IOMEM 49 help 50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs 51 control. 52 53config LMK04832 54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner" 55 depends on SPI 56 select REGMAP_SPI 57 help 58 Say yes here to build support for Texas Instruments' LMK04832 Ultra 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 60 61config COMMON_CLK_APPLE_NCO 62 tristate "Clock driver for Apple SoC NCOs" 63 depends on ARCH_APPLE || COMPILE_TEST 64 help 65 This driver supports NCO (Numerically Controlled Oscillator) blocks 66 found on Apple SoCs such as t8103 (M1). The blocks are typically 67 generators of audio clocks. 68 69config COMMON_CLK_MAX77686 70 tristate "Clock driver for Maxim 77620/77686/77802 MFD" 71 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST 72 help 73 This driver supports Maxim 77620/77686/77802 crystal oscillator 74 clock. 75 76config COMMON_CLK_MAX9485 77 tristate "Maxim 9485 Programmable Clock Generator" 78 depends on I2C 79 help 80 This driver supports Maxim 9485 Programmable Audio Clock Generator 81 82config COMMON_CLK_RK808 83 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" 84 depends on MFD_RK8XX 85 help 86 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. 87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 88 Clkout1 is always on, Clkout2 can off by control register. 89 90config COMMON_CLK_HI655X 91 tristate "Clock driver for Hi655x" if EXPERT 92 depends on (MFD_HI655X_PMIC || COMPILE_TEST) 93 select REGMAP 94 default MFD_HI655X_PMIC 95 help 96 This driver supports the hi655x PMIC clock. This 97 multi-function device has one fixed-rate oscillator, clocked 98 at 32KHz. 99 100config COMMON_CLK_SCMI 101 tristate "Clock driver controlled via SCMI interface" 102 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 103 help 104 This driver provides support for clocks that are controlled 105 by firmware that implements the SCMI interface. 106 107 This driver uses SCMI Message Protocol to interact with the 108 firmware providing all the clock controls. 109 110config COMMON_CLK_SCPI 111 tristate "Clock driver controlled via SCPI interface" 112 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST 113 help 114 This driver provides support for clocks that are controlled 115 by firmware that implements the SCPI interface. 116 117 This driver uses SCPI Message Protocol to interact with the 118 firmware providing all the clock controls. 119 120config COMMON_CLK_SI5341 121 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices" 122 depends on I2C 123 select REGMAP_I2C 124 help 125 This driver supports Silicon Labs Si5341 and Si5340 programmable clock 126 generators. Not all features of these chips are currently supported 127 by the driver, in particular it only supports XTAL input. The chip can 128 be pre-programmed to support other configurations and features not yet 129 implemented in the driver. 130 131config COMMON_CLK_SI5351 132 tristate "Clock driver for SiLabs 5351A/B/C" 133 depends on I2C 134 select REGMAP_I2C 135 help 136 This driver supports Silicon Labs 5351A/B/C programmable clock 137 generators. 138 139config COMMON_CLK_SI514 140 tristate "Clock driver for SiLabs 514 devices" 141 depends on I2C 142 depends on OF 143 select REGMAP_I2C 144 help 145 This driver supports the Silicon Labs 514 programmable clock 146 generator. 147 148config COMMON_CLK_SI544 149 tristate "Clock driver for SiLabs 544 devices" 150 depends on I2C 151 select REGMAP_I2C 152 help 153 This driver supports the Silicon Labs 544 programmable clock 154 generator. 155 156config COMMON_CLK_SI570 157 tristate "Clock driver for SiLabs 570 and compatible devices" 158 depends on I2C 159 depends on OF 160 select REGMAP_I2C 161 help 162 This driver supports Silicon Labs 570/571/598/599 programmable 163 clock generators. 164 165config COMMON_CLK_BM1880 166 bool "Clock driver for Bitmain BM1880 SoC" 167 depends on ARCH_BITMAIN || COMPILE_TEST 168 default ARCH_BITMAIN 169 help 170 This driver supports the clocks on Bitmain BM1880 SoC. 171 172config COMMON_CLK_CDCE706 173 tristate "Clock driver for TI CDCE706 clock synthesizer" 174 depends on I2C 175 select REGMAP_I2C 176 help 177 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 178 179config COMMON_CLK_TPS68470 180 tristate "Clock Driver for TI TPS68470 PMIC" 181 depends on I2C 182 depends on INTEL_SKL_INT3472 || COMPILE_TEST 183 select REGMAP_I2C 184 help 185 This driver supports the clocks provided by the TPS68470 PMIC. 186 187config COMMON_CLK_CDCE925 188 tristate "Clock driver for TI CDCE913/925/937/949 devices" 189 depends on I2C 190 depends on OF 191 select REGMAP_I2C 192 help 193 This driver supports the TI CDCE913/925/937/949 programmable clock 194 synthesizer. Each chip has different number of PLLs and outputs. 195 For example, the CDCE925 contains two PLLs with spread-spectrum 196 clocking support and five output dividers. The driver only supports 197 the following setup, and uses a fixed setting for the output muxes. 198 Y1 is derived from the input clock 199 Y2 and Y3 derive from PLL1 200 Y4 and Y5 derive from PLL2 201 Given a target output frequency, the driver will set the PLL and 202 divider to best approximate the desired output. 203 204config COMMON_CLK_CS2000_CP 205 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 206 depends on I2C 207 select REGMAP_I2C 208 help 209 If you say yes here you get support for the CS2000 clock multiplier. 210 211config COMMON_CLK_EN7523 212 bool "Clock driver for Airoha EN7523 SoC system clocks" 213 depends on OF 214 depends on ARCH_AIROHA || COMPILE_TEST 215 default ARCH_AIROHA 216 help 217 This driver provides the fixed clocks and gates present on Airoha 218 ARM silicon. 219 220config COMMON_CLK_EP93XX 221 tristate "Clock driver for Cirrus Logic ep93xx SoC" 222 depends on ARCH_EP93XX || COMPILE_TEST 223 select AUXILIARY_BUS 224 select REGMAP_MMIO 225 help 226 This driver supports the SoC clocks on the Cirrus Logic ep93xx. 227 228config COMMON_CLK_EYEQ 229 bool "Clock driver for the Mobileye EyeQ platform" 230 depends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST 231 select AUXILIARY_BUS 232 default MACH_EYEQ5 || MACH_EYEQ6H 233 help 234 This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H 235 SoCs. Controllers live in shared register regions called OLB. Driver 236 provides read-only PLLs, derived from the main crystal clock (which 237 must be constant). It also exposes some divider clocks. 238 239config COMMON_CLK_FSL_FLEXSPI 240 tristate "Clock driver for FlexSPI on Layerscape SoCs" 241 depends on ARCH_LAYERSCAPE || COMPILE_TEST 242 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI 243 help 244 On Layerscape SoCs there is a special clock for the FlexSPI 245 interface. 246 247config COMMON_CLK_FSL_SAI 248 bool "Clock driver for BCLK of Freescale SAI cores" 249 depends on ARCH_LAYERSCAPE || COMPILE_TEST 250 help 251 This driver supports the Freescale SAI (Synchronous Audio Interface) 252 to be used as a generic clock output. Some SoCs have restrictions 253 regarding the possible pin multiplexer settings. Eg. on some SoCs 254 two SAI interfaces can only be enabled together. If just one is 255 needed, the BCLK pin of the second one can be used as general 256 purpose clock output. Ideally, it can be used to drive an audio 257 codec (sometimes known as MCLK). 258 259config COMMON_CLK_GEMINI 260 bool "Clock driver for Cortina Systems Gemini SoC" 261 depends on ARCH_GEMINI || COMPILE_TEST 262 select MFD_SYSCON 263 select RESET_CONTROLLER 264 help 265 This driver supports the SoC clocks on the Cortina Systems Gemini 266 platform, also known as SL3516 or CS3516. 267 268config COMMON_CLK_LAN966X 269 tristate "Generic Clock Controller driver for LAN966X SoC" 270 depends on HAS_IOMEM 271 depends on OF 272 depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST 273 help 274 This driver provides support for Generic Clock Controller(GCK) on 275 LAN966X SoC. GCK generates and supplies clock to various peripherals 276 within the SoC. 277 278config COMMON_CLK_ASPEED 279 bool "Clock driver for Aspeed BMC SoCs" 280 depends on ARCH_ASPEED || COMPILE_TEST 281 default ARCH_ASPEED 282 select MFD_SYSCON 283 select RESET_CONTROLLER 284 help 285 This driver supports the SoC clocks on the Aspeed BMC platforms. 286 287 The G4 and G5 series, including the ast2400 and ast2500, are supported 288 by this driver. 289 290config COMMON_CLK_S2MPS11 291 tristate "Clock driver for S2MPS1X/S5M8767 MFD" 292 depends on MFD_SEC_CORE || COMPILE_TEST 293 help 294 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator 295 clock. These multi-function devices have two (S2MPS14) or three 296 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. 297 298config CLK_TWL 299 tristate "Clock driver for the TWL PMIC family" 300 depends on TWL4030_CORE 301 help 302 Enable support for controlling the clock resources on TWL family 303 PMICs. These devices have some 32K clock outputs which can be 304 controlled by software. For now, the TWL6032 and TWL6030 clocks are 305 supported. 306 307config CLK_TWL6040 308 tristate "External McPDM functional clock from twl6040" 309 depends on TWL6040_CORE 310 help 311 Enable the external functional clock support on OMAP4+ platforms for 312 McPDM. McPDM module is using the external bit clock on the McPDM bus 313 as functional clock. 314 315config COMMON_CLK_AXI_CLKGEN 316 tristate "AXI clkgen driver" 317 depends on HAS_IOMEM || COMPILE_TEST 318 depends on OF 319 help 320 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx 321 FPGAs. It is commonly used in Analog Devices' reference designs. 322 323config CLK_QORIQ 324 bool "Clock driver for Freescale QorIQ platforms" 325 depends on OF 326 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST 327 help 328 This adds the clock driver support for Freescale QorIQ platforms 329 using common clock framework. 330 331config CLK_LS1028A_PLLDIG 332 tristate "Clock driver for LS1028A Display output" 333 depends on ARCH_LAYERSCAPE || COMPILE_TEST 334 default ARCH_LAYERSCAPE 335 help 336 This driver support the Display output interfaces(LCD, DPHY) pixel clocks 337 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all 338 features of the PLL are currently supported by the driver. By default, 339 configured bypass mode with this PLL. 340 341config COMMON_CLK_XGENE 342 bool "Clock driver for APM XGene SoC" 343 default ARCH_XGENE 344 depends on ARM64 || COMPILE_TEST 345 help 346 Support for the APM X-Gene SoC reference, PLL, and device clocks. 347 348config COMMON_CLK_LOCHNAGAR 349 tristate "Cirrus Logic Lochnagar clock driver" 350 depends on MFD_LOCHNAGAR 351 help 352 This driver supports the clocking features of the Cirrus Logic 353 Lochnagar audio development board. 354 355config COMMON_CLK_NPCM8XX 356 tristate "Clock driver for the NPCM8XX SoC Family" 357 depends on ARCH_NPCM || COMPILE_TEST 358 help 359 This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family, 360 all the clocks are initialized by the bootloader, so this driver 361 allows only reading of current settings directly from the hardware. 362 363config COMMON_CLK_LOONGSON2 364 bool "Clock driver for Loongson-2 SoC" 365 depends on LOONGARCH || COMPILE_TEST 366 help 367 This driver provides support for clock controller on Loongson-2 SoC. 368 The clock controller can generates and supplies clock to various 369 peripherals within the SoC. 370 Say Y here to support Loongson-2 SoC clock driver. 371 372config COMMON_CLK_NXP 373 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) 374 select REGMAP_MMIO if ARCH_LPC32XX 375 select MFD_SYSCON if ARCH_LPC18XX 376 help 377 Support for clock providers on NXP platforms. 378 379config COMMON_CLK_PALMAS 380 tristate "Clock driver for TI Palmas devices" 381 depends on MFD_PALMAS 382 help 383 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO 384 using common clock framework. 385 386config COMMON_CLK_PWM 387 tristate "Clock driver for PWMs used as clock outputs" 388 depends on PWM 389 help 390 Adapter driver so that any PWM output can be (mis)used as clock signal 391 at 50% duty cycle. 392 393config COMMON_CLK_PXA 394 def_bool COMMON_CLK && ARCH_PXA 395 help 396 Support for the Marvell PXA SoC. 397 398config COMMON_CLK_RS9_PCIE 399 tristate "Clock driver for Renesas 9-series PCIe clock generators" 400 depends on I2C 401 depends on OF 402 select REGMAP_I2C 403 help 404 This driver supports the Renesas 9-series PCIe clock generator 405 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ. 406 407config COMMON_CLK_SI521XX 408 tristate "Clock driver for SkyWorks Si521xx PCIe clock generators" 409 depends on I2C 410 depends on OF 411 select REGMAP_I2C 412 help 413 This driver supports the SkyWorks Si521xx PCIe clock generator 414 models Si52144/Si52146/Si52147. 415 416config COMMON_CLK_VC3 417 tristate "Clock driver for Renesas VersaClock 3 devices" 418 depends on I2C 419 depends on OF 420 select REGMAP_I2C 421 help 422 This driver supports the Renesas VersaClock 3 programmable clock 423 generators. 424 425config COMMON_CLK_VC5 426 tristate "Clock driver for IDT VersaClock 5,6 devices" 427 depends on I2C 428 depends on OF 429 select REGMAP_I2C 430 help 431 This driver supports the IDT VersaClock 5 and VersaClock 6 432 programmable clock generators. 433 434config COMMON_CLK_VC7 435 tristate "Clock driver for Renesas Versaclock 7 devices" 436 depends on I2C 437 depends on OF 438 select REGMAP_I2C 439 help 440 Renesas Versaclock7 is a family of configurable clock generator 441 and jitter attenuator ICs with fractional and integer dividers. 442 443config COMMON_CLK_STM32F 444 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) 445 help 446 Support for stm32f4 and stm32f7 SoC families clocks 447 448config COMMON_CLK_STM32H7 449 def_bool COMMON_CLK && MACH_STM32H743 450 help 451 Support for stm32h7 SoC family clocks 452 453config COMMON_CLK_MMP2 454 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT) 455 help 456 Support for Marvell MMP2 and MMP3 SoC clocks 457 458config COMMON_CLK_MMP2_AUDIO 459 tristate "Clock driver for MMP2 Audio subsystem" 460 depends on COMMON_CLK_MMP2 || COMPILE_TEST 461 help 462 This driver supports clocks for Audio subsystem on MMP2 SoC. 463 464config COMMON_CLK_BD718XX 465 tristate "Clock driver for 32K clk gates on ROHM PMICs" 466 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828 467 help 468 This driver supports ROHM BD71837, BD71847, BD71850, BD71815 469 and BD71828 PMICs clock gates. 470 471config COMMON_CLK_FIXED_MMIO 472 bool "Clock driver for Memory Mapped Fixed values" 473 depends on COMMON_CLK && OF 474 depends on HAS_IOMEM 475 help 476 Support for Memory Mapped IO Fixed clocks 477 478config COMMON_CLK_K210 479 bool "Clock driver for the Canaan Kendryte K210 SoC" 480 depends on OF && RISCV && SOC_CANAAN_K210 481 default SOC_CANAAN_K210 482 help 483 Support for the Canaan Kendryte K210 RISC-V SoC clocks. 484 485config COMMON_CLK_SP7021 486 tristate "Clock driver for Sunplus SP7021 SoC" 487 depends on SOC_SP7021 || COMPILE_TEST 488 default SOC_SP7021 489 help 490 This driver supports the Sunplus SP7021 SoC clocks. 491 It implements SP7021 PLLs/gate. 492 Not all features of the PLL are currently supported 493 by the driver. 494 495source "drivers/clk/actions/Kconfig" 496source "drivers/clk/analogbits/Kconfig" 497source "drivers/clk/baikal-t1/Kconfig" 498source "drivers/clk/bcm/Kconfig" 499source "drivers/clk/hisilicon/Kconfig" 500source "drivers/clk/imgtec/Kconfig" 501source "drivers/clk/imx/Kconfig" 502source "drivers/clk/ingenic/Kconfig" 503source "drivers/clk/keystone/Kconfig" 504source "drivers/clk/mediatek/Kconfig" 505source "drivers/clk/meson/Kconfig" 506source "drivers/clk/mstar/Kconfig" 507source "drivers/clk/microchip/Kconfig" 508source "drivers/clk/mvebu/Kconfig" 509source "drivers/clk/nuvoton/Kconfig" 510source "drivers/clk/pistachio/Kconfig" 511source "drivers/clk/qcom/Kconfig" 512source "drivers/clk/ralink/Kconfig" 513source "drivers/clk/renesas/Kconfig" 514source "drivers/clk/rockchip/Kconfig" 515source "drivers/clk/samsung/Kconfig" 516source "drivers/clk/sifive/Kconfig" 517source "drivers/clk/socfpga/Kconfig" 518source "drivers/clk/sophgo/Kconfig" 519source "drivers/clk/spacemit/Kconfig" 520source "drivers/clk/sprd/Kconfig" 521source "drivers/clk/starfive/Kconfig" 522source "drivers/clk/sunxi/Kconfig" 523source "drivers/clk/sunxi-ng/Kconfig" 524source "drivers/clk/tegra/Kconfig" 525source "drivers/clk/thead/Kconfig" 526source "drivers/clk/stm32/Kconfig" 527source "drivers/clk/ti/Kconfig" 528source "drivers/clk/uniphier/Kconfig" 529source "drivers/clk/visconti/Kconfig" 530source "drivers/clk/x86/Kconfig" 531source "drivers/clk/xilinx/Kconfig" 532source "drivers/clk/zynqmp/Kconfig" 533 534# Kunit test cases 535config CLK_KUNIT_TEST 536 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS 537 depends on KUNIT 538 default KUNIT_ALL_TESTS 539 select DTC 540 help 541 Kunit tests for the common clock framework. 542 543config CLK_FIXED_RATE_KUNIT_TEST 544 tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS 545 depends on KUNIT 546 default KUNIT_ALL_TESTS 547 select DTC 548 help 549 KUnit tests for the basic fixed rate clk type. 550 551config CLK_GATE_KUNIT_TEST 552 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS 553 depends on KUNIT 554 depends on !S390 555 default KUNIT_ALL_TESTS 556 help 557 Kunit test for the basic clk gate type. 558 559config CLK_FD_KUNIT_TEST 560 tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS 561 depends on KUNIT 562 default KUNIT_ALL_TESTS 563 help 564 Kunit test for the clk-fractional-divider type. 565 566endif 567