1# SPDX-License-Identifier: GPL-2.0 2 3config HAVE_CLK 4 bool 5 help 6 The <linux/clk.h> calls support software clock gating and 7 thus are a key power management tool on many systems. 8 9config HAVE_CLK_PREPARE 10 bool 11 12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated 13 bool 14 select HAVE_CLK 15 help 16 Select this option when the clock API in <linux/clk.h> is implemented 17 by platform/architecture code. This method is deprecated. Modern 18 code should select COMMON_CLK instead and not define a custom 19 'struct clk'. 20 21menuconfig COMMON_CLK 22 bool "Common Clock Framework" 23 depends on !HAVE_LEGACY_CLK 24 select HAVE_CLK_PREPARE 25 select HAVE_CLK 26 select RATIONAL 27 help 28 The common clock framework is a single definition of struct 29 clk, useful across many platforms, as well as an 30 implementation of the clock API in include/linux/clk.h. 31 Architectures utilizing the common struct clk should select 32 this option. 33 34if COMMON_CLK 35 36config COMMON_CLK_WM831X 37 tristate "Clock driver for WM831x/2x PMICs" 38 depends on MFD_WM831X 39 help 40 Supports the clocking subsystem of the WM831x/2x series of 41 PMICs from Wolfson Microelectronics. 42 43source "drivers/clk/versatile/Kconfig" 44 45config CLK_HSDK 46 bool "PLL Driver for HSDK platform" 47 depends on ARC_SOC_HSDK || COMPILE_TEST 48 depends on HAS_IOMEM 49 help 50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs 51 control. 52 53config LMK04832 54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner" 55 depends on SPI 56 select REGMAP_SPI 57 help 58 Say yes here to build support for Texas Instruments' LMK04832 Ultra 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 60 61config COMMON_CLK_APPLE_NCO 62 tristate "Clock driver for Apple SoC NCOs" 63 depends on ARCH_APPLE || COMPILE_TEST 64 default ARCH_APPLE 65 help 66 This driver supports NCO (Numerically Controlled Oscillator) blocks 67 found on Apple SoCs such as t8103 (M1). The blocks are typically 68 generators of audio clocks. 69 70config COMMON_CLK_MAX77686 71 tristate "Clock driver for Maxim 77620/77686/77802 MFD" 72 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST 73 help 74 This driver supports Maxim 77620/77686/77802 crystal oscillator 75 clock. 76 77config COMMON_CLK_MAX9485 78 tristate "Maxim 9485 Programmable Clock Generator" 79 depends on I2C 80 help 81 This driver supports Maxim 9485 Programmable Audio Clock Generator 82 83config COMMON_CLK_RK808 84 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" 85 depends on MFD_RK8XX 86 help 87 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. 88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 89 Clkout1 is always on, Clkout2 can off by control register. 90 91config COMMON_CLK_RP1 92 tristate "Raspberry Pi RP1-based clock support" 93 depends on MISC_RP1 || COMPILE_TEST 94 default MISC_RP1 95 help 96 Enable common clock framework support for Raspberry Pi RP1. 97 This multi-function device has 3 main PLLs and several clock 98 generators to drive the internal sub-peripherals. 99 100config COMMON_CLK_HI655X 101 tristate "Clock driver for Hi655x" if EXPERT 102 depends on (MFD_HI655X_PMIC || COMPILE_TEST) 103 select REGMAP 104 default MFD_HI655X_PMIC 105 help 106 This driver supports the hi655x PMIC clock. This 107 multi-function device has one fixed-rate oscillator, clocked 108 at 32KHz. 109 110config COMMON_CLK_SCMI 111 tristate "Clock driver controlled via SCMI interface" 112 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 113 help 114 This driver provides support for clocks that are controlled 115 by firmware that implements the SCMI interface. 116 117 This driver uses SCMI Message Protocol to interact with the 118 firmware providing all the clock controls. 119 120config COMMON_CLK_SCPI 121 tristate "Clock driver controlled via SCPI interface" 122 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST 123 help 124 This driver provides support for clocks that are controlled 125 by firmware that implements the SCPI interface. 126 127 This driver uses SCPI Message Protocol to interact with the 128 firmware providing all the clock controls. 129 130config COMMON_CLK_SI5341 131 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices" 132 depends on I2C 133 select REGMAP_I2C 134 help 135 This driver supports Silicon Labs Si5341 and Si5340 programmable clock 136 generators. Not all features of these chips are currently supported 137 by the driver, in particular it only supports XTAL input. The chip can 138 be pre-programmed to support other configurations and features not yet 139 implemented in the driver. 140 141config COMMON_CLK_SI5351 142 tristate "Clock driver for SiLabs 5351A/B/C" 143 depends on I2C 144 select REGMAP_I2C 145 help 146 This driver supports Silicon Labs 5351A/B/C programmable clock 147 generators. 148 149config COMMON_CLK_SI514 150 tristate "Clock driver for SiLabs 514 devices" 151 depends on I2C 152 depends on OF 153 select REGMAP_I2C 154 help 155 This driver supports the Silicon Labs 514 programmable clock 156 generator. 157 158config COMMON_CLK_SI544 159 tristate "Clock driver for SiLabs 544 devices" 160 depends on I2C 161 select REGMAP_I2C 162 help 163 This driver supports the Silicon Labs 544 programmable clock 164 generator. 165 166config COMMON_CLK_SI570 167 tristate "Clock driver for SiLabs 570 and compatible devices" 168 depends on I2C 169 depends on OF 170 select REGMAP_I2C 171 help 172 This driver supports Silicon Labs 570/571/598/599 programmable 173 clock generators. 174 175config COMMON_CLK_BM1880 176 bool "Clock driver for Bitmain BM1880 SoC" 177 depends on ARCH_BITMAIN || COMPILE_TEST 178 default ARCH_BITMAIN 179 help 180 This driver supports the clocks on Bitmain BM1880 SoC. 181 182config COMMON_CLK_CDCE706 183 tristate "Clock driver for TI CDCE706 clock synthesizer" 184 depends on I2C 185 select REGMAP_I2C 186 help 187 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 188 189config COMMON_CLK_TPS68470 190 tristate "Clock Driver for TI TPS68470 PMIC" 191 depends on I2C 192 depends on INTEL_SKL_INT3472 || COMPILE_TEST 193 select REGMAP_I2C 194 help 195 This driver supports the clocks provided by the TPS68470 PMIC. 196 197config COMMON_CLK_CDCE925 198 tristate "Clock driver for TI CDCE913/925/937/949 devices" 199 depends on I2C 200 depends on OF 201 select REGMAP_I2C 202 help 203 This driver supports the TI CDCE913/925/937/949 programmable clock 204 synthesizer. Each chip has different number of PLLs and outputs. 205 For example, the CDCE925 contains two PLLs with spread-spectrum 206 clocking support and five output dividers. The driver only supports 207 the following setup, and uses a fixed setting for the output muxes. 208 Y1 is derived from the input clock 209 Y2 and Y3 derive from PLL1 210 Y4 and Y5 derive from PLL2 211 Given a target output frequency, the driver will set the PLL and 212 divider to best approximate the desired output. 213 214config COMMON_CLK_CS2000_CP 215 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 216 depends on I2C 217 select REGMAP_I2C 218 help 219 If you say yes here you get support for the CS2000 clock multiplier. 220 221config COMMON_CLK_EN7523 222 bool "Clock driver for Airoha EN7523 SoC system clocks" 223 depends on OF 224 depends on ARCH_AIROHA || COMPILE_TEST 225 default ARCH_AIROHA 226 help 227 This driver provides the fixed clocks and gates present on Airoha 228 ARM silicon. 229 230config COMMON_CLK_EP93XX 231 tristate "Clock driver for Cirrus Logic ep93xx SoC" 232 depends on ARCH_EP93XX || COMPILE_TEST 233 select AUXILIARY_BUS 234 select REGMAP_MMIO 235 help 236 This driver supports the SoC clocks on the Cirrus Logic ep93xx. 237 238config COMMON_CLK_EYEQ 239 bool "Clock driver for the Mobileye EyeQ platform" 240 depends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST 241 select AUXILIARY_BUS 242 default MACH_EYEQ5 || MACH_EYEQ6H 243 help 244 This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H 245 SoCs. Controllers live in shared register regions called OLB. Driver 246 provides read-only PLLs, derived from the main crystal clock (which 247 must be constant). It also exposes some divider clocks. 248 249config COMMON_CLK_FSL_FLEXSPI 250 tristate "Clock driver for FlexSPI on Layerscape SoCs" 251 depends on ARCH_LAYERSCAPE || COMPILE_TEST 252 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI 253 help 254 On Layerscape SoCs there is a special clock for the FlexSPI 255 interface. 256 257config COMMON_CLK_FSL_SAI 258 bool "Clock driver for BCLK of Freescale SAI cores" 259 depends on ARCH_LAYERSCAPE || COMPILE_TEST 260 help 261 This driver supports the Freescale SAI (Synchronous Audio Interface) 262 to be used as a generic clock output. Some SoCs have restrictions 263 regarding the possible pin multiplexer settings. Eg. on some SoCs 264 two SAI interfaces can only be enabled together. If just one is 265 needed, the BCLK pin of the second one can be used as general 266 purpose clock output. Ideally, it can be used to drive an audio 267 codec (sometimes known as MCLK). 268 269config COMMON_CLK_GEMINI 270 bool "Clock driver for Cortina Systems Gemini SoC" 271 depends on ARCH_GEMINI || COMPILE_TEST 272 select MFD_SYSCON 273 select RESET_CONTROLLER 274 help 275 This driver supports the SoC clocks on the Cortina Systems Gemini 276 platform, also known as SL3516 or CS3516. 277 278config COMMON_CLK_LAN966X 279 tristate "Generic Clock Controller driver for LAN966X SoC" 280 depends on HAS_IOMEM 281 depends on OF 282 depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST 283 help 284 This driver provides support for Generic Clock Controller(GCK) on 285 LAN966X SoC. GCK generates and supplies clock to various peripherals 286 within the SoC. 287 288config COMMON_CLK_ASPEED 289 bool "Clock driver for Aspeed BMC SoCs" 290 depends on ARCH_ASPEED || COMPILE_TEST 291 default ARCH_ASPEED 292 select MFD_SYSCON 293 select RESET_CONTROLLER 294 help 295 This driver supports the SoC clocks on the Aspeed BMC platforms. 296 297 The G4 and G5 series, including the ast2400 and ast2500, are supported 298 by this driver. 299 300config COMMON_CLK_S2MPS11 301 tristate "Clock driver for S2MPS1X/S5M8767 MFD" 302 depends on MFD_SEC_CORE || COMPILE_TEST 303 help 304 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator 305 clock. These multi-function devices have two (S2MPS14) or three 306 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. 307 308config CLK_TWL 309 tristate "Clock driver for the TWL PMIC family" 310 depends on TWL4030_CORE 311 help 312 Enable support for controlling the clock resources on TWL family 313 PMICs. These devices have some 32K clock outputs which can be 314 controlled by software. For now, the TWL6032 and TWL6030 clocks are 315 supported. 316 317config CLK_TWL6040 318 tristate "External McPDM functional clock from twl6040" 319 depends on TWL6040_CORE 320 help 321 Enable the external functional clock support on OMAP4+ platforms for 322 McPDM. McPDM module is using the external bit clock on the McPDM bus 323 as functional clock. 324 325config COMMON_CLK_AXI_CLKGEN 326 tristate "AXI clkgen driver" 327 depends on HAS_IOMEM || COMPILE_TEST 328 depends on OF 329 help 330 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx 331 FPGAs. It is commonly used in Analog Devices' reference designs. 332 333config CLK_QORIQ 334 bool "Clock driver for Freescale QorIQ platforms" 335 depends on OF 336 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST 337 help 338 This adds the clock driver support for Freescale QorIQ platforms 339 using common clock framework. 340 341config CLK_LS1028A_PLLDIG 342 tristate "Clock driver for LS1028A Display output" 343 depends on ARCH_LAYERSCAPE || COMPILE_TEST 344 default ARCH_LAYERSCAPE 345 help 346 This driver support the Display output interfaces(LCD, DPHY) pixel clocks 347 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all 348 features of the PLL are currently supported by the driver. By default, 349 configured bypass mode with this PLL. 350 351config COMMON_CLK_XGENE 352 bool "Clock driver for APM XGene SoC" 353 default ARCH_XGENE 354 depends on ARM64 || COMPILE_TEST 355 help 356 Support for the APM X-Gene SoC reference, PLL, and device clocks. 357 358config COMMON_CLK_LOCHNAGAR 359 tristate "Cirrus Logic Lochnagar clock driver" 360 depends on MFD_LOCHNAGAR 361 help 362 This driver supports the clocking features of the Cirrus Logic 363 Lochnagar audio development board. 364 365config COMMON_CLK_NPCM8XX 366 tristate "Clock driver for the NPCM8XX SoC Family" 367 depends on ARCH_NPCM || COMPILE_TEST 368 help 369 This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family, 370 all the clocks are initialized by the bootloader, so this driver 371 allows only reading of current settings directly from the hardware. 372 373config COMMON_CLK_LOONGSON2 374 bool "Clock driver for Loongson-2 SoC" 375 depends on LOONGARCH || COMPILE_TEST 376 help 377 This driver provides support for clock controller on Loongson-2 SoC. 378 The clock controller can generates and supplies clock to various 379 peripherals within the SoC. 380 Say Y here to support Loongson-2 SoC clock driver. 381 382config COMMON_CLK_NXP 383 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) 384 select REGMAP_MMIO if ARCH_LPC32XX 385 select MFD_SYSCON if ARCH_LPC18XX 386 help 387 Support for clock providers on NXP platforms. 388 389config COMMON_CLK_PALMAS 390 tristate "Clock driver for TI Palmas devices" 391 depends on MFD_PALMAS 392 help 393 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO 394 using common clock framework. 395 396config COMMON_CLK_PWM 397 tristate "Clock driver for PWMs used as clock outputs" 398 depends on PWM 399 help 400 Adapter driver so that any PWM output can be (mis)used as clock signal 401 at 50% duty cycle. 402 403config COMMON_CLK_PXA 404 def_bool COMMON_CLK && ARCH_PXA 405 help 406 Support for the Marvell PXA SoC. 407 408config COMMON_CLK_RS9_PCIE 409 tristate "Clock driver for Renesas 9-series PCIe clock generators" 410 depends on I2C 411 depends on OF 412 select REGMAP_I2C 413 help 414 This driver supports the Renesas 9-series PCIe clock generator 415 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ. 416 417config COMMON_CLK_SI521XX 418 tristate "Clock driver for SkyWorks Si521xx PCIe clock generators" 419 depends on I2C 420 depends on OF 421 select REGMAP_I2C 422 help 423 This driver supports the SkyWorks Si521xx PCIe clock generator 424 models Si52144/Si52146/Si52147. 425 426config COMMON_CLK_VC3 427 tristate "Clock driver for Renesas VersaClock 3 devices" 428 depends on I2C 429 depends on OF 430 select REGMAP_I2C 431 help 432 This driver supports the Renesas VersaClock 3 programmable clock 433 generators. 434 435config COMMON_CLK_VC5 436 tristate "Clock driver for IDT VersaClock 5,6 devices" 437 depends on I2C 438 depends on OF 439 select REGMAP_I2C 440 help 441 This driver supports the IDT VersaClock 5 and VersaClock 6 442 programmable clock generators. 443 444config COMMON_CLK_VC7 445 tristate "Clock driver for Renesas Versaclock 7 devices" 446 depends on I2C 447 depends on OF 448 select REGMAP_I2C 449 help 450 Renesas Versaclock7 is a family of configurable clock generator 451 and jitter attenuator ICs with fractional and integer dividers. 452 453config COMMON_CLK_STM32F 454 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) 455 help 456 Support for stm32f4 and stm32f7 SoC families clocks 457 458config COMMON_CLK_STM32H7 459 def_bool COMMON_CLK && MACH_STM32H743 460 help 461 Support for stm32h7 SoC family clocks 462 463config COMMON_CLK_MMP2 464 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT) 465 help 466 Support for Marvell MMP2 and MMP3 SoC clocks 467 468config COMMON_CLK_MMP2_AUDIO 469 tristate "Clock driver for MMP2 Audio subsystem" 470 depends on COMMON_CLK_MMP2 || COMPILE_TEST 471 help 472 This driver supports clocks for Audio subsystem on MMP2 SoC. 473 474config COMMON_CLK_BD718XX 475 tristate "Clock driver for 32K clk gates on ROHM PMICs" 476 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828 477 help 478 This driver supports ROHM BD71837, BD71847, BD71850, BD71815 479 and BD71828 PMICs clock gates. 480 481config COMMON_CLK_FIXED_MMIO 482 bool "Clock driver for Memory Mapped Fixed values" 483 depends on COMMON_CLK && OF 484 depends on HAS_IOMEM 485 help 486 Support for Memory Mapped IO Fixed clocks 487 488config COMMON_CLK_K210 489 bool "Clock driver for the Canaan Kendryte K210 SoC" 490 depends on OF && RISCV && SOC_CANAAN_K210 491 default SOC_CANAAN_K210 492 help 493 Support for the Canaan Kendryte K210 RISC-V SoC clocks. 494 495config COMMON_CLK_SP7021 496 tristate "Clock driver for Sunplus SP7021 SoC" 497 depends on SOC_SP7021 || COMPILE_TEST 498 default SOC_SP7021 499 help 500 This driver supports the Sunplus SP7021 SoC clocks. 501 It implements SP7021 PLLs/gate. 502 Not all features of the PLL are currently supported 503 by the driver. 504 505source "drivers/clk/actions/Kconfig" 506source "drivers/clk/analogbits/Kconfig" 507source "drivers/clk/baikal-t1/Kconfig" 508source "drivers/clk/bcm/Kconfig" 509source "drivers/clk/hisilicon/Kconfig" 510source "drivers/clk/imgtec/Kconfig" 511source "drivers/clk/imx/Kconfig" 512source "drivers/clk/ingenic/Kconfig" 513source "drivers/clk/keystone/Kconfig" 514source "drivers/clk/mediatek/Kconfig" 515source "drivers/clk/meson/Kconfig" 516source "drivers/clk/mstar/Kconfig" 517source "drivers/clk/microchip/Kconfig" 518source "drivers/clk/mvebu/Kconfig" 519source "drivers/clk/nuvoton/Kconfig" 520source "drivers/clk/pistachio/Kconfig" 521source "drivers/clk/qcom/Kconfig" 522source "drivers/clk/ralink/Kconfig" 523source "drivers/clk/renesas/Kconfig" 524source "drivers/clk/rockchip/Kconfig" 525source "drivers/clk/samsung/Kconfig" 526source "drivers/clk/sifive/Kconfig" 527source "drivers/clk/socfpga/Kconfig" 528source "drivers/clk/sophgo/Kconfig" 529source "drivers/clk/spacemit/Kconfig" 530source "drivers/clk/sprd/Kconfig" 531source "drivers/clk/starfive/Kconfig" 532source "drivers/clk/sunxi/Kconfig" 533source "drivers/clk/sunxi-ng/Kconfig" 534source "drivers/clk/tegra/Kconfig" 535source "drivers/clk/thead/Kconfig" 536source "drivers/clk/stm32/Kconfig" 537source "drivers/clk/ti/Kconfig" 538source "drivers/clk/uniphier/Kconfig" 539source "drivers/clk/visconti/Kconfig" 540source "drivers/clk/x86/Kconfig" 541source "drivers/clk/xilinx/Kconfig" 542source "drivers/clk/zynqmp/Kconfig" 543 544# Kunit test cases 545config CLK_KUNIT_TEST 546 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS 547 depends on KUNIT 548 default KUNIT_ALL_TESTS 549 select DTC 550 help 551 Kunit tests for the common clock framework. 552 553config CLK_FIXED_RATE_KUNIT_TEST 554 tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS 555 depends on KUNIT 556 default KUNIT_ALL_TESTS 557 select DTC 558 help 559 KUnit tests for the basic fixed rate clk type. 560 561config CLK_GATE_KUNIT_TEST 562 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS 563 depends on KUNIT 564 depends on !S390 565 default KUNIT_ALL_TESTS 566 help 567 Kunit test for the basic clk gate type. 568 569config CLK_FD_KUNIT_TEST 570 tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS 571 depends on KUNIT 572 default KUNIT_ALL_TESTS 573 help 574 Kunit test for the clk-fractional-divider type. 575 576endif 577