1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* Copyright (c) 2020-2025 Microchip Technology Inc */ 3 4/dts-v1/; 5 6#include "mpfs.dtsi" 7#include "mpfs-disco-kit-fabric.dtsi" 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10 11/ { 12 model = "Microchip PolarFire-SoC Discovery Kit"; 13 compatible = "microchip,mpfs-disco-kit-reference-rtl-v2507", 14 "microchip,mpfs-disco-kit", 15 "microchip,mpfs"; 16 17 aliases { 18 ethernet0 = &mac0; 19 serial4 = &mmuart4; 20 }; 21 22 chosen { 23 stdout-path = "serial4:115200n8"; 24 }; 25 26 leds { 27 compatible = "gpio-leds"; 28 29 led-1 { 30 gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; 31 color = <LED_COLOR_ID_AMBER>; 32 label = "led1"; 33 }; 34 35 led-2 { 36 gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; 37 color = <LED_COLOR_ID_RED>; 38 label = "led2"; 39 }; 40 41 led-3 { 42 gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; 43 color = <LED_COLOR_ID_AMBER>; 44 label = "led3"; 45 }; 46 47 led-4 { 48 gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; 49 color = <LED_COLOR_ID_RED>; 50 label = "led4"; 51 }; 52 53 led-5 { 54 gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; 55 color = <LED_COLOR_ID_AMBER>; 56 label = "led5"; 57 }; 58 59 led-6 { 60 gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; 61 color = <LED_COLOR_ID_RED>; 62 label = "led6"; 63 }; 64 65 led-7 { 66 gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>; 67 color = <LED_COLOR_ID_AMBER>; 68 label = "led7"; 69 }; 70 71 led-8 { 72 gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 73 color = <LED_COLOR_ID_RED>; 74 label = "led8"; 75 }; 76 }; 77 78 ddrc_cache_lo: memory@80000000 { 79 device_type = "memory"; 80 reg = <0x0 0x80000000 0x0 0x40000000>; 81 }; 82 83 reserved-memory { 84 #address-cells = <2>; 85 #size-cells = <2>; 86 ranges; 87 88 hss_payload: region@bfc00000 { 89 reg = <0x0 0xbfc00000 0x0 0x400000>; 90 no-map; 91 }; 92 }; 93}; 94 95&core_pwm0 { 96 status = "okay"; 97}; 98 99&gpio1 { 100 interrupts = <27>, <28>, <29>, <30>, 101 <31>, <32>, <33>, <47>, 102 <35>, <36>, <37>, <38>, 103 <39>, <40>, <41>, <42>, 104 <43>, <44>, <45>, <46>, 105 <47>, <48>, <49>, <50>; 106 status = "okay"; 107}; 108 109&gpio2 { 110 interrupts = <53>, <53>, <53>, <53>, 111 <53>, <53>, <53>, <53>, 112 <53>, <53>, <53>, <53>, 113 <53>, <53>, <53>, <53>, 114 <53>, <53>, <53>, <53>, 115 <53>, <53>, <53>, <53>, 116 <53>, <53>, <53>, <53>, 117 <53>, <53>, <53>, <53>; 118 status = "okay"; 119}; 120 121&i2c0 { 122 status = "okay"; 123}; 124 125&i2c2 { 126 status = "okay"; 127}; 128 129&ihc { 130 status = "okay"; 131}; 132 133&mac0 { 134 phy-mode = "sgmii"; 135 phy-handle = <&phy0>; 136 status = "okay"; 137 138 phy0: ethernet-phy@b { 139 reg = <0xb>; 140 }; 141}; 142 143&mbox { 144 status = "okay"; 145}; 146 147&mmc { 148 bus-width = <4>; 149 disable-wp; 150 cap-sd-highspeed; 151 cap-mmc-highspeed; 152 sd-uhs-sdr12; 153 sd-uhs-sdr25; 154 sd-uhs-sdr50; 155 sd-uhs-sdr104; 156 no-1-8-v; 157 status = "okay"; 158}; 159 160&mmuart1 { 161 status = "okay"; 162}; 163 164&mmuart4 { 165 status = "okay"; 166}; 167 168&refclk { 169 clock-frequency = <125000000>; 170}; 171 172&refclk_ccc { 173 clock-frequency = <50000000>; 174}; 175 176&rtc { 177 status = "okay"; 178}; 179 180&spi0 { 181 status = "okay"; 182}; 183 184&spi1 { 185 status = "okay"; 186}; 187 188&syscontroller { 189 status = "okay"; 190}; 191