Merge tag 'soc-dt-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC dt updates from Arnd Bergmann:
"There are five sets of new SoCs that get added in existing families,
all

Merge tag 'soc-dt-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC dt updates from Arnd Bergmann:
"There are five sets of new SoCs that get added in existing families,
all of them being either upgrades or cut-down versions of the older
chips:

- Apple M2 Pro, M2 Max and M2 Ultra, used in the 2022/2023 generation
of high-end workstations and laptops from Apple. Linux has been
working on these for a while but stil requires patches.

- Axis Artpec8 is an Armv8 chip based on Samsung Exynos design,
unlike the earlier Armv7 Artpec6 from the same company that was
part of a separate family of chips.

- NXP i.MX91 is a cut-down version of i.MX93, using only a single
Cortex-A55 core.

- Qualcomm Lemans Auto is a variant of the Lemans SoC that was
originally merged under the sa8775p name, the differences being
mostly the firmware configuration of the platform.

- Four new Renesas SoCs RZ/T2H (r9a09g077m44), RZ/N2H (r9a09g087m44),
RZ/T2H (r9a09g077), and RZ/N2H (r9a09g087) are all industrial
bedded SoCs based on Cortex-A55 cores

In total, there are 65 new machines, including:

- Industrial embedded system and single-board computers based on NXP,
Allwinner, TI, Rockchips, Marvell, Xilinx Spacemit, Starfive chips.

- Reference boards for the newly added Renesas, Qualcomm, NXP and
Axis ARMv8 chips as well as Microchip's MPFS RISC-V SoC

- Laptops and Workstations using Apple M2 and Qualcomm Snapdragon X1
chips.

- Several Samsung phones using Qualcomm Snapdragon chips

- Set-top boxes based on Allwinner H313

- Five BMC boards using 32-bit ASpeed SoCs

- Three network routers using IXP4xx (ARMv5!) and Broadcom bcm4708
(ARMv7) SoCs

Two machines get phased out because they were available only in small
quantities but never made it into products: one STi407 based reference
board, and a Snapdragon 845 based Chromebook.

Aside from the newly added machines, a lot of work went into improving
hardware support on the existing machines and cleaning up contents for
validation"

* tag 'soc-dt-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (931 commits)
arm64: dts: apm-shadowcat: Drop "apm,xgene2-pcie" compatible
arm64: dts: apm-shadowcat: Move slimpro nodes out of "simple-bus" node
ARM: dts: microchip: sam9x7: Add qspi controller
arm64: dts: qcom: Add MST pixel streams for displayport
arm64: dts: qcom: sm6350: correct DP compatibility strings
arm64: dts: qcom: monaco-evk: Enable Adreno 623 GPU
arm64: dts: qcom: qcs8300-ride: Enable Adreno 623 GPU
arm64: dts: qcom: qcs8300: Add gpu and gmu nodes
arm64: dts: allwinner: h313: Add Amediatech X96Q
dt-bindings: arm: sunxi: Add Amediatech X96Q
arm64: dts: apple: t8015: Add SPMI node
arm64: dts: apple: t8012: Add SPMI node
arm64: dts: apple: Add J180d (Mac Pro, M2 Ultra, 2023) device tree
arm64: dts: rockchip: Add devicetree for the ROC-RK3588-RT
dt-bindings: arm: rockchip: Add Firefly ROC-RK3588-RT
arm64: dts: rockchip: update pinctrl names for Radxa E52C
arm64: dts: rockchip: remove vcc_3v3_pmu regulator for Radxa E52C
arm64: dts: apple: Add J474s, J475c and J475d device trees
arm64: dts: apple: Add J414 and J416 Macbook Pro device trees
arm64: dts: apple: Add initial t6020/t6021/t6022 DTs
...

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Merge tag 'riscv-dt-for-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Misc Devicetrees for v6.18

Starfive:
The main new addition is support for the JH7110

Merge tag 'riscv-dt-for-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Misc Devicetrees for v6.18

Starfive:
The main new addition is support for the JH7110 Milk-V Mars CM lite SoM.
Other than that, there's several cleanups done to the common JH7110 dtsi
file, some relating to properties used by U-Boot or encountered during
U-Boot development. Additionally, there's a binding and devicetree node
for the memory controller on the JH7110. The memory controller only sees
use in U-Boot, so the binding is here rather than in Krzysztof's
branch.

SiFive:
Support for SiFive vendor-specific extensions in the binding file for
extensions. These currently only see use in the SBI implementation.

Microchip:
Addition of support for the PolarFire SoC Discovery kit and
non-engineering sample Icicle kit. The latter differs very slightly from
the final ES devices due to bug fixes affecting functionality, and needs
its own dts. To reduce duplication, the common portion of the two Icicle
kits are moved into a dtsi. There's a few minor fixes here too, mostly
low-hanging fruit detected during the addition of the Discovery kit that
were then applied to the Icicle.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: add Milk-V Mars CM Lite system-on-module
dt-bindings: riscv: starfive: add milkv,marscm-lite
riscv: dts: starfive: add Milk-V Mars CM system-on-module
dt-bindings: riscv: starfive: add milkv,marscm-emmc
riscv: dts: starfive: add common board dtsi for Milk-V Mars CM variants
riscv: dts: microchip: add a device tree for Discovery Kit
dt-bindings: riscv: microchip: document Discovery Kit
riscv: dts: microchip: rename icicle kit ccc clock and other minor fixes
riscv: dts: microchip: add icicle kit with production device
dt-bindings: riscv: microchip: document icicle kit with production device
riscv: dts: microchip: add common board dtsi for icicle kit variants
riscv: dts: starfive: jh7110-common: drop mmc post-power-on-delay-ms
riscv: dts: starfive: jh7110-common: drop no-mmc property from mmc1
riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader
riscv: dts: starfive: jh7110: add DMC memory controller
dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC
riscv: dts: starfive: jh7110-common: drop no-sdio property from mmc1
riscv: dts: microchip: Minor whitespace cleanup
dt-bindings: riscv: Add SiFive vendor extensions description

Link: https://lore.kernel.org/r/20250924-frighten-magazine-ee2f16e64638@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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riscv: dts: microchip: add a device tree for Discovery Kit

Add a minimal device tree for the Microchip PolarFire SoC Discovery Kit.
The Discovery Kit is a cost-optimized board based on PolarFire SoC

riscv: dts: microchip: add a device tree for Discovery Kit

Add a minimal device tree for the Microchip PolarFire SoC Discovery Kit.
The Discovery Kit is a cost-optimized board based on PolarFire SoC
MPFS095T and features:

- 1 GB DDR4x16
- 1x Gigabit Ethernet
- 3x UARTs
- Raspberry Pi connector
- mikroBus connector
- microSD card connector

Link: https://www.microchip.com/en-us/development-tool/mpfs-disco-kit
Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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