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Searched refs:dpm_level (Results 1 – 25 of 29) sorted by relevance

12

/linux/drivers/accel/amdxdna/
H A Daie2_pm.c30 int aie2_pm_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level) in aie2_pm_set_dpm() argument
38 ret = ndev->priv->hw_ops.set_dpm(ndev, dpm_level); in aie2_pm_set_dpm()
40 ndev->dpm_level = dpm_level; in aie2_pm_set_dpm()
52 ret = ndev->priv->hw_ops.set_dpm(ndev, ndev->dpm_level); in aie2_pm_init()
70 ndev->dpm_level = ndev->max_dpm_level; in aie2_pm_init()
85 u32 clk_gating, dpm_level; in aie2_pm_set_mode() local
101 dpm_level = ndev->max_dpm_level; in aie2_pm_set_mode()
105 dpm_level = ndev->max_dpm_level; in aie2_pm_set_mode()
109 dpm_level = ndev->dft_dpm_level; in aie2_pm_set_mode()
115 ret = aie2_pm_set_dpm(ndev, dpm_level); in aie2_pm_set_mode()
H A Daie2_solver.c29 u32 dpm_level; member
112 static int set_dpm_level(struct solver_state *xrs, struct alloc_requests *req, u32 *dpm_level) in set_dpm_level() argument
136 if (node->dpm_level > level) in set_dpm_level()
137 level = node->dpm_level; in set_dpm_level()
141 *dpm_level = level; in set_dpm_level()
304 u32 dpm_level; in xrs_allocate_resource() local
329 ret = set_dpm_level(xrs, req, &dpm_level); in xrs_allocate_resource()
333 snode->dpm_level = dpm_level; in xrs_allocate_resource()
H A Daie2_pci.h198 u32 dpm_level; member
229 int (*set_dpm)(struct amdxdna_dev_hdl *ndev, u32 dpm_level);
283 int npu1_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level);
284 int npu4_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level);
289 int aie2_pm_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level);
H A Daie2_pci.c300 static int aie2_xrs_set_dft_dpm_level(struct drm_device *ddev, u32 dpm_level) in aie2_xrs_set_dft_dpm_level() argument
308 ndev->dft_dpm_level = dpm_level; in aie2_xrs_set_dft_dpm_level()
309 if (ndev->pw_mode != POWER_MODE_DEFAULT || ndev->dpm_level == dpm_level) in aie2_xrs_set_dft_dpm_level()
312 return aie2_pm_set_dpm(ndev, dpm_level); in aie2_xrs_set_dft_dpm_level()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c638 uint32_t dpm_level, in smu_v14_0_1_get_dpm_freq_by_index() argument
648 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
650 *freq = clk_table->SocClocks[dpm_level]; in smu_v14_0_1_get_dpm_freq_by_index()
653 if (dpm_level >= clk_table->Vcn0ClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
655 *freq = clk_table->VClocks0[dpm_level]; in smu_v14_0_1_get_dpm_freq_by_index()
658 if (dpm_level >= clk_table->Vcn0ClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
660 *freq = clk_table->DClocks0[dpm_level]; in smu_v14_0_1_get_dpm_freq_by_index()
663 if (dpm_level >= clk_table->Vcn1ClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
665 *freq = clk_table->VClocks1[dpm_level]; in smu_v14_0_1_get_dpm_freq_by_index()
668 if (dpm_level >= clk_table->Vcn1ClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c526 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v13_0_5_od_edit_dpm_table()
662 uint32_t dpm_level, in smu_v13_0_5_get_dpm_freq_by_index() argument
672 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
674 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
677 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
679 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
682 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
684 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
688 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
690 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_5_get_dpm_freq_by_index()
[all …]
H A Dsmu_v13_0_4_ppt.c431 uint32_t dpm_level, in smu_v13_0_4_get_dpm_freq_by_index() argument
441 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
443 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
446 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
448 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
451 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
453 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
457 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
459 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_4_get_dpm_freq_by_index()
462 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
[all …]
H A Dyellow_carp_ppt.c657 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in yellow_carp_od_edit_dpm_table()
796 uint32_t dpm_level, in yellow_carp_get_dpm_freq_by_index() argument
806 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
808 *freq = clk_table->SocClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
811 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
813 *freq = clk_table->VClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
816 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
818 *freq = clk_table->DClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
822 if (dpm_level >= clk_table->NumDfPstatesEnabled) in yellow_carp_get_dpm_freq_by_index()
824 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in yellow_carp_get_dpm_freq_by_index()
[all …]
H A Daldebaran_ppt.c1203 if ((smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) && in aldebaran_set_performance_level()
1250 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in aldebaran_set_soft_freq_limited_range()
1251 && (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in aldebaran_set_soft_freq_limited_range()
1254 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { in aldebaran_set_soft_freq_limited_range()
1275 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { in aldebaran_set_soft_freq_limited_range()
1313 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in aldebaran_usr_edit_dpm_table()
1314 && (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in aldebaran_usr_edit_dpm_table()
H A Dsmu_v13_0_6_ppt.c1978 if ((smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) && in smu_v13_0_6_set_performance_level()
2046 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) && in smu_v13_0_6_set_soft_freq_limited_range()
2047 (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in smu_v13_0_6_set_soft_freq_limited_range()
2050 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { in smu_v13_0_6_set_soft_freq_limited_range()
2087 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { in smu_v13_0_6_set_soft_freq_limited_range()
2131 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) && in smu_v13_0_6_usr_edit_dpm_table()
2132 (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in smu_v13_0_6_usr_edit_dpm_table()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c196 uint32_t dpm_level, uint32_t *freq) in renoir_get_dpm_clk_limited() argument
205 if (dpm_level >= NUM_SOCCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
207 *freq = clk_table->SocClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
211 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
213 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
216 if (dpm_level >= NUM_DCFCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
218 *freq = clk_table->DcfClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
221 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
223 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
226 if (dpm_level >= NUM_VCN_DPM_LEVELS) in renoir_get_dpm_clk_limited()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0_0_ppt.c716 uint32_t dpm_level, in smu_v15_0_0_get_dpm_freq_by_index() argument
726 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
728 *freq = clk_table->SocClocks[dpm_level]; in smu_v15_0_0_get_dpm_freq_by_index()
731 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
733 *freq = clk_table->VClocks[dpm_level]; in smu_v15_0_0_get_dpm_freq_by_index()
736 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
738 *freq = clk_table->DClocks[dpm_level]; in smu_v15_0_0_get_dpm_freq_by_index()
742 if (dpm_level >= clk_table->NumMemPstatesEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
744 *freq = clk_table->MemPstateTable[dpm_level].MemClk; in smu_v15_0_0_get_dpm_freq_by_index()
747 if (dpm_level >= clk_table->NumFclkLevelsEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
[all …]
H A Dsmu_v15_0.c1736 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v15_0_od_edit_dpm_table()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.c355 dpm_table->dpm_level[i].enabled = false; in phm_reset_single_dpm_table()
366 dpm_table->dpm_level[index].value = pcie_gen; in phm_setup_pcie_table_entry()
367 dpm_table->dpm_level[index].param1 = pcie_lanes; in phm_setup_pcie_table_entry()
368 dpm_table->dpm_level[index].enabled = 1; in phm_setup_pcie_table_entry()
379 if (dpm_table->dpm_level[i - 1].enabled) in phm_get_dpm_level_enable_mask_value()
450 if (value == dpm_table->dpm_level[i].value) { in phm_find_boot_level()
H A Dpp_psm.c295 hwmgr->dpm_level = hwmgr->request_dpm_level; in psm_adjust_power_state_dynamic()
297 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in psm_adjust_power_state_dynamic()
H A Dvega12_hwmgr.c2402 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega12_apply_clocks_adjust_rules()
2407 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2426 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega12_apply_clocks_adjust_rules()
2431 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2470 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2489 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2508 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2527 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
H A Dvega20_hwmgr.c3819 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega20_apply_clocks_adjust_rules()
3824 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3843 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega20_apply_clocks_adjust_rules()
3848 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3903 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3922 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3941 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3960 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
H A Dhwmgr.c87 hwmgr->dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in hwmgr_early_init()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c524 uint32_t dpm_level, uint32_t *freq) in vangogh_get_dpm_clk_limited() argument
533 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
535 *freq = clk_table->SocClocks[dpm_level]; in vangogh_get_dpm_clk_limited()
538 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
540 *freq = clk_table->VcnClocks[dpm_level].vclk; in vangogh_get_dpm_clk_limited()
543 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
545 *freq = clk_table->VcnClocks[dpm_level].dclk; in vangogh_get_dpm_clk_limited()
549 if (dpm_level >= clk_table->NumDfPstatesEnabled) in vangogh_get_dpm_clk_limited()
551 *freq = clk_table->DfPstateTable[dpm_level].memclk; in vangogh_get_dpm_clk_limited()
555 if (dpm_level >= clk_table->NumDfPstatesEnabled) in vangogh_get_dpm_clk_limited()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c523 if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { in smu_restore_dpm_user_profile()
950 smu->smu_dpm.dpm_level, in smu_late_init()
1375 smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in smu_sw_init()
2317 if (!(smu_dpm_ctx->dpm_level & profile_mode_mask)) { in smu_enable_umd_pstate()
2320 smu_dpm_ctx->saved_dpm_level = smu_dpm_ctx->dpm_level; in smu_enable_umd_pstate()
2409 if (smu_dpm_ctx->dpm_level != level) { in smu_adjust_power_state_dynamic()
2422 smu_dpm_ctx->dpm_level = level; in smu_adjust_power_state_dynamic()
2425 if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL && in smu_adjust_power_state_dynamic()
2426 smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) in smu_adjust_power_state_dynamic()
2468 return smu_handle_task(smu, smu_dpm->dpm_level, task_id); in smu_handle_dpm_task()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr_smu_msg.h43 …dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level);
/linux/drivers/gpu/drm/amd/pm/powerplay/
H A Damd_powerplay.c351 if (!(hwmgr->dpm_level & profile_mode_mask)) { in pp_dpm_en_umd_pstate()
354 hwmgr->saved_dpm_level = hwmgr->dpm_level; in pp_dpm_en_umd_pstate()
375 if (level == hwmgr->dpm_level) in pp_dpm_force_performance_level()
393 return hwmgr->dpm_level; in pp_dpm_get_performance_level()
703 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in pp_dpm_force_clock_level()
848 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in pp_set_power_profile_mode()
937 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in pp_dpm_switch_power_profile()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c1796 int dpm_level = 0; in dcn401_get_power_profile() local
1803 dpm_level++; in dcn401_get_power_profile()
1806 return dpm_level; in dcn401_get_power_profile()
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h445 enum amd_dpm_forced_level dpm_level; member
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dci_smumgr.c2884 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_UVDDPM)) in ci_update_uvd_smc_table()
2916 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_VCEDPM)) in ci_update_vce_smc_table()

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