Searched refs:dcefclk (Results 1 – 11 of 11) sorted by relevance
566 smu->smu_table.boot_values.dcefclk = 0; in smu_v15_0_get_vbios_bootup_values()580 smu->smu_table.boot_values.dcefclk = 0; in smu_v15_0_get_vbios_bootup_values()595 smu->smu_table.boot_values.dcefclk = 0; in smu_v15_0_get_vbios_bootup_values()626 smu->smu_table.boot_values.dcefclk = smu_info_v4_0->bootup_dcefclk_10khz; in smu_v15_0_get_vbios_bootup_values()
612 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()626 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()641 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()672 smu->smu_table.boot_values.dcefclk = smu_info_v4_0->bootup_dcefclk_10khz; in smu_v13_0_get_vbios_bootup_values()872 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v13_0_init_max_sustainable_clocks()
695 /* dcefclk dpm table setup */ in smu_v13_0_7_set_default_dpm_table() 706 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in smu_v13_0_7_set_default_dpm_table()
676 /* dcefclk dpm table setup */ in smu_v13_0_0_set_default_dpm_table() 687 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in smu_v13_0_0_set_default_dpm_table()
597 smu->smu_table.boot_values.dcefclk = 0; in smu_v14_0_get_vbios_bootup_values()611 smu->smu_table.boot_values.dcefclk = 0; in smu_v14_0_get_vbios_bootup_values()626 smu->smu_table.boot_values.dcefclk = 0; in smu_v14_0_get_vbios_bootup_values()657 smu->smu_table.boot_values.dcefclk = smu_info_v4_0->bootup_dcefclk_10khz; in smu_v14_0_get_vbios_bootup_values()
574 /* dcefclk dpm table setup */ in smu_v14_0_2_set_default_dpm_table() 585 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in smu_v14_0_2_set_default_dpm_table()
556 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()573 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()594 &smu->smu_table.boot_values.dcefclk); in smu_v11_0_get_vbios_bootup_values()839 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v11_0_init_max_sustainable_clocks()
1066 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1083 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1100 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1117 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()
1090 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()1107 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()1124 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()1141 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()
345 uint32_t dcefclk; member
1849 smu->smu_table.boot_values.dcefclk / 100); in smu_smc_hw_setup()