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Searched refs:bpc (Results 1 – 25 of 78) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/dml/dsc/
H A Drc_calc_fpu.c31 #define table_hash(mode, bpc, max_min) ((mode << 16) | (bpc << 8) | max_min) argument
37 #define TABLE_CASE(mode, bpc, max) case (table_hash(mode, BPC_##bpc, max)): \ argument
38 table = qp_table_##mode##_##bpc##bpc_##max; \
39 …table_size = sizeof(qp_table_##mode##_##bpc##bpc_##max)/sizeof(*qp_table_##mode##_##bpc##bpc_##max…
64 static void get_qp_set(qp_set qps, enum colour_mode cm, enum bits_per_comp bpc, in get_qp_set() argument
68 int sel = table_hash(mode, bpc, max_min); in get_qp_set()
167 enum bits_per_comp bpc, in _do_calc_rc_params() argument
189 …rc->rc_quant_incr_limit0 = ((bpc == BPC_8) ? 11 : (bpc == BPC_10 ? 15 : 19)) - ((minor_version == … in _do_calc_rc_params()
190 …rc->rc_quant_incr_limit1 = ((bpc == BPC_8) ? 11 : (bpc == BPC_10 ? 15 : 19)) - ((minor_version == … in _do_calc_rc_params()
197 … = median3(0, (12 + (int) (0.09 * min(34, slice_height - 8))), (int)((3 * bpc * 3) - (3 * bpp_gro… in _do_calc_rc_params()
[all …]
H A Drc_calc_fpu.h83 enum bits_per_comp bpc,
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_disp_drv.h19 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
30 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
39 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
43 unsigned int bpc, unsigned int cfg,
58 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
68 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
72 unsigned int h, unsigned int vrefresh, unsigned int bpc,
86 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
124 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
148 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
H A Dmtk_ddp_comp.c129 unsigned int bpc, unsigned int cfg, in mtk_dither_set_common() argument
133 if (bpc == 0) in mtk_dither_set_common()
136 if (bpc >= MTK_MIN_BPC) { in mtk_dither_set_common()
140 DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
141 DITHER_ADD_LSHIFT_R(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
145 DITHER_LSB_ERR_SHIFT_B(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
146 DITHER_ADD_LSHIFT_B(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
147 DITHER_LSB_ERR_SHIFT_G(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
148 DITHER_ADD_LSHIFT_G(MTK_MAX_BPC - bpc), in mtk_dither_set_common()
156 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) in mtk_dither_config() argument
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H A Dmtk_ddp_comp.h58 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
145 unsigned int vrefresh, unsigned int bpc, in mtk_ddp_comp_config() argument
149 comp->funcs->config(comp->dev, w, h, vrefresh, bpc, cmdq_pkt); in mtk_ddp_comp_config()
H A Dmtk_ethdr.h15 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_connectors.c105 int bpc = 8; in amdgpu_connector_get_monitor_bpc() local
113 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
114 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
121 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
122 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
130 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
131 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
136 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
137 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
146 bpc = 6; in amdgpu_connector_get_monitor_bpc()
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H A Datombios_crtc.c317 int bpc = amdgpu_crtc->bpc; in amdgpu_atombios_crtc_adjust_pll() local
358 switch (bpc) { in amdgpu_atombios_crtc_adjust_pll()
585 int bpc, in amdgpu_atombios_crtc_program_pll() argument
654 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
685 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
713 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
756 amdgpu_crtc->bpc = 8; in amdgpu_atombios_crtc_prepare_pll()
772 amdgpu_crtc->bpc = amdgpu_connector_get_monitor_bpc(connector); in amdgpu_atombios_crtc_prepare_pll()
831 (amdgpu_crtc->bpc > 8)) in amdgpu_atombios_crtc_set_pll()
862 amdgpu_crtc->bpc, amdgpu_crtc->ss_enabled, &amdgpu_crtc->ss); in amdgpu_atombios_crtc_set_pll()
H A Datombios_crtc.h52 int bpc,
/linux/drivers/gpu/drm/amd/display/dc/dsc/
H A Drc_calc.c44 enum bits_per_comp bpc; in calc_rc_params() local
53 bpc = (pps->bits_per_component == 8) ? BPC_8 : (pps->bits_per_component == 10) in calc_rc_params()
59 _do_calc_rc_params(rc, mode, bpc, drm_bpp, is_navite_422_or_420, in calc_rc_params()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_connectors.c105 int bpc = 8; in radeon_get_monitor_bpc() local
113 if (connector->display_info.bpc) in radeon_get_monitor_bpc()
114 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
121 if (connector->display_info.bpc) in radeon_get_monitor_bpc()
122 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
130 if (connector->display_info.bpc) in radeon_get_monitor_bpc()
131 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
136 if (connector->display_info.bpc) in radeon_get_monitor_bpc()
137 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
146 bpc = 6; in radeon_get_monitor_bpc()
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H A Devergreen_hdmi.c74 int bpc = 8; in evergreen_hdmi_update_acr() local
78 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
81 if (bpc > 8) in evergreen_hdmi_update_acr()
319 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc) in dce4_hdmi_set_color_depth() argument
330 switch (bpc) { in dce4_hdmi_set_color_depth()
337 connector->name, bpc); in dce4_hdmi_set_color_depth()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_qp_tables.h11 u8 intel_lookup_range_min_qp(int bpc, int buf_i, int bpp_i, bool is_420);
12 u8 intel_lookup_range_max_qp(int bpc, int buf_i, int bpp_i, bool is_420);
H A Dintel_dp.c1297 int clock, int bpc, in intel_dp_tmds_clock_valid() argument
1306 tmds_clock = intel_hdmi_tmds_clock(clock, bpc, sink_format); in intel_dp_tmds_clock_valid()
1734 int bpc, bool respect_downstream_limits) in intel_dp_hdmi_compute_bpc() argument
1743 bpc = max(bpc, 8); in intel_dp_hdmi_compute_bpc()
1751 bpc = 8; in intel_dp_hdmi_compute_bpc()
1753 for (; bpc >= 8; bpc -= 2) { in intel_dp_hdmi_compute_bpc()
1754 if (intel_hdmi_bpc_possible(crtc_state, bpc, in intel_dp_hdmi_compute_bpc()
1756 intel_dp_tmds_clock_valid(intel_dp, clock, bpc, crtc_state->sink_format, in intel_dp_hdmi_compute_bpc()
1758 return bpc; in intel_dp_hdmi_compute_bpc()
1770 int bpp, bpc; in intel_dp_max_bpp() local
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/linux/drivers/video/console/
H A Dsticon.c164 int size, i, bpc, pitch; in sticon_set_font() local
173 bpc = pitch * h; in sticon_set_font()
174 size = bpc * op->charcount; in sticon_set_font()
185 new_font->bytes_per_char = bpc; in sticon_set_font()
203 memcpy(p, data, bpc); in sticon_set_font()
205 p += bpc; in sticon_set_font()
/linux/drivers/gpu/drm/panel/
H A Dpanel-boe-himax8279d.c31 unsigned int bpc; member
210 connector->display_info.bpc = pinfo->desc->bpc; in boe_panel_get_modes()
501 .bpc = 8,
801 .bpc = 8,
H A Dpanel-boe-tv101wum-nl6.c24 unsigned int bpc; member
1440 .bpc = 8,
1469 .bpc = 8,
1497 .bpc = 8,
1524 .bpc = 8,
1552 .bpc = 8,
1579 .bpc = 8,
1607 .bpc = 8,
1634 .bpc = 8,
1667 connector->display_info.bpc = boe->desc->bpc; in boe_panel_get_modes()
/linux/drivers/gpu/drm/tegra/
H A Dplane.c489 bool tegra_plane_format_is_yuv(unsigned int format, unsigned int *planes, unsigned int *bpc) in tegra_plane_format_is_yuv() argument
497 if (bpc) in tegra_plane_format_is_yuv()
498 *bpc = 8; in tegra_plane_format_is_yuv()
514 if (bpc) in tegra_plane_format_is_yuv()
515 *bpc = 8; in tegra_plane_format_is_yuv()
528 if (bpc) in tegra_plane_format_is_yuv()
529 *bpc = 8; in tegra_plane_format_is_yuv()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_utils.c340 …double bpc = (double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_inde… in dml2_core_utils_get_stream_output_bpp() local
344 out_bpp[k] = bpc * 3; in dml2_core_utils_get_stream_output_bpp()
347 out_bpp[k] = bpc * 2; in dml2_core_utils_get_stream_output_bpp()
350 out_bpp[k] = bpc * 2; in dml2_core_utils_get_stream_output_bpp()
354 out_bpp[k] = bpc * 1.5; in dml2_core_utils_get_stream_output_bpp()
363 DML_LOG_VERBOSE("DML::%s: k=%d bpc=%f\n", __func__, k, bpc); in dml2_core_utils_get_stream_output_bpp()
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Ddisp.c390 asyh->or.bpc = min_t(u8, asyh->or.bpc, 10); in nv50_outp_atomic_fix_depth()
393 while (asyh->or.bpc > 6) { in nv50_outp_atomic_fix_depth()
394 mode_rate = DIV_ROUND_UP(mode->clock * asyh->or.bpc * 3, 8); in nv50_outp_atomic_fix_depth()
398 asyh->or.bpc -= 2; in nv50_outp_atomic_fix_depth()
422 asyh->or.bpc = connector->display_info.bpc; in nv50_outp_atomic_check()
992 asyh->or.bpc = connector->display_info.bpc; in nv50_msto_atomic_check()
993 asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3 << 4); in nv50_msto_atomic_check()
1016 nv50_dp_bpc_to_depth(unsigned int bpc) in nv50_dp_bpc_to_depth() argument
1018 switch (bpc) { in nv50_dp_bpc_to_depth()
1068 nv50_dp_bpc_to_depth(asyh->or.bpc)); in nv50_msto_atomic_enable()
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/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-dp.c295 u8 bpc; member
384 u8 bpc; member
1084 vsc.bpc = state->bpc; in dw_dp_send_vsc_sdp()
1159 u8 bpc, u16 vstart, u16 hstart) in dw_dp_video_set_msa() argument
1182 switch (bpc) { in dw_dp_video_set_msa()
1221 u8 color_format, bpc, bpp; in dw_dp_video_enable() local
1235 bpc = state->bpc; in dw_dp_video_enable()
1247 ret = dw_dp_video_set_msa(dp, color_format, bpc, vstart, hstart); in dw_dp_video_enable()
1317 switch (bpc) { in dw_dp_video_enable()
1547 state->bpc = fmt->bpc; in dw_dp_bridge_atomic_check()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_translation_helper.c162 timing->bpc = 6; in populate_dml21_timing_config_from_stream_state()
165 timing->bpc = 8; in populate_dml21_timing_config_from_stream_state()
168 timing->bpc = 10; in populate_dml21_timing_config_from_stream_state()
171 timing->bpc = 12; in populate_dml21_timing_config_from_stream_state()
174 timing->bpc = 14; in populate_dml21_timing_config_from_stream_state()
177 timing->bpc = 16; in populate_dml21_timing_config_from_stream_state()
180 timing->bpc = 9; in populate_dml21_timing_config_from_stream_state()
183 timing->bpc = 11; in populate_dml21_timing_config_from_stream_state()
186 timing->bpc = 8; in populate_dml21_timing_config_from_stream_state()
/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c1222 unsigned int bpc) in zynqmp_dp_set_format() argument
1256 if (info && info->bpc && bpc > info->bpc) { in zynqmp_dp_set_format()
1259 bpc, info->bpc); in zynqmp_dp_set_format()
1260 bpc = info->bpc; in zynqmp_dp_set_format()
1265 switch (bpc) { in zynqmp_dp_set_format()
1283 bpc); in zynqmp_dp_set_format()
1285 bpc = 8; in zynqmp_dp_set_format()
1290 config->bpp = bpc * num_colors; in zynqmp_dp_set_format()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c496 enum dsc_bits_per_comp bpc = DSC_BPC_UNKNOWN; in dsc_dc_color_depth_to_dsc_bits_per_comp() local
500 bpc = DSC_BPC_8; in dsc_dc_color_depth_to_dsc_bits_per_comp()
503 bpc = DSC_BPC_10; in dsc_dc_color_depth_to_dsc_bits_per_comp()
506 bpc = DSC_BPC_12; in dsc_dc_color_depth_to_dsc_bits_per_comp()
509 bpc = DSC_BPC_UNKNOWN; in dsc_dc_color_depth_to_dsc_bits_per_comp()
513 return bpc; in dsc_dc_color_depth_to_dsc_bits_per_comp()
/linux/drivers/spi/
H A Dspi-bcm-qspi.c407 int bpp, int bpc, int flex_mode) in bcm_qspi_bspi_set_xfer_params() argument
410 bcm_qspi_write(qspi, BSPI, BSPI_BITS_PER_CYCLE, bpc); in bcm_qspi_bspi_set_xfer_params()
419 int bpc = 0, bpp = 0; in bcm_qspi_bspi_set_flex_mode() local
441 bpc = 0x00000001; in bcm_qspi_bspi_set_flex_mode()
443 bpc |= 0x00010100; /* address and mode are 2-bit */ in bcm_qspi_bspi_set_flex_mode()
448 bpc = 0x00000002; in bcm_qspi_bspi_set_flex_mode()
450 bpc |= 0x00020200; /* address and mode are 4-bit */ in bcm_qspi_bspi_set_flex_mode()
458 bcm_qspi_bspi_set_xfer_params(qspi, command, bpp, bpc, flex_mode); in bcm_qspi_bspi_set_flex_mode()

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