| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_irq.h | 30 struct amdgpu_device;
51 int amdgpu_dm_irq_init(struct amdgpu_device *adev);
59 void amdgpu_dm_irq_fini(struct amdgpu_device *adev);
75 void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev,
88 void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
106 bool amdgpu_dm_irq_set(struct amdgpu_device *adev, enum dc_irq_source src,
118 void amdgpu_dm_irq_ack(struct amdgpu_device *adev, enum dc_irq_source src);
120 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev);
122 void amdgpu_dm_outbox_init(struct amdgpu_device *adev);
123 void amdgpu_dm_hpd_init(struct amdgpu_device *adev);
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd.h | 51 struct amdgpu_device;
67 struct amdgpu_device *adev;
162 void amdgpu_amdkfd_teardown_processes(struct amdgpu_device *adev);
164 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc);
165 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc);
166 void amdgpu_amdkfd_suspend_process(struct amdgpu_device *adev);
167 int amdgpu_amdkfd_resume_process(struct amdgpu_device *adev);
168 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
170 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
171 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
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| H A D | amdgpu_df.h | 34 void (*sw_init)(struct amdgpu_device *adev);
35 void (*sw_fini)(struct amdgpu_device *adev);
36 void (*hw_init)(struct amdgpu_device *adev);
37 void (*enable_broadcast_mode)(struct amdgpu_device *adev,
39 u32 (*get_fb_channel_number)(struct amdgpu_device *adev);
40 u32 (*get_hbm_channel_number)(struct amdgpu_device *adev);
41 void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
43 void (*get_clockgating_state)(struct amdgpu_device *adev,
45 void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,
47 int (*pmc_start)(struct amdgpu_device *adev, uint64_t config,
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| H A D | amdgpu.h | 128 struct amdgpu_device *adev;
321 struct amdgpu_device;
365 bool amdgpu_get_bios(struct amdgpu_device *adev);
366 bool amdgpu_read_bios(struct amdgpu_device *adev);
367 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
369 void amdgpu_bios_release(struct amdgpu_device *adev);
395 struct amdgpu_device *adev;
432 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
438 bool (*read_disabled_bios)(struct amdgpu_device *adev);
439 bool (*read_bios_from_rom)(struct amdgpu_device *adev,
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| H A D | amdgpu_gfxhub.h | 27 u64 (*get_fb_location)(struct amdgpu_device *adev);
28 u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
29 void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
31 int (*gart_enable)(struct amdgpu_device *adev);
33 void (*gart_disable)(struct amdgpu_device *adev);
34 void (*set_fault_enable_default)(struct amdgpu_device *adev, bool value);
35 void (*init)(struct amdgpu_device *adev);
36 int (*get_xgmi_info)(struct amdgpu_device *adev);
37 void (*utcl2_harvest)(struct amdgpu_device *adev);
38 void (*mode2_save_regs)(struct amdgpu_device *adev);
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| H A D | amdgpu_gart.h | 32 struct amdgpu_device;
54 int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
55 void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
56 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
57 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
58 int amdgpu_gart_init(struct amdgpu_device *adev);
59 void amdgpu_gart_dummy_page_fini(struct amdgpu_device *adev);
60 void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
62 void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
65 void amdgpu_gart_map_gfx9_mqd(struct amdgpu_device *adev, uint64_t offset,
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| H A D | amdgpu_ttm.h | 139 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
140 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
141 int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
142 void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
143 void amdgpu_preempt_mgr_sysfs_fini(struct amdgpu_device *adev);
144 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
145 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
160 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
174 void amdgpu_vram_mgr_clear_reset_blocks(struct amdgpu_device *adev);
176 bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
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| H A D | amdgpu_amdkfd.c | 74 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) in amdgpu_amdkfd_device_probe()
97 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info()
131 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_amdkfd_reset_work()
152 int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev) in amdgpu_amdkfd_drm_client_create()
172 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) in amdgpu_amdkfd_device_init()
239 void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev) in amdgpu_amdkfd_device_fini_sw()
248 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, in amdgpu_amdkfd_interrupt()
255 void amdgpu_amdkfd_teardown_processes(struct amdgpu_device *adev) in amdgpu_amdkfd_teardown_processes()
260 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc) in amdgpu_amdkfd_suspend()
270 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc) in amdgpu_amdkfd_resume()
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| H A D | amdgpu_vm.h | 277 struct amdgpu_device *adev;
497 void amdgpu_vm_manager_init(struct amdgpu_device *adev);
498 void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
501 int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, int32_t xcp_id);
502 int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm);
503 void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
509 uint64_t amdgpu_vm_generation(struct amdgpu_device *adev, struct amdgpu_vm *vm);
510 int amdgpu_vm_validate(struct amdgpu_device *adev, struct amdgpu_vm *vm,
517 int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
519 int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
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| H A D | nbio_v7_9.c | 34 static void nbio_v7_9_remap_hdp_registers(struct amdgpu_device *adev) in nbio_v7_9_remap_hdp_registers()
42 static u32 nbio_v7_9_get_rev_id(struct amdgpu_device *adev) in nbio_v7_9_get_rev_id()
61 static void nbio_v7_9_mc_access_enable(struct amdgpu_device *adev, bool enable) in nbio_v7_9_mc_access_enable()
70 static u32 nbio_v7_9_get_memsize(struct amdgpu_device *adev) in nbio_v7_9_get_memsize()
75 static void nbio_v7_9_sdma_doorbell_range(struct amdgpu_device *adev, int instance, in nbio_v7_9_sdma_doorbell_range()
174 static void nbio_v7_9_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, in nbio_v7_9_vcn_doorbell_range()
234 static void nbio_v7_9_enable_doorbell_aperture(struct amdgpu_device *adev, in nbio_v7_9_enable_doorbell_aperture()
243 static void nbio_v7_9_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, in nbio_v7_9_enable_doorbell_selfring_aperture()
265 static void nbio_v7_9_ih_doorbell_range(struct amdgpu_device *adev, in nbio_v7_9_ih_doorbell_range()
309 static void nbio_v7_9_update_medium_grain_clock_gating(struct amdgpu_device *adev, in nbio_v7_9_update_medium_grain_clock_gating()
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| H A D | amdgpu_mes.h | 77 struct amdgpu_device *adev;
137 int (*kiq_hw_init)(struct amdgpu_device *adev,
139 int (*kiq_hw_fini)(struct amdgpu_device *adev,
493 int (*init_mqd)(struct amdgpu_device *adev, void *mqd,
510 int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe);
511 void amdgpu_mes_validate_fw_version(struct amdgpu_device *adev);
512 int amdgpu_mes_init(struct amdgpu_device *adev);
513 void amdgpu_mes_fini(struct amdgpu_device *adev);
515 int amdgpu_mes_suspend(struct amdgpu_device *adev, u32 xcc_id);
516 int amdgpu_mes_resume(struct amdgpu_device *adev, u32 xcc_id);
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| H A D | vce_v2_0.c | 50 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev);
51 static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev);
62 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_rptr()
79 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_wptr()
96 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_set_wptr()
104 static int vce_v2_0_lmi_clean(struct amdgpu_device *adev) in vce_v2_0_lmi_clean()
121 static int vce_v2_0_firmware_loaded(struct amdgpu_device *adev) in vce_v2_0_firmware_loaded()
147 static void vce_v2_0_disable_cg(struct amdgpu_device *adev) in vce_v2_0_disable_cg()
152 static void vce_v2_0_init_cg(struct amdgpu_device *adev) in vce_v2_0_init_cg()
173 static void vce_v2_0_mc_resume(struct amdgpu_device *adev) in vce_v2_0_mc_resume()
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| H A D | smu_v13_0_10.c | 34 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_is_mode2_default()
46 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_get_reset_handler()
67 static int smu_v13_0_10_mode2_suspend_ip(struct amdgpu_device *adev) in smu_v13_0_10_mode2_suspend_ip()
96 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_prepare_hwcontext()
104 static int smu_v13_0_10_mode2_reset(struct amdgpu_device *adev) in smu_v13_0_10_mode2_reset()
114 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_async_reset()
129 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_perform_reset()
140 static int smu_v13_0_10_mode2_restore_ip(struct amdgpu_device *adev) in smu_v13_0_10_mode2_restore_ip()
222 struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_restore_hwcontext()
269 int smu_v13_0_10_reset_init(struct amdgpu_device *adev) in smu_v13_0_10_reset_init()
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| H A D | si_ih.c | 34 static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev);
36 static void si_ih_enable_interrupts(struct amdgpu_device *adev) in si_ih_enable_interrupts()
48 static void si_ih_disable_interrupts(struct amdgpu_device *adev) in si_ih_disable_interrupts()
63 static int si_ih_irq_init(struct amdgpu_device *adev) in si_ih_irq_init()
105 static void si_ih_irq_disable(struct amdgpu_device *adev) in si_ih_irq_disable()
111 static u32 si_ih_get_wptr(struct amdgpu_device *adev, in si_ih_get_wptr()
141 static void si_ih_decode_iv(struct amdgpu_device *adev, in si_ih_decode_iv()
162 static void si_ih_set_rptr(struct amdgpu_device *adev, in si_ih_set_rptr()
170 struct amdgpu_device *adev = ip_block->adev; in si_ih_early_init()
180 struct amdgpu_device *adev = ip_block->adev; in si_ih_sw_init()
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| H A D | amdgpu_irq.c | 159 void amdgpu_irq_disable_all(struct amdgpu_device *adev) in amdgpu_irq_disable_all()
203 struct amdgpu_device *adev = drm_to_adev(dev); in amdgpu_irq_handler()
224 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih1()
239 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih2()
254 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih_soft()
271 static bool amdgpu_msi_ok(struct amdgpu_device *adev) in amdgpu_msi_ok()
281 void amdgpu_restore_msix(struct amdgpu_device *adev) in amdgpu_restore_msix()
307 int amdgpu_irq_init(struct amdgpu_device *adev) in amdgpu_irq_init()
363 void amdgpu_irq_fini_hw(struct amdgpu_device *adev) in amdgpu_irq_fini_hw()
387 void amdgpu_irq_fini_sw(struct amdgpu_device *adev) in amdgpu_irq_fini_sw()
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| H A D | sienna_cichlid.c | 37 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_is_mode2_default()
70 static int sienna_cichlid_mode2_suspend_ip(struct amdgpu_device *adev) in sienna_cichlid_mode2_suspend_ip()
97 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_prepare_hwcontext()
115 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_async_reset()
127 static int sienna_cichlid_mode2_reset(struct amdgpu_device *adev) in sienna_cichlid_mode2_reset()
138 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_perform_reset()
149 static int sienna_cichlid_mode2_restore_ip(struct amdgpu_device *adev) in sienna_cichlid_mode2_restore_ip()
221 struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_restore_hwcontext()
272 int sienna_cichlid_reset_init(struct amdgpu_device *adev) in sienna_cichlid_reset_init()
293 int sienna_cichlid_reset_fini(struct amdgpu_device *adev) in sienna_cichlid_reset_fini()
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| H A D | vce_v1_0.c | 51 static void vce_v1_0_set_ring_funcs(struct amdgpu_device *adev);
52 static void vce_v1_0_set_irq_funcs(struct amdgpu_device *adev);
75 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_get_rptr()
92 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_get_wptr()
109 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_set_wptr()
117 static int vce_v1_0_lmi_clean(struct amdgpu_device *adev) in vce_v1_0_lmi_clean()
133 static int vce_v1_0_firmware_loaded(struct amdgpu_device *adev) in vce_v1_0_firmware_loaded()
158 static void vce_v1_0_init_cg(struct amdgpu_device *adev) in vce_v1_0_init_cg()
189 static int vce_v1_0_load_fw(struct amdgpu_device *adev) in vce_v1_0_load_fw()
252 static int vce_v1_0_wait_for_fw_validation(struct amdgpu_device *adev) in vce_v1_0_wait_for_fw_validation()
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| H A D | cik_ih.c | 51 static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cik_ih_enable_interrupts(struct amdgpu_device *adev) in cik_ih_enable_interrupts()
79 static void cik_ih_disable_interrupts(struct amdgpu_device *adev) in cik_ih_disable_interrupts()
106 static int cik_ih_irq_init(struct amdgpu_device *adev) in cik_ih_irq_init()
172 static void cik_ih_irq_disable(struct amdgpu_device *adev) in cik_ih_irq_disable()
191 static u32 cik_ih_get_wptr(struct amdgpu_device *adev, in cik_ih_get_wptr()
256 static void cik_ih_decode_iv(struct amdgpu_device *adev, in cik_ih_decode_iv()
288 static void cik_ih_set_rptr(struct amdgpu_device *adev, in cik_ih_set_rptr()
296 struct amdgpu_device *adev = ip_block->adev; in cik_ih_early_init()
311 struct amdgpu_device *adev = ip_block->adev; in cik_ih_sw_init()
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| H A D | umc_v8_10.c | 70 static inline uint32_t get_umc_v8_10_reg_offset(struct amdgpu_device *adev, in get_umc_v8_10_reg_offset()
79 static int umc_v8_10_clear_error_count_per_channel(struct amdgpu_device *adev, in umc_v8_10_clear_error_count_per_channel()
97 static void umc_v8_10_clear_error_count(struct amdgpu_device *adev) in umc_v8_10_clear_error_count()
103 static void umc_v8_10_query_correctable_error_count(struct amdgpu_device *adev, in umc_v8_10_query_correctable_error_count()
123 static void umc_v8_10_query_uncorrectable_error_count(struct amdgpu_device *adev, in umc_v8_10_query_uncorrectable_error_count()
143 static int umc_v8_10_query_ecc_error_count(struct amdgpu_device *adev, in umc_v8_10_query_ecc_error_count()
161 static void umc_v8_10_query_ras_error_count(struct amdgpu_device *adev, in umc_v8_10_query_ras_error_count()
185 static int umc_v8_10_swizzle_mode_na_to_pa(struct amdgpu_device *adev, in umc_v8_10_swizzle_mode_na_to_pa()
205 static void umc_v8_10_convert_error_address(struct amdgpu_device *adev, in umc_v8_10_convert_error_address()
244 static int umc_v8_10_query_error_address(struct amdgpu_device *adev, in umc_v8_10_query_error_address()
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| H A D | nbif_v6_3_1.c | 97 static void nbif_v6_3_1_remap_hdp_registers(struct amdgpu_device *adev) in nbif_v6_3_1_remap_hdp_registers()
112 static u32 nbif_v6_3_1_get_rev_id(struct amdgpu_device *adev) in nbif_v6_3_1_get_rev_id()
129 static void nbif_v6_3_1_mc_access_enable(struct amdgpu_device *adev, bool enable) in nbif_v6_3_1_mc_access_enable()
148 static u32 nbif_v6_3_1_get_memsize(struct amdgpu_device *adev) in nbif_v6_3_1_get_memsize()
153 static void nbif_v6_3_1_sdma_doorbell_range(struct amdgpu_device *adev, in nbif_v6_3_1_sdma_doorbell_range()
201 static void nbif_v6_3_1_vcn_doorbell_range(struct amdgpu_device *adev, in nbif_v6_3_1_vcn_doorbell_range()
253 static void nbif_v6_3_1_vpe_doorbell_range(struct amdgpu_device *adev, in nbif_v6_3_1_vpe_doorbell_range()
300 static void nbif_v6_3_1_gc_doorbell_init(struct amdgpu_device *adev) in nbif_v6_3_1_gc_doorbell_init()
311 static void nbif_v6_3_1_enable_doorbell_aperture(struct amdgpu_device *adev, in nbif_v6_3_1_enable_doorbell_aperture()
319 nbif_v6_3_1_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, in nbif_v6_3_1_enable_doorbell_selfring_aperture()
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| H A D | amdgpu_amdkfd_gfx_v12.c | 30 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm()
37 static void unlock_srbm(struct amdgpu_device *adev) in unlock_srbm()
43 static void acquire_queue(struct amdgpu_device *adev, uint32_t pipe_id, in acquire_queue()
52 static void release_queue(struct amdgpu_device *adev) in release_queue()
57 static int init_interrupts_v12(struct amdgpu_device *adev, uint32_t pipe_id, uint32_t inst) in init_interrupts_v12()
76 static uint32_t get_sdma_rlc_reg_offset(struct amdgpu_device *adev, in get_sdma_rlc_reg_offset()
106 static int hqd_dump_v12(struct amdgpu_device *adev, in hqd_dump_v12()
137 static int hqd_sdma_dump_v12(struct amdgpu_device *adev, in hqd_sdma_dump_v12()
164 static int wave_control_execute_v12(struct amdgpu_device *adev, in wave_control_execute_v12()
189 static uint32_t kgd_gfx_v12_enable_debug_trap(struct amdgpu_device *adev, in kgd_gfx_v12_enable_debug_trap()
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| H A D | amdgpu_uvd.h | 74 int amdgpu_uvd_sw_init(struct amdgpu_device *adev);
75 int amdgpu_uvd_sw_fini(struct amdgpu_device *adev);
76 int amdgpu_uvd_entity_init(struct amdgpu_device *adev, struct amdgpu_ring *ring);
77 int amdgpu_uvd_prepare_suspend(struct amdgpu_device *adev);
78 int amdgpu_uvd_suspend(struct amdgpu_device *adev);
79 int amdgpu_uvd_resume(struct amdgpu_device *adev);
84 void amdgpu_uvd_free_handles(struct amdgpu_device *adev,
92 uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev);
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| H A D | jpeg_v4_0.c | 55 static int jpeg_v4_0_start_sriov(struct amdgpu_device *adev);
56 static void jpeg_v4_0_set_dec_ring_funcs(struct amdgpu_device *adev);
57 static void jpeg_v4_0_set_irq_funcs(struct amdgpu_device *adev);
60 static void jpeg_v4_0_set_ras_funcs(struct amdgpu_device *adev);
72 struct amdgpu_device *adev = ip_block->adev; in jpeg_v4_0_early_init()
94 struct amdgpu_device *adev = ip_block->adev; in jpeg_v4_0_sw_init()
164 struct amdgpu_device *adev = ip_block->adev; in jpeg_v4_0_sw_fini()
185 struct amdgpu_device *adev = ip_block->adev; in jpeg_v4_0_hw_init()
222 struct amdgpu_device *adev = ip_block->adev; in jpeg_v4_0_hw_fini()
276 static void jpeg_v4_0_disable_clock_gating(struct amdgpu_device *adev) in jpeg_v4_0_disable_clock_gating()
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| H A D | umc_v8_14.c | 30 static inline uint32_t get_umc_v8_14_reg_offset(struct amdgpu_device *adev, in get_umc_v8_14_reg_offset()
37 static int umc_v8_14_clear_error_count_per_channel(struct amdgpu_device *adev, in umc_v8_14_clear_error_count_per_channel()
55 static void umc_v8_14_clear_error_count(struct amdgpu_device *adev) in umc_v8_14_clear_error_count()
61 static void umc_v8_14_query_correctable_error_count(struct amdgpu_device *adev, in umc_v8_14_query_correctable_error_count()
77 static void umc_v8_14_query_uncorrectable_error_count(struct amdgpu_device *adev, in umc_v8_14_query_uncorrectable_error_count()
92 static int umc_v8_14_query_error_count_per_channel(struct amdgpu_device *adev, in umc_v8_14_query_error_count_per_channel()
110 static void umc_v8_14_query_ras_error_count(struct amdgpu_device *adev, in umc_v8_14_query_ras_error_count()
119 static int umc_v8_14_err_cnt_init_per_channel(struct amdgpu_device *adev, in umc_v8_14_err_cnt_init_per_channel()
145 static void umc_v8_14_err_cnt_init(struct amdgpu_device *adev) in umc_v8_14_err_cnt_init()
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| /linux/drivers/gpu/drm/amd/pm/ |
| H A D | amdgpu_dpm.c | 41 int amdgpu_dpm_get_sclk(struct amdgpu_device *adev, bool low) in amdgpu_dpm_get_sclk()
57 int amdgpu_dpm_get_mclk(struct amdgpu_device *adev, bool low) in amdgpu_dpm_get_mclk()
73 int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, in amdgpu_dpm_set_powergating_by_smu()
124 int amdgpu_dpm_set_gfx_power_up_by_imu(struct amdgpu_device *adev) in amdgpu_dpm_set_gfx_power_up_by_imu()
138 int amdgpu_dpm_baco_enter(struct amdgpu_device *adev) in amdgpu_dpm_baco_enter()
157 int amdgpu_dpm_baco_exit(struct amdgpu_device *adev) in amdgpu_dpm_baco_exit()
176 int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev, in amdgpu_dpm_set_mp1_state()
199 int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev) in amdgpu_dpm_is_baco_supported()
228 int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev) in amdgpu_dpm_mode2_reset()
246 int amdgpu_dpm_enable_gfx_features(struct amdgpu_device *adev) in amdgpu_dpm_enable_gfx_features()
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