Lines Matching refs:amdgpu_device
128 struct amdgpu_device *adev;
328 struct amdgpu_device;
373 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
375 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
377 bool amdgpu_device_ip_is_hw(struct amdgpu_device *adev,
379 bool amdgpu_device_ip_is_valid(struct amdgpu_device *adev,
406 struct amdgpu_device *adev;
409 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
414 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
417 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
423 bool amdgpu_get_bios(struct amdgpu_device *adev);
424 bool amdgpu_read_bios(struct amdgpu_device *adev);
425 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
427 void amdgpu_bios_release(struct amdgpu_device *adev);
484 struct amdgpu_device *adev;
583 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
584 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
589 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
661 bool (*read_disabled_bios)(struct amdgpu_device *adev);
662 bool (*read_bios_from_rom)(struct amdgpu_device *adev,
664 int (*read_register)(struct amdgpu_device *adev, u32 se_num,
666 void (*set_vga_state)(struct amdgpu_device *adev, bool state);
667 int (*reset)(struct amdgpu_device *adev);
668 enum amd_reset_method (*reset_method)(struct amdgpu_device *adev);
670 u32 (*get_xclk)(struct amdgpu_device *adev);
672 int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
673 int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
675 int (*get_pcie_lanes)(struct amdgpu_device *adev);
676 void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
678 u32 (*get_config_memsize)(struct amdgpu_device *adev);
680 void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
682 void (*invalidate_hdp)(struct amdgpu_device *adev,
685 bool (*need_full_reset)(struct amdgpu_device *adev);
687 void (*init_doorbell_index)(struct amdgpu_device *adev);
689 void (*get_pcie_usage)(struct amdgpu_device *adev, uint64_t *count0,
692 bool (*need_reset_on_init)(struct amdgpu_device *adev);
694 uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);
696 int (*supports_baco)(struct amdgpu_device *adev);
698 void (*pre_asic_init)(struct amdgpu_device *adev);
700 int (*update_umd_stable_pstate)(struct amdgpu_device *adev, bool enter);
702 int (*query_video_codecs)(struct amdgpu_device *adev, bool encode,
707 ssize_t (*get_reg_state)(struct amdgpu_device *adev,
735 struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
741 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device*, uint32_t);
742 typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
744 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device*, uint64_t);
745 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device*, uint64_t, uint32_t);
747 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device*, uint32_t);
748 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device*, uint32_t, uint64_t);
750 typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device*, uint64_t);
751 typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device*, uint64_t, uint64_t);
753 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
754 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);
819 int8_t (*logical_to_dev_inst)(struct amdgpu_device *adev,
822 uint32_t (*logical_to_dev_mask)(struct amdgpu_device *adev,
838 struct amdgpu_device *adev;
908 int (*init_mqd)(struct amdgpu_device *adev, void *mqd,
952 struct amdgpu_device { struct
1330 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev, in amdgpu_ip_version() argument
1339 static inline uint32_t amdgpu_ip_version_full(const struct amdgpu_device *adev, in amdgpu_ip_version_full()
1346 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) in drm_to_adev()
1348 return container_of(ddev, struct amdgpu_device, ddev); in drm_to_adev()
1351 static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev) in adev_to_drm()
1356 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev) in amdgpu_ttm_adev()
1358 return container_of(bdev, struct amdgpu_device, mman.bdev); in amdgpu_ttm_adev()
1361 static inline bool amdgpu_is_multi_aid(struct amdgpu_device *adev) in amdgpu_is_multi_aid()
1366 int amdgpu_device_init(struct amdgpu_device *adev,
1368 void amdgpu_device_fini_hw(struct amdgpu_device *adev);
1369 void amdgpu_device_fini_sw(struct amdgpu_device *adev);
1371 int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);
1373 void amdgpu_device_mm_access(struct amdgpu_device *adev, loff_t pos,
1375 size_t amdgpu_device_aper_access(struct amdgpu_device *adev, loff_t pos,
1378 void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
1380 uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev,
1383 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev,
1385 u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev,
1387 uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev,
1390 void amdgpu_device_wreg(struct amdgpu_device *adev,
1393 void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev,
1395 void amdgpu_device_xcc_wreg(struct amdgpu_device *adev,
1399 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
1401 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
1402 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
1404 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
1406 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
1408 u64 amdgpu_device_indirect_rreg64_ext(struct amdgpu_device *adev,
1410 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
1412 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
1414 void amdgpu_device_indirect_wreg64_ext(struct amdgpu_device *adev,
1416 u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
1419 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
1421 void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev);
1423 int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
1431 int emu_soc_asic_init(struct amdgpu_device *adev);
1564 bool amdgpu_device_has_job_running(struct amdgpu_device *adev);
1565 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
1566 int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
1569 void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
1570 int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1571 bool amdgpu_device_need_post(struct amdgpu_device *adev);
1572 bool amdgpu_device_seamless_boot_supported(struct amdgpu_device *adev);
1573 bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1575 void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
1577 int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev);
1578 void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
1582 int amdgpu_device_mode1_reset(struct amdgpu_device *adev);
1583 int amdgpu_device_link_reset(struct amdgpu_device *adev);
1584 bool amdgpu_device_supports_atpx(struct amdgpu_device *adev);
1585 bool amdgpu_device_supports_px(struct amdgpu_device *adev);
1586 bool amdgpu_device_supports_boco(struct amdgpu_device *adev);
1587 bool amdgpu_device_supports_smart_shift(struct amdgpu_device *adev);
1588 int amdgpu_device_supports_baco(struct amdgpu_device *adev);
1589 void amdgpu_device_detect_runtime_pm_mode(struct amdgpu_device *adev);
1590 bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
1591 struct amdgpu_device *peer_adev);
1592 int amdgpu_device_baco_enter(struct amdgpu_device *adev);
1593 int amdgpu_device_baco_exit(struct amdgpu_device *adev);
1595 void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
1597 void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
1600 void amdgpu_device_halt(struct amdgpu_device *adev);
1601 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev,
1603 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
1605 struct dma_fence *amdgpu_device_get_gang(struct amdgpu_device *adev);
1606 struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
1608 struct dma_fence *amdgpu_device_enforce_isolation(struct amdgpu_device *adev,
1611 bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);
1636 int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags);
1687 int amdgpu_acpi_init(struct amdgpu_device *adev);
1688 void amdgpu_acpi_fini(struct amdgpu_device *adev);
1689 bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_device *adev);
1691 int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev,
1693 int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
1695 int amdgpu_acpi_smart_shift_update(struct amdgpu_device *adev,
1697 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
1698 int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev, u64 *tmr_offset,
1700 int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, int xcc_id,
1704 bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev);
1708 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; } in amdgpu_acpi_init()
1709 static inline int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev, in amdgpu_acpi_get_tmr_info()
1714 static inline int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, in amdgpu_acpi_get_mem_info()
1720 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { } in amdgpu_acpi_fini()
1721 static inline bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev) { return false; } in amdgpu_acpi_should_gpu_reset()
1725 static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev, in amdgpu_acpi_power_shift_control()
1727 static inline int amdgpu_acpi_smart_shift_update(struct amdgpu_device *adev, in amdgpu_acpi_smart_shift_update()
1736 bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
1737 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1739 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; } in amdgpu_acpi_is_s0ix_active()
1740 static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; } in amdgpu_acpi_is_s3_active()
1747 void amdgpu_register_gpu_instance(struct amdgpu_device *adev);
1748 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev);
1759 bool amdgpu_device_skip_hw_access(struct amdgpu_device *adev);
1761 int amdgpu_device_set_cg_state(struct amdgpu_device *adev,
1763 int amdgpu_device_set_pg_state(struct amdgpu_device *adev,
1766 static inline bool amdgpu_device_has_timeouts_enabled(struct amdgpu_device *adev) in amdgpu_device_has_timeouts_enabled()
1777 static inline bool amdgpu_is_tmz(struct amdgpu_device *adev) in amdgpu_is_tmz()
1782 int amdgpu_in_reset(struct amdgpu_device *adev);
1788 void amdgpu_set_init_level(struct amdgpu_device *adev,
1791 static inline int amdgpu_device_bus_status_check(struct amdgpu_device *adev) in amdgpu_device_bus_status_check()