| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 52 TargetRegisterInfo::TargetRegisterInfo( in TargetRegisterInfo() function in TargetRegisterInfo
63 TargetRegisterInfo::~TargetRegisterInfo() = default;
65 bool TargetRegisterInfo::shouldRegionSplitForVirtReg( in shouldRegionSplitForVirtReg()
76 void TargetRegisterInfo::markSuperRegs(BitVector &RegisterSet, in markSuperRegs()
82 bool TargetRegisterInfo::checkAllSuperRegsMarked(const BitVector &RegisterSet, in checkAllSuperRegsMarked()
107 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg()
138 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printRegUnit()
161 Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printVRegOrUnit()
172 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
191 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const { in getAllocatableClass()
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| H A D | RegisterCoalescer.h | 24 class TargetRegisterInfo; variable
30 const TargetRegisterInfo &TRI;
61 CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {} in CoalescerPair()
66 const TargetRegisterInfo &tri) in CoalescerPair()
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| H A D | InterferenceCache.h | 30 class TargetRegisterInfo; variable
117 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
120 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
124 const TargetRegisterInfo *TRI, const MachineFunction *MF);
139 const TargetRegisterInfo *TRI = nullptr;
170 const TargetRegisterInfo *tri);
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| H A D | TargetFrameLoweringImpl.cpp | 52 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
85 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getCalleeSaves()
99 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves()
155 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in allocateScavengingFrameIndexesNearIncomingSP()
183 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getDwarfFrameBase()
190 const TargetRegisterInfo *TRI) const { in spillCalleeSavedRegister()
208 const TargetRegisterInfo *TRI) const { in restoreCalleeSavedRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVRegisterBankInfo.h | 23 class TargetRegisterInfo; variable
42 const TargetRegisterInfo &TRI) const;
46 const TargetRegisterInfo &TRI) const;
50 const TargetRegisterInfo &TRI) const;
54 const TargetRegisterInfo &TRI) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCRegisterBankInfo.h | 25 class TargetRegisterInfo; variable
66 PPCRegisterBankInfo(const TargetRegisterInfo &TRI);
83 const TargetRegisterInfo &TRI,
88 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
92 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.h | 24 class TargetRegisterInfo; variable
127 const TargetRegisterInfo &TRI,
132 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
136 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
140 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
147 AArch64RegisterBankInfo(const TargetRegisterInfo &TRI);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86RegisterBankInfo.h | 41 class TargetRegisterInfo; variable
70 const TargetRegisterInfo &TRI,
75 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
79 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
82 X86RegisterBankInfo(const TargetRegisterInfo &TRI);
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBank.h | 24 class TargetRegisterInfo; variable
59 const TargetRegisterInfo &TRI) const;
74 LLVM_ABI void dump(const TargetRegisterInfo *TRI = nullptr) const;
82 const TargetRegisterInfo *TRI = nullptr) const;
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| H A D | MachineOutliner.h | 79 void initFromEndOfBlockToStartOfSeq(const TargetRegisterInfo &TRI) { in initFromEndOfBlockToStartOfSeq()
96 void initInSeq(const TargetRegisterInfo &TRI) { in initInSeq()
160 const TargetRegisterInfo &TRI) { in isAvailableAcrossAndOutOfSeq()
169 const TargetRegisterInfo &TRI) { in isAnyUnavailableAcrossOrOutOfSeq()
185 bool isAvailableInsideSeq(Register Reg, const TargetRegisterInfo &TRI) { in isAvailableInsideSeq()
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| H A D | LiveRegUnits.h | 32 const TargetRegisterInfo *TRI = nullptr;
40 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
51 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
74 void init(const TargetRegisterInfo &TRI) { in init()
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| H A D | TargetFrameLowering.h | 162 const TargetRegisterInfo *TRI, in assignCalleeSavedSpillSlots()
171 const TargetRegisterInfo *TRI, in assignCalleeSavedSpillSlots()
270 const TargetRegisterInfo *TRI) const { in spillCalleeSavedRegisters()
280 const TargetRegisterInfo *TRI) const;
292 const TargetRegisterInfo *TRI) const { in restoreCalleeSavedRegisters()
303 const TargetRegisterInfo *TRI) const;
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| H A D | MachineInstr.h | 61 class TargetRegisterInfo; variable
1485 bool readsRegister(Register Reg, const TargetRegisterInfo *TRI) const {
1506 bool killsRegister(Register Reg, const TargetRegisterInfo *TRI) const {
1514 bool definesRegister(Register Reg, const TargetRegisterInfo *TRI) const {
1521 bool modifiesRegister(Register Reg, const TargetRegisterInfo *TRI) const {
1528 bool registerDefIsDead(Register Reg, const TargetRegisterInfo *TRI) const {
1540 const TargetRegisterInfo *TRI,
1546 const TargetRegisterInfo *TRI,
1553 const TargetRegisterInfo *TRI,
1566 const TargetRegisterInfo *TRI,
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| H A D | DetectDeadLanes.h | 42 class TargetRegisterInfo; variable
54 const TargetRegisterInfo *TRI);
101 const TargetRegisterInfo *TRI;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.h | 70 const TargetRegisterInfo *TRI,
77 const TargetRegisterInfo *TRI) const override;
82 const TargetRegisterInfo *TRI) const override;
128 const TargetRegisterInfo *TRI,
137 const TargetRegisterInfo *TRI) const override;
143 const TargetRegisterInfo *TRI) const override;
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfExpression.h | 31 class TargetRegisterInfo; variable
159 virtual bool isFrameRegister(const TargetRegisterInfo &TRI,
187 bool addMachineReg(const TargetRegisterInfo &TRI, llvm::Register MachineReg,
266 bool addMachineRegExpression(const TargetRegisterInfo &TRI,
334 bool isFrameRegister(const TargetRegisterInfo &TRI,
364 bool isFrameRegister(const TargetRegisterInfo &TRI,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBlockRanges.h | 29 class TargetRegisterInfo; variable
150 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
153 PrintRangeMap(const RegToRangeMap &M, const TargetRegisterInfo &I) in PrintRangeMap()
160 const TargetRegisterInfo &TRI;
165 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
173 const TargetRegisterInfo &TRI;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVVectorMaskDAGMutation.cpp | 63 const TargetRegisterInfo *TRI;
66 RISCVVectorMaskDAGMutation(const TargetRegisterInfo *TRI) : TRI(TRI) {} in RISCVVectorMaskDAGMutation()
86 createRISCVVectorMaskDAGMutation(const TargetRegisterInfo *TRI) { in createRISCVVectorMaskDAGMutation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.h | 49 const TargetRegisterInfo *TRI,
53 const TargetRegisterInfo *TRI,
61 const TargetRegisterInfo *TRI) const override;
67 const TargetRegisterInfo *TRI) const override;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCFrameLowering.h | 46 const TargetRegisterInfo *TRI) const override;
52 const TargetRegisterInfo *TRI) const override;
62 llvm::MachineFunction &, const llvm::TargetRegisterInfo *,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.h | 39 class TargetRegisterInfo; variable
147 const TargetRegisterInfo *TRI, Register VReg,
155 const TargetRegisterInfo *TRI, Register VReg,
163 const TargetRegisterClass *RC, const TargetRegisterInfo *TRI,
170 const TargetRegisterInfo *TRI, int64_t Offset,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYFrameLowering.h | 46 MachineFunction &MF, const TargetRegisterInfo *TRI, in assignCalleeSavedSpillSlots()
57 const TargetRegisterInfo *TRI) const override;
62 const TargetRegisterInfo *TRI) const override;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 60 const TargetRegisterInfo *RegisterInfo, Register VReg,
67 const TargetRegisterInfo *RegisterInfo, Register VReg,
76 const TargetRegisterInfo *TRI) const override;
81 const TargetRegisterInfo *TRI) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreMachineFunctionInfo.cpp | 46 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot()
64 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot()
77 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot()
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| H A D | XCoreInstrInfo.h | 34 const TargetRegisterInfo &getRegisterInfo() const { return RI; } in getRegisterInfo()
73 const TargetRegisterInfo *TRI, Register VReg,
79 const TargetRegisterInfo *TRI, Register VReg,
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