Lines Matching refs:TargetRegisterInfo
52 TargetRegisterInfo::TargetRegisterInfo( in TargetRegisterInfo() function in TargetRegisterInfo
63 TargetRegisterInfo::~TargetRegisterInfo() = default;
65 bool TargetRegisterInfo::shouldRegionSplitForVirtReg( in shouldRegionSplitForVirtReg()
76 void TargetRegisterInfo::markSuperRegs(BitVector &RegisterSet, in markSuperRegs()
82 bool TargetRegisterInfo::checkAllSuperRegsMarked(const BitVector &RegisterSet, in checkAllSuperRegsMarked()
107 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg()
138 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printRegUnit()
161 Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printVRegOrUnit()
172 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
191 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const { in getAllocatableClass()
206 getMinimalPhysRegClass(const TargetRegisterInfo *TRI, MCRegister Reg, in getMinimalPhysRegClass()
234 getCommonMinimalPhysRegClass(const TargetRegisterInfo *TRI, MCRegister Reg1, in getCommonMinimalPhysRegClass()
262 TargetRegisterInfo::getMinimalPhysRegClass(MCRegister Reg, MVT VT) const { in getMinimalPhysRegClass()
266 const TargetRegisterClass *TargetRegisterInfo::getCommonMinimalPhysRegClass( in getCommonMinimalPhysRegClass()
272 TargetRegisterInfo::getMinimalPhysRegClassLLT(MCRegister Reg, LLT Ty) const { in getMinimalPhysRegClassLLT()
276 const TargetRegisterClass *TargetRegisterInfo::getCommonMinimalPhysRegClassLLT( in getCommonMinimalPhysRegClassLLT()
291 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, in getAllocatableSet()
316 const TargetRegisterInfo *TRI) { in firstCommonClass()
324 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass()
338 TargetRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass()
353 const TargetRegisterClass *TargetRegisterInfo::
417 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
451 bool TargetRegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
459 float TargetRegisterInfo::getSpillWeightScaleFactor( in getSpillWeightScaleFactor()
465 bool TargetRegisterInfo::getRegAllocationHints( in getRegAllocationHints()
511 bool TargetRegisterInfo::isCalleeSavedPhysReg( in isCalleeSavedPhysReg()
524 bool TargetRegisterInfo::canRealignStack(const MachineFunction &MF) const { in canRealignStack()
528 bool TargetRegisterInfo::shouldRealignStack(const MachineFunction &MF) const { in shouldRealignStack()
532 bool TargetRegisterInfo::regmaskSubsetEqual(const uint32_t *mask0, in regmaskSubsetEqual()
542 TargetRegisterInfo::getRegSizeInBits(Register Reg, in getRegSizeInBits()
563 bool TargetRegisterInfo::getCoveringSubRegIndexes( in getCoveringSubRegIndexes()
638 unsigned TargetRegisterInfo::getSubRegIdxSize(unsigned Idx) const { in getSubRegIdxSize()
644 unsigned TargetRegisterInfo::getSubRegIdxOffset(unsigned Idx) const { in getSubRegIdxOffset()
651 TargetRegisterInfo::lookThruCopyLike(Register SrcReg, in lookThruCopyLike()
673 Register TargetRegisterInfo::lookThruSingleUseCopyChain( in lookThruSingleUseCopyChain()
698 void TargetRegisterInfo::getOffsetOpcodes( in getOffsetOpcodes()
705 TargetRegisterInfo::prependOffsetExpression(const DIExpression *Expr, in prependOffsetExpression()
725 void TargetRegisterInfo::dumpReg(Register Reg, unsigned SubRegIndex, in dumpReg()
726 const TargetRegisterInfo *TRI) { in dumpReg()