| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | mediatek,mtk-xhci.txt | 6 the second one supports dual-role mode, and the host is based on xHCI
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
21 - interrupts : interrupt used by the controller
22 - power-domains : a phandle to USB power domain node to control USB's
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| H A D | mediatek,mtk-xhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
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| H A D | faraday,fotg210.txt | 3 This OTG-capable USB host controller is found in Cortina Systems
7 - compatible: should be one of:
9 "cortina,gemini-usb", "faraday,fotg210"
10 - reg: should contain one register range i.e. start and length
11 - interrupts: description of the interrupt line
14 - clocks: should contain the IP block clock
15 - clock-names: should be "PCLK" for the IP block clock
17 Required properties for "cortina,gemini-usb" compatible:
18 - syscon: a phandle to the system controller to access PHY registers
20 Optional properties for "cortina,gemini-usb" compatible:
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| H A D | snps,dwc3-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 vendor-specific implementation or as a standalone component.
17 - $ref: usb-drd.yaml#
18 - if:
24 - dr_mode
28 $ref: usb-xhci.yaml#
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| /freebsd/sys/dev/e1000/ |
| H A D | e1000_defines.h | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 /* Definitions for power management and wakeup registers */
47 #define E1000_WUC_APMPME 0x00000008 /* Assert PME on APM Wakeup */
48 #define E1000_WUC_PHY_WAKE 0x00000100 /* if PHY supports wakeup */
51 #define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
52 #define E1000_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
53 #define E1000_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
54 #define E1000_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */
55 #define E1000_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
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| /freebsd/sys/dev/igc/ |
| H A D | igc_defines.h | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
14 /* Definitions for power management and wakeup registers */
19 #define IGC_WUC_APMPME 0x00000008 /* Assert PME on APM Wakeup */
20 #define IGC_WUC_PHY_WAKE 0x00000100 /* if PHY supports wakeup */
23 #define IGC_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
24 #define IGC_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
25 #define IGC_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
26 #define IGC_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */
27 #define IGC_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
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| /freebsd/sys/contrib/device-tree/Bindings/power/ |
| H A D | wakeup-source.txt | 1 Specifying wakeup capability for devices
5 ----------------
6 Nodes that describe devices which have wakeup capability may contain a
7 "wakeup-source" boolean property.
9 If the device is marked as a wakeup-source, interrupt wake capability depends
10 on the device specific "interrupt-names" property. If no interrupts are labeled
11 as wake capable, then it is up to the device to determine which interrupts can
14 However if a device has a dedicated interrupt as the wakeup source, then it
16 cases only that interrupt can be used as a wakeup interrupt.
18 While various legacy interrupt names exist, new devices should use "wakeup" as
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| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | qcom,sa8255p-geni-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Praveen Talari <quic_ptalari@quicinc.com>
13 - $ref: /schemas/serial/serial.yaml#
18 - qcom,sa8255p-geni-uart
19 - qcom,sa8255p-geni-debug-uart
27 - description: UART core irq
28 - description: Wakeup irq (RX GPIO)
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | samsung,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
26 samsung,pinctrl-wakeup-interrupt.yaml);
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| /freebsd/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | brcm,brcmstb-gpio.txt | 3 The controller's registers are organized as sets of eight 32-bit
9 - compatible:
10 Must be "brcm,brcmstb-gpio"
12 - reg:
16 - #gpio-cells:
19 bit[0]: polarity (0 for active-high, 1 for active-low)
21 - gpio-controller:
24 - brcm,gpio-bank-widths:
30 - interrupts:
33 - interrupts-extended:
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| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | interrupts.txt | 5 -------------------------
8 "interrupts" property, an "interrupts-extended" property, or both. If both are
16 interrupt-parent = <&intc1>;
19 The "interrupt-parent" property is used to specify the controller to which
25 The "interrupts-extended" property is a special form; useful when a node needs
31 interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
34 -----------------------------
36 A device is marked as an interrupt controller with the "interrupt-controller"
37 property. This is a empty, boolean property. An additional "#interrupt-cells"
45 -----------
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| /freebsd/sys/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211_beacon.c | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2006 Atheros Communications, Inc.
50 OS_REG_WRITE(ah, AR_TIMER0, bt->bt_nexttbtt); in ar5211SetBeaconTimers()
51 OS_REG_WRITE(ah, AR_TIMER1, bt->bt_nextdba); in ar5211SetBeaconTimers()
52 OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba); in ar5211SetBeaconTimers()
53 OS_REG_WRITE(ah, AR_TIMER3, bt->bt_nextatim); in ar5211SetBeaconTimers()
57 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval); in ar5211SetBeaconTimers()
72 * alert timer; otherwise it controls the next wakeup time. in ar5211BeaconInit()
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| /freebsd/sys/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun55i-t527-orangepi-4a.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
3 * Copyright (C) 2025 Chen-Yu Tsai <wens@csie.org>
6 /dts-v1/;
8 #include "sun55i-a523.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
15 compatible = "xunlong,orangepi-4a", "allwinner,sun55i-t527";
22 stdout-path = "serial0:115200n8";
25 ext_osc32k: ext-osc32k-clk {
26 #clock-cells = <0>;
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| /freebsd/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_beacon.c | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
52 * + Timer 0 - 0..15 0xffff TU in ar5212SetBeaconTimers()
53 * + Timer 1 - 0..18 0x7ffff TU/8 in ar5212SetBeaconTimers()
54 * + Timer 2 - 0..24 0x1ffffff TU/8 in ar5212SetBeaconTimers()
55 * + Timer 3 - 0..15 0xffff TU in ar5212SetBeaconTimers()
57 OS_REG_WRITE(ah, AR_TIMER0, bt->bt_nexttbtt & 0xffff); in ar5212SetBeaconTimers()
58 OS_REG_WRITE(ah, AR_TIMER1, bt->bt_nextdba & 0x7ffff); in ar5212SetBeaconTimers()
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| /freebsd/sys/contrib/device-tree/Bindings/soundwire/ |
| H A D | qcom,sdw.txt | 7 - compatible:
10 Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>",
12 "qcom,soundwire-v1.3.0"
13 "qcom,soundwire-v1.5.0"
14 "qcom,soundwire-v1.5.1"
15 "qcom,soundwire-v1.6.0"
16 - reg:
18 Value type: <prop-encoded-array>
22 - interrupts:
24 Value type: <prop-encoded-array>
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| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 1 - Introduction
17 ARM systems contain HW capable of managing power consumption dynamically,
18 where cores can be put in different low-power states (ranging from simple wfi
20 range of dynamic idle states that a processor can enter at run-time, can be
27 - Running
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| /freebsd/sys/contrib/edk2/Include/Uefi/ |
| H A D | UefiSpec.h | 8 Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
12 SPDX-License-Identifier: BSD-2-Clause-Patent
71 // Note: UEFI spec 2.5 and following: use EFI_MEMORY_RO as write-protected physical memory
80 // The memory region supports byte-addressable non-volatility.
92 // Specific-purpose memory (SPM). The memory is earmarked for
99 // If this flag is set, the memory region is capable of being
102 // capable of being protected with the CPU's memory
109 // If this flag is set, the memory region is present and capable of having
114 // capable of being dynamically removed from the platform at runtime.
125 // described with additional ISA-specific memory attributes
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| /freebsd/secure/lib/libcrypto/man/man3/ |
| H A D | ASYNC_start_job.3 | 1 .\" -*- mode: troff; coding: utf-8 -*-
58 .TH ASYNC_START_JOB 3ossl 2025-09-30 3.5.4 OpenSSL
68 \&\- asynchronous job management functions
107 user application is multi-threaded, then \fBASYNC_init_thread()\fR may be called for
109 user code exits per-thread resources need to be cleaned up. This will normally
198 order to re-enable pausing. If these functions are called while there is no
210 can be used to detect whether the current platform is async capable or not.
236 \&\fBASYNC_is_capable()\fR returns 1 if the current platform is async capable or 0
285 \& printf("Not executing within a job \- should not happen\en");
316 \& * later point \- but we do it here for demo purposes, i.e.
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
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| H A D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
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| /freebsd/crypto/openssl/doc/man3/ |
| H A D | ASYNC_start_job.pod | 9 - asynchronous job management functions
48 user application is multi-threaded, then ASYNC_init_thread() may be called for
50 user code exits per-thread resources need to be cleaned up. This will normally
147 order to re-enable pausing. If these functions are called while there is no
159 can be used to detect whether the current platform is async capable or not.
186 ASYNC_is_capable() returns 1 if the current platform is async capable or 0
236 printf("Not executing within a job - should not happen\n");
267 * later point - but we do it here for demo purposes, i.e.
334 /* Wait for the job to be ready for wakeup */
371 Copyright 2015-2024 The OpenSSL Project Authors. All Rights Reserved.
|
| /freebsd/share/doc/psd/03.iosys/ |
| H A D | iosys | 1 .\" Copyright (C) Caldera International Inc. 2001-2002. All rights reserved.
37 .EH 'PSD:3-%''The UNIX I/O System'
38 .OH 'The UNIX I/O System''PSD:3-%'
61 in the paper ``The UNIX Time-sharing System.''
79 which work, or can work, with addressible 512-byte blocks.
91 Character-type devices have a much
102 in the low-order 8 bits and the major device number
103 in the next-higher 8 bits;
134 which is stored in the system's per-process
152 which is a per-system data base.
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| /freebsd/sys/contrib/device-tree/Bindings/cpu/ |
| H A D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
22 run-time, can be specified through device tree bindings representing the
[all …]
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| /freebsd/sys/dev/ath/ath_hal/ar5416/ |
| H A D | ar5416_beacon.c | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
51 OS_REG_WRITE(ah, AR_NEXT_TBTT, TU_TO_USEC(bt->bt_nexttbtt)); in ar5416SetBeaconTimers()
52 OS_REG_WRITE(ah, AR_NEXT_DBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextdba)); in ar5416SetBeaconTimers()
53 OS_REG_WRITE(ah, AR_NEXT_SWBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextswba)); in ar5416SetBeaconTimers()
54 OS_REG_WRITE(ah, AR_NEXT_NDP, TU_TO_USEC(bt->bt_nextatim)); in ar5416SetBeaconTimers()
56 bperiod = TU_TO_USEC(bt->bt_intval & HAL_BEACON_PERIOD); in ar5416SetBeaconTimers()
57 ahp->ah_beaconInterval = bt->bt_intval & HAL_BEACON_PERIOD; in ar5416SetBeaconTimers()
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| /freebsd/contrib/wpa/src/drivers/ |
| H A D | nl80211_copy.h | 6 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
13 * Copyright 2015-2017 Intel Deutschland GmbH
14 * Copyright (C) 2018-2023 Intel Corporation
32 * be careful not to break things - i.e. don't move anything around or so
74 * - a setup station entry is added, not yet authorized, without any rate
76 * - when the TDLS setup is done, a single NL80211_CMD_SET_STATION is valid
79 * - %NL80211_TDLS_ENABLE_LINK is then used
80 * - after this, the only valid operation is to remove it by tearing down
95 * Frame registration is done on a per-interface basis and registrations
137 * software, like the AP-VLAN type in mac80211 for example, there's
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