xref: /freebsd/sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1*6e778a7eSPedro F. Giffuni /*-
2*6e778a7eSPedro F. Giffuni  * SPDX-License-Identifier: ISC
3*6e778a7eSPedro F. Giffuni  *
414779705SSam Leffler  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
514779705SSam Leffler  * Copyright (c) 2002-2008 Atheros Communications, Inc.
614779705SSam Leffler  *
714779705SSam Leffler  * Permission to use, copy, modify, and/or distribute this software for any
814779705SSam Leffler  * purpose with or without fee is hereby granted, provided that the above
914779705SSam Leffler  * copyright notice and this permission notice appear in all copies.
1014779705SSam Leffler  *
1114779705SSam Leffler  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1214779705SSam Leffler  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1314779705SSam Leffler  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1414779705SSam Leffler  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1514779705SSam Leffler  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1614779705SSam Leffler  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1714779705SSam Leffler  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1814779705SSam Leffler  */
1914779705SSam Leffler #include "opt_ah.h"
2014779705SSam Leffler 
2114779705SSam Leffler #include "ah.h"
2214779705SSam Leffler #include "ah_internal.h"
2314779705SSam Leffler 
2414779705SSam Leffler #include "ar5416/ar5416.h"
2514779705SSam Leffler #include "ar5416/ar5416reg.h"
2614779705SSam Leffler #include "ar5416/ar5416phy.h"
2714779705SSam Leffler 
2814779705SSam Leffler #define TU_TO_USEC(_tu)		((_tu) << 10)
2934ff1d08SAdrian Chadd #define	ONE_EIGHTH_TU_TO_USEC(_tu8)	((_tu8) << 7)
3014779705SSam Leffler 
3114779705SSam Leffler /*
32fc4de9b7SAdrian Chadd  * Return the hardware NextTBTT in TSF
33fc4de9b7SAdrian Chadd  */
34fc4de9b7SAdrian Chadd uint64_t
ar5416GetNextTBTT(struct ath_hal * ah)35fc4de9b7SAdrian Chadd ar5416GetNextTBTT(struct ath_hal *ah)
36fc4de9b7SAdrian Chadd {
37fc4de9b7SAdrian Chadd 	return OS_REG_READ(ah, AR_NEXT_TBTT);
38fc4de9b7SAdrian Chadd }
39fc4de9b7SAdrian Chadd 
40fc4de9b7SAdrian Chadd /*
4114779705SSam Leffler  * Initialize all of the hardware registers used to
4214779705SSam Leffler  * send beacons.  Note that for station operation the
4314779705SSam Leffler  * driver calls ar5416SetStaBeaconTimers instead.
4414779705SSam Leffler  */
4514779705SSam Leffler void
ar5416SetBeaconTimers(struct ath_hal * ah,const HAL_BEACON_TIMERS * bt)4614779705SSam Leffler ar5416SetBeaconTimers(struct ath_hal *ah, const HAL_BEACON_TIMERS *bt)
4714779705SSam Leffler {
4814779705SSam Leffler 	uint32_t bperiod;
49c3f2102bSAdrian Chadd 	struct ath_hal_5212 *ahp = AH5212(ah);
5014779705SSam Leffler 
5114779705SSam Leffler 	OS_REG_WRITE(ah, AR_NEXT_TBTT, TU_TO_USEC(bt->bt_nexttbtt));
5234ff1d08SAdrian Chadd 	OS_REG_WRITE(ah, AR_NEXT_DBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextdba));
5334ff1d08SAdrian Chadd 	OS_REG_WRITE(ah, AR_NEXT_SWBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextswba));
5414779705SSam Leffler 	OS_REG_WRITE(ah, AR_NEXT_NDP, TU_TO_USEC(bt->bt_nextatim));
5514779705SSam Leffler 
5614779705SSam Leffler 	bperiod = TU_TO_USEC(bt->bt_intval & HAL_BEACON_PERIOD);
57c3f2102bSAdrian Chadd 	ahp->ah_beaconInterval = bt->bt_intval & HAL_BEACON_PERIOD;
5814779705SSam Leffler 	OS_REG_WRITE(ah, AR5416_BEACON_PERIOD, bperiod);
5914779705SSam Leffler 	OS_REG_WRITE(ah, AR_DBA_PERIOD, bperiod);
6014779705SSam Leffler 	OS_REG_WRITE(ah, AR_SWBA_PERIOD, bperiod);
6114779705SSam Leffler 	OS_REG_WRITE(ah, AR_NDP_PERIOD, bperiod);
6214779705SSam Leffler 
6314779705SSam Leffler 	/*
6414779705SSam Leffler 	 * Reset TSF if required.
6514779705SSam Leffler 	 */
6614779705SSam Leffler 	if (bt->bt_intval & AR_BEACON_RESET_TSF)
6714779705SSam Leffler 		ar5416ResetTsf(ah);
6814779705SSam Leffler 
6914779705SSam Leffler 	/* enable timers */
7014779705SSam Leffler 	/* NB: flags == 0 handled specially for backwards compatibility */
7114779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_TIMER_MODE,
7214779705SSam Leffler 	    bt->bt_flags != 0 ? bt->bt_flags :
7314779705SSam Leffler 		AR_TIMER_MODE_TBTT | AR_TIMER_MODE_DBA | AR_TIMER_MODE_SWBA);
7414779705SSam Leffler }
7514779705SSam Leffler 
7614779705SSam Leffler /*
7714779705SSam Leffler  * Initializes all of the hardware registers used to
7814779705SSam Leffler  * send beacons.  Note that for station operation the
7914779705SSam Leffler  * driver calls ar5212SetStaBeaconTimers instead.
8014779705SSam Leffler  */
8114779705SSam Leffler void
ar5416BeaconInit(struct ath_hal * ah,uint32_t next_beacon,uint32_t beacon_period)8214779705SSam Leffler ar5416BeaconInit(struct ath_hal *ah,
8314779705SSam Leffler 	uint32_t next_beacon, uint32_t beacon_period)
8414779705SSam Leffler {
8514779705SSam Leffler 	HAL_BEACON_TIMERS bt;
8614779705SSam Leffler 
8714779705SSam Leffler 	bt.bt_nexttbtt = next_beacon;
8814779705SSam Leffler 	/*
8914779705SSam Leffler 	 * TIMER1: in AP/adhoc mode this controls the DMA beacon
9014779705SSam Leffler 	 * alert timer; otherwise it controls the next wakeup time.
9114779705SSam Leffler 	 * TIMER2: in AP mode, it controls the SBA beacon alert
9214779705SSam Leffler 	 * interrupt; otherwise it sets the start of the next CFP.
9314779705SSam Leffler 	 */
9414779705SSam Leffler 	bt.bt_flags = 0;
9514779705SSam Leffler 	switch (AH_PRIVATE(ah)->ah_opmode) {
9614779705SSam Leffler 	case HAL_M_STA:
9714779705SSam Leffler 	case HAL_M_MONITOR:
9814779705SSam Leffler 		bt.bt_nextdba = 0xffff;
9914779705SSam Leffler 		bt.bt_nextswba = 0x7ffff;
10014779705SSam Leffler 		bt.bt_flags |= AR_TIMER_MODE_TBTT;
10114779705SSam Leffler 		break;
10214779705SSam Leffler 	case HAL_M_IBSS:
10314779705SSam Leffler 		OS_REG_SET_BIT(ah, AR_TXCFG, AR_TXCFG_ATIM_TXPOLICY);
10414779705SSam Leffler 		bt.bt_flags |= AR_TIMER_MODE_NDP;
10514779705SSam Leffler 		/* fall thru... */
10614779705SSam Leffler 	case HAL_M_HOSTAP:
10714779705SSam Leffler 		bt.bt_nextdba = (next_beacon -
10837931a35SAdrian Chadd 		    ah->ah_config.ah_dma_beacon_response_time) << 3;	/* 1/8 TU */
10914779705SSam Leffler 		bt.bt_nextswba = (next_beacon -
11037931a35SAdrian Chadd 		    ah->ah_config.ah_sw_beacon_response_time) << 3;	/* 1/8 TU */
11114779705SSam Leffler 		bt.bt_flags |= AR_TIMER_MODE_TBTT
11214779705SSam Leffler 			    |  AR_TIMER_MODE_DBA
11314779705SSam Leffler 			    |  AR_TIMER_MODE_SWBA;
11414779705SSam Leffler 		break;
11514779705SSam Leffler 	}
11614779705SSam Leffler 	/*
11714779705SSam Leffler 	 * Set the ATIM window
11814779705SSam Leffler 	 * Our hardware does not support an ATIM window of 0
11914779705SSam Leffler 	 * (beacons will not work).  If the ATIM windows is 0,
12014779705SSam Leffler 	 * force it to 1.
12114779705SSam Leffler 	 */
12214779705SSam Leffler 	bt.bt_nextatim = next_beacon + 1;
12314779705SSam Leffler 	bt.bt_intval = beacon_period &
12414779705SSam Leffler 		(AR_BEACON_PERIOD | AR_BEACON_RESET_TSF | AR_BEACON_EN);
12514779705SSam Leffler 	ar5416SetBeaconTimers(ah, &bt);
12614779705SSam Leffler }
12714779705SSam Leffler 
12814779705SSam Leffler #define AR_BEACON_PERIOD_MAX	0xffff
12914779705SSam Leffler 
13014779705SSam Leffler void
ar5416ResetStaBeaconTimers(struct ath_hal * ah)13114779705SSam Leffler ar5416ResetStaBeaconTimers(struct ath_hal *ah)
13214779705SSam Leffler {
13314779705SSam Leffler 	uint32_t val;
13414779705SSam Leffler 
13514779705SSam Leffler 	OS_REG_WRITE(ah, AR_NEXT_TBTT, 0);		/* no beacons */
13614779705SSam Leffler 	val = OS_REG_READ(ah, AR_STA_ID1);
13714779705SSam Leffler 	val |= AR_STA_ID1_PWR_SAV;		/* XXX */
13814779705SSam Leffler 	/* tell the h/w that the associated AP is not PCF capable */
13914779705SSam Leffler 	OS_REG_WRITE(ah, AR_STA_ID1,
14014779705SSam Leffler 		val & ~(AR_STA_ID1_USE_DEFANT | AR_STA_ID1_PCF));
14114779705SSam Leffler 	OS_REG_WRITE(ah, AR5416_BEACON_PERIOD, AR_BEACON_PERIOD_MAX);
14214779705SSam Leffler 	OS_REG_WRITE(ah, AR_DBA_PERIOD, AR_BEACON_PERIOD_MAX);
14314779705SSam Leffler }
14414779705SSam Leffler 
14514779705SSam Leffler /*
14614779705SSam Leffler  * Set all the beacon related bits on the h/w for stations
14714779705SSam Leffler  * i.e. initializes the corresponding h/w timers;
14814779705SSam Leffler  * also tells the h/w whether to anticipate PCF beacons
14914779705SSam Leffler  */
15014779705SSam Leffler void
ar5416SetStaBeaconTimers(struct ath_hal * ah,const HAL_BEACON_STATE * bs)15114779705SSam Leffler ar5416SetStaBeaconTimers(struct ath_hal *ah, const HAL_BEACON_STATE *bs)
15214779705SSam Leffler {
15314779705SSam Leffler 	uint32_t nextTbtt, nextdtim,beaconintval, dtimperiod;
15414779705SSam Leffler 
15514779705SSam Leffler 	HALASSERT(bs->bs_intval != 0);
15614779705SSam Leffler 
15714779705SSam Leffler 	/* NB: no cfp setting since h/w automatically takes care */
15814779705SSam Leffler 
15934ff1d08SAdrian Chadd 	OS_REG_WRITE(ah, AR_NEXT_TBTT, TU_TO_USEC(bs->bs_nexttbtt));
16014779705SSam Leffler 
16114779705SSam Leffler 	/*
16214779705SSam Leffler 	 * Start the beacon timers by setting the BEACON register
16314779705SSam Leffler 	 * to the beacon interval; no need to write tim offset since
16414779705SSam Leffler 	 * h/w parses IEs.
16514779705SSam Leffler 	 */
16614779705SSam Leffler 	OS_REG_WRITE(ah, AR5416_BEACON_PERIOD,
16714779705SSam Leffler 			 TU_TO_USEC(bs->bs_intval & HAL_BEACON_PERIOD));
16814779705SSam Leffler 	OS_REG_WRITE(ah, AR_DBA_PERIOD,
16914779705SSam Leffler 			 TU_TO_USEC(bs->bs_intval & HAL_BEACON_PERIOD));
17014779705SSam Leffler 
17114779705SSam Leffler 	/*
17214779705SSam Leffler 	 * Configure the BMISS interrupt.  Note that we
17314779705SSam Leffler 	 * assume the caller blocks interrupts while enabling
17414779705SSam Leffler 	 * the threshold.
17514779705SSam Leffler 	 */
17614779705SSam Leffler 	HALASSERT(bs->bs_bmissthreshold <=
17714779705SSam Leffler 		(AR_RSSI_THR_BM_THR >> AR_RSSI_THR_BM_THR_S));
17814779705SSam Leffler 	OS_REG_RMW_FIELD(ah, AR_RSSI_THR,
17914779705SSam Leffler 		AR_RSSI_THR_BM_THR, bs->bs_bmissthreshold);
18014779705SSam Leffler 
18114779705SSam Leffler 	/*
18214779705SSam Leffler 	 * Program the sleep registers to correlate with the beacon setup.
18314779705SSam Leffler 	 */
18414779705SSam Leffler 
18514779705SSam Leffler 	/*
18614779705SSam Leffler 	 * Oahu beacons timers on the station were used for power
18714779705SSam Leffler 	 * save operation (waking up in anticipation of a beacon)
18814779705SSam Leffler 	 * and any CFP function; Venice does sleep/power-save timers
18914779705SSam Leffler 	 * differently - so this is the right place to set them up;
19014779705SSam Leffler 	 * don't think the beacon timers are used by venice sta hw
19114779705SSam Leffler 	 * for any useful purpose anymore
19214779705SSam Leffler 	 * Setup venice's sleep related timers
19314779705SSam Leffler 	 * Current implementation assumes sw processing of beacons -
19414779705SSam Leffler 	 *   assuming an interrupt is generated every beacon which
19514779705SSam Leffler 	 *   causes the hardware to become awake until the sw tells
19614779705SSam Leffler 	 *   it to go to sleep again; beacon timeout is to allow for
19714779705SSam Leffler 	 *   beacon jitter; cab timeout is max time to wait for cab
19814779705SSam Leffler 	 *   after seeing the last DTIM or MORE CAB bit
19914779705SSam Leffler 	 */
200ee6325abSAdrian Chadd 
201ee6325abSAdrian Chadd /*
202ee6325abSAdrian Chadd  * I've bumped these to 30TU for now.
203ee6325abSAdrian Chadd  *
204ee6325abSAdrian Chadd  * Some APs (AR933x/AR934x?) in 2GHz especially seem to not always
205ee6325abSAdrian Chadd  * transmit beacon frames at exactly the right times and with it set
206ee6325abSAdrian Chadd  * to 10TU, the NIC starts not waking up at the right times to hear
207ee6325abSAdrian Chadd  * these slightly-larger-jitering beacons.  It also never recovers
208ee6325abSAdrian Chadd  * from that (it doesn't resync? I'm not sure.)
209ee6325abSAdrian Chadd  *
210ee6325abSAdrian Chadd  * So for now bump this to 30TU.  Ideally we'd cap this based on
211ee6325abSAdrian Chadd  * the beacon interval so the sum of CAB+BEACON timeouts never
212ee6325abSAdrian Chadd  * exceeded the beacon interval.
213ee6325abSAdrian Chadd  *
214ee6325abSAdrian Chadd  * Now, since we're doing all the math in the ath(4) driver in TU
215ee6325abSAdrian Chadd  * rather than TSF, we may be seeing the result of dumb rounding
216ee6325abSAdrian Chadd  * errors causing the jitter to actually be a much bigger problem.
217ee6325abSAdrian Chadd  * I'll have to investigate that with a fine tooth comb.
218ee6325abSAdrian Chadd  */
21914779705SSam Leffler #define CAB_TIMEOUT_VAL     10 /* in TU */
22014779705SSam Leffler #define BEACON_TIMEOUT_VAL  10 /* in TU */
22114779705SSam Leffler #define SLEEP_SLOP          3  /* in TU */
22214779705SSam Leffler 
22314779705SSam Leffler 	/*
22414779705SSam Leffler 	 * For max powersave mode we may want to sleep for longer than a
22514779705SSam Leffler 	 * beacon period and not want to receive all beacons; modify the
22614779705SSam Leffler 	 * timers accordingly; make sure to align the next TIM to the
22714779705SSam Leffler 	 * next DTIM if we decide to wake for DTIMs only
22814779705SSam Leffler 	 */
22914779705SSam Leffler 	beaconintval = bs->bs_intval & HAL_BEACON_PERIOD;
23014779705SSam Leffler 	HALASSERT(beaconintval != 0);
23114779705SSam Leffler 	if (bs->bs_sleepduration > beaconintval) {
23214779705SSam Leffler 		HALASSERT(roundup(bs->bs_sleepduration, beaconintval) ==
23314779705SSam Leffler 				bs->bs_sleepduration);
23414779705SSam Leffler 		beaconintval = bs->bs_sleepduration;
23514779705SSam Leffler 	}
23614779705SSam Leffler 	dtimperiod = bs->bs_dtimperiod;
23714779705SSam Leffler 	if (bs->bs_sleepduration > dtimperiod) {
23814779705SSam Leffler 		HALASSERT(dtimperiod == 0 ||
23914779705SSam Leffler 			roundup(bs->bs_sleepduration, dtimperiod) ==
24014779705SSam Leffler 				bs->bs_sleepduration);
24114779705SSam Leffler 		dtimperiod = bs->bs_sleepduration;
24214779705SSam Leffler 	}
24314779705SSam Leffler 	HALASSERT(beaconintval <= dtimperiod);
24414779705SSam Leffler 	if (beaconintval == dtimperiod)
24514779705SSam Leffler 		nextTbtt = bs->bs_nextdtim;
24614779705SSam Leffler 	else
24714779705SSam Leffler 		nextTbtt = bs->bs_nexttbtt;
24814779705SSam Leffler 	nextdtim = bs->bs_nextdtim;
24914779705SSam Leffler 
25014779705SSam Leffler 	OS_REG_WRITE(ah, AR_NEXT_DTIM,
25114779705SSam Leffler 		TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
25214779705SSam Leffler 	OS_REG_WRITE(ah, AR_NEXT_TIM, TU_TO_USEC(nextTbtt - SLEEP_SLOP));
25314779705SSam Leffler 
25414779705SSam Leffler 	/* cab timeout is now in 1/8 TU */
255607756e9SAdrian Chadd 	OS_REG_WRITE(ah, AR5416_SLEEP1,
25614779705SSam Leffler 		SM((CAB_TIMEOUT_VAL << 3), AR5416_SLEEP1_CAB_TIMEOUT)
257607756e9SAdrian Chadd 		| AR5416_SLEEP1_ASSUME_DTIM);
258607756e9SAdrian Chadd 
259607756e9SAdrian Chadd 	/* XXX autosleep? Use min beacon timeout; check ath9k -adrian */
26014779705SSam Leffler 	/* beacon timeout is now in 1/8 TU */
261607756e9SAdrian Chadd 	OS_REG_WRITE(ah, AR5416_SLEEP2,
26214779705SSam Leffler 		SM((BEACON_TIMEOUT_VAL << 3), AR5416_SLEEP2_BEACON_TIMEOUT));
26314779705SSam Leffler 
264607756e9SAdrian Chadd 	/* TIM_PERIOD and DTIM_PERIOD are now in uS. */
265607756e9SAdrian Chadd 	OS_REG_WRITE(ah, AR_TIM_PERIOD, TU_TO_USEC(beaconintval));
266607756e9SAdrian Chadd 	OS_REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));
267607756e9SAdrian Chadd 
26814779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_TIMER_MODE,
26914779705SSam Leffler 	     AR_TIMER_MODE_TBTT | AR_TIMER_MODE_TIM | AR_TIMER_MODE_DTIM);
270ee6325abSAdrian Chadd 
271ee6325abSAdrian Chadd #define	HAL_TSFOOR_THRESHOLD	0x00004240 /* TSF OOR threshold (16k us) */
272ee6325abSAdrian Chadd 
273ee6325abSAdrian Chadd 	/* TSF out of range threshold */
274ee6325abSAdrian Chadd //	OS_REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold);
275ee6325abSAdrian Chadd 	OS_REG_WRITE(ah, AR_TSFOOR_THRESHOLD, HAL_TSFOOR_THRESHOLD);
276ee6325abSAdrian Chadd 
27714779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: next DTIM %d\n",
27814779705SSam Leffler 	    __func__, bs->bs_nextdtim);
27914779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: next beacon %d\n",
28014779705SSam Leffler 	    __func__, nextTbtt);
28114779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: beacon period %d\n",
28214779705SSam Leffler 	    __func__, beaconintval);
28314779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: DTIM period %d\n",
28414779705SSam Leffler 	    __func__, dtimperiod);
28514779705SSam Leffler #undef CAB_TIMEOUT_VAL
28614779705SSam Leffler #undef BEACON_TIMEOUT_VAL
28714779705SSam Leffler #undef SLEEP_SLOP
28814779705SSam Leffler }
289