| /freebsd/share/man/man4/ |
| H A D | uart.4 | 1 .\"-
2 .\" SPDX-License-Identifier: BSD-2-Clause
32 .Nm uart
35 .Cd "device uart"
38 .Cd "device uart"
41 .Cd "device uart"
45 .Cd hint.uart.0.disabled="1"
46 .Cd hint.uart.0.baud="38400"
47 .Cd hint.uart.0.port="0x3f8"
48 .Cd hint.uart.0.flags="0x10"
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| H A D | uftdi.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause
38 .Nd Future Technology Devices International USB to serial UART driver
55 driver supports FTDI USB to serial UART devices.
78 driver supports the following USB to serial UART controllers:
80 .Bl -bullet -compact
108 .Bl -tag -width "hw.usb.uftdi.skip_jtag_interfaces"
125 .Bl -tag -width indent
147 returns the channel to standard UART mode.
148 .Bd -literal
174 data which either reflects pin state or is interpreted
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| H A D | uchcom.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause
38 .Nd WinChipHead CH9102/CH343/CH341/CH340 USB to serial UART driver
54 driver provides support for the WinChipHead USB to serial UART adapters.
77 driver supports the following USB to serial UART controllers:
79 .Bl -bullet -compact
97 .Bl -tag -width "hw.usb.uchcom.debug"
103 .Bl -tag -width "/dev/ttyU*.init" -compact
108 corresponding callin initial-state and lock-state devices
114 corresponding callout initial-state and lock-state devices
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| /freebsd/sys/contrib/device-tree/src/arm/qcom/ |
| H A D | qcom-apq8064-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 sdcc1_default_state: sdcc1-default-state {
5 clk-pins {
7 drive-strength = <16>;
8 bias-disable;
11 cmd-pins {
13 drive-strength = <10>;
14 bias-pull-up;
17 data-pins {
19 drive-strength = <10>;
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| H A D | qcom-mdm9615-wp8548.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 #include "qcom-mdm9615.dtsi"
23 pinctrl-0 = <&reset_out_pins>;
24 pinctrl-names = "default";
26 gsbi3_pins: gsbi3-state {
27 gsbi3-pins {
30 drive-strengt
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| /freebsd/sys/dev/uart/ |
| H A D | uart_bus.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
57 /* UART quirk flags */
61 * UART class & instance (=softc)
65 struct uart_ops *uc_ops; /* Low-level console operations. */
92 bool sc_callout:1; /* This UART is opened for callout. */
93 bool sc_fastintr:1; /* This UART uses fast interrupts. */
94 bool sc_hwiflow:1; /* This UART has HW input flow ctl. */
95 bool sc_hwoflow:1; /* This UART has HW output flow ctl. */
96 bool sc_leaving:1; /* This UART is going away. */
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| H A D | uart_if.m | 1 #-
33 #include <dev/uart/uart.h>
34 #include <dev/uart/uart_bus.h>
36 # The UART hardware interface. The core UART code is hardware independent.
37 # The details of the hardware are abstracted by the UART hardware interface.
39 INTERFACE uart;
52 # attach() - attach hardware.
55 # high-level (ie tty) initialization has been done yet.
61 # detach() - detach hardware.
63 # is the first action performed, so even the high-level (ie tty) interface
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| H A D | uart_dev_ns8250.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
47 #include <dev/uart/uart.h>
48 #include <dev/uart/uart_cpu.h>
50 #include <dev/uart/uart_cpu_fdt.h>
52 #include <dev/uart/uart_bus.h>
53 #include <dev/uart/uart_dev_ns8250.h>
54 #include <dev/uart/uart_ppstypes.h>
56 #include <dev/uart/uart_cpu_acpi.h>
78 &broken_txfifo, 0, "UART FIFO has QEMU emulation bug");
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| H A D | uart_tty.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
45 #include <dev/uart/uart.h>
46 #include <dev/uart/uart_bus.h>
47 #include <dev/uart/uart_cpu.h>
71 uart,
77 /* TTY swi(9) event. Allows all uart soft handlers to share one ithread. */
84 cp->cn_pri = CN_DEAD; in uart_cnprobe()
94 strlcpy(cp->cn_name, uart_driver_name, sizeof(cp->cn_name)); in uart_cnprobe()
95 cp->cn_pri = (boothowto & RB_SERIAL) ? CN_REMOTE : CN_NORMAL; in uart_cnprobe()
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| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | microchip,pic32-uart.txt | 1 * Microchip Universal Asynchronous Receiver Transmitter (UART)
4 - compatible: Should be "microchip,pic32mzda-uart"
5 - reg: Should contain registers location and length
6 - interrupts: Should contain interrupt
7 - clocks: Phandle to the clock.
8 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
9 - pinctrl-names: A pinctrl state names "default" must be defined.
10 - pinctrl-0: Phandle referencing pin configuration of the UART peripheral.
11 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
14 - cts-gpios: CTS pin for UART
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| H A D | pl011.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM AMBA Primecell PL011 serial UART
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: serial.yaml#
22 - arm,pl011
24 - compatible
29 - const: arm,pl011
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| /freebsd/sys/contrib/device-tree/Bindings/net/bluetooth/ |
| H A D | mediatek,bluetooth.txt | 1 MediaTek UART based Bluetooth Devices
4 This device is a serial attached device to UART device and thus it must be a
5 child node of the serial node with UART.
13 - compatible: Must be
14 "mediatek,mt7663u-bluetooth": for MT7663U device
15 "mediatek,mt7668u-bluetooth": for MT7668U device
16 - vcc-supply: Main voltage regulator
21 - pinctrl-names: Should be "default", "runtime"
22 - pinctrl-0: Should contain UART RXD low when the device is powered up to
24 - pinctrl-1: Should contain UART mode pin ctrl
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| H A D | nxp,88w8987-bt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/nxp,88w8987-bt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This binding describes UART-attached NXP bluetooth chips. These chips
11 are dual-radio chips supporting WiFi and Bluetooth. The bluetooth
12 works on standard H4 protocol over 4-wire UART. The RTS and CTS lines
14 asserts break signal over UART-TX line to put the chip into power save
15 state. De-asserting break wakes up the BT chip.
18 - Neeraj Sanjay Kale <neeraj.sanjaykale@nxp.com>
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | mediatek-bluetooth.txt | 1 MediaTek UART based Bluetooth Devices
4 This device is a serial attached device to UART device and thus it must be a
5 child node of the serial node with UART.
13 - compatible: Must be
14 "mediatek,mt7663u-bluetooth": for MT7663U device
15 "mediatek,mt7668u-bluetooth": for MT7668U device
16 - vcc-supply: Main voltage regulator
21 - pinctrl-names: Should be "default", "runtime"
22 - pinctrl-0: Should contain UART RXD low when the device is powered up to
24 - pinctrl-1: Should contain UART mode pin ctrl
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| /freebsd/sys/contrib/device-tree/src/arm64/exynos/google/ |
| H A D | gs101.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2019-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 #include <dt-bindings/clock/google,gs101.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/soc/samsung,exynos-usi.h>
16 #address-cells = <2>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
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| /freebsd/sys/contrib/device-tree/src/mips/qca/ |
| H A D | ar9331_dragino_ms14.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
14 serial0 = &uart;
23 compatible = "gpio-leds";
25 led-wlan {
28 default-state = "off";
31 led-lan {
34 default-state = "off";
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| H A D | ar9331_tl_mr3020.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
10 model = "TP-Link TL-MR3020";
11 compatible = "tplink,tl-mr3020";
14 serial0 = &uart;
23 compatible = "gpio-leds";
25 led-wlan {
26 label = "tp-link:green:wlan";
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| H A D | ar9331_omega.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
14 serial0 = &uart;
23 compatible = "gpio-leds";
25 led-system {
28 default-state = "off";
32 gpio-keys {
33 compatible = "gpio-keys";
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | aspeed-lpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lp
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| /freebsd/sys/contrib/device-tree/src/arm/microchip/ |
| H A D | at91-sama5d29_curiosity.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d29_curiosity.dts - Device Tree file for SAMA5D29 Curiosity board
10 /dts-v1/;
12 #include "sama5d2-pinfunc.h"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
19 compatible = "microchip,sama5d29-curiosity", "atmel,sama5d29", "atmel,sama5d2", "atmel,sama5";
33 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
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| /freebsd/sys/contrib/device-tree/Bindings/soc/tegra/ |
| H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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| /freebsd/sys/contrib/device-tree/src/arm64/sprd/ |
| H A D | ums9620.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
50 compatible = "arm,cortex-a55";
52 enable-method = "psci";
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| /freebsd/sys/contrib/device-tree/Bindings/gnss/ |
| H A D | mediatek.txt | 1 Mediatek-based GNSS Receiver DT binding
3 Mediatek chipsets are used in GNSS-receiver modules produced by several
4 vendors and can use a UART interface.
11 - compatible : Must be
15 - vcc-supply : Main voltage regulator (pin name: VCC)
19 - current-speed : Default UART baud rate
20 - gnss-fix-gpios : GPIO used to determine device position fix state
22 - reset-gpios : GPIO used to reset the device (pin name: RESET, NRESET)
23 - timepulse-gpios : Time pulse GPIO (pin name: PPS1, 1PPS)
24 - vbackup-supply : Backup voltage regulator (pin name: VBAT, VBACKUP)
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| /freebsd/sys/contrib/device-tree/src/arm/gemini/ |
| H A D | gemini-dlink-dir-685.dts | 2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
24 stdout-path = "uart0:19200n8";
28 compatible = "gpio-keys";
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8qxp-ai_ml.dts | 1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
13 compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp";
22 stdout-path = &lpuart2;
31 compatible = "gpio-leds";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_leds>;
35 user-led
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