xref: /freebsd/share/man/man4/uart.4 (revision db512bb30314326a0b2cfad3f9094dd830744777)
1*db512bb3SAlexander Ziaee.\"-
2*db512bb3SAlexander Ziaee.\" SPDX-License-Identifier: BSD-2-Clause
327d5dc18SMarcel Moolenaar.\"
427d5dc18SMarcel Moolenaar.\" Copyright (c) 2003 Marcel Moolenaar
527d5dc18SMarcel Moolenaar.\" All rights reserved.
627d5dc18SMarcel Moolenaar.\"
727d5dc18SMarcel Moolenaar.\" Redistribution and use in source and binary forms, with or without
827d5dc18SMarcel Moolenaar.\" modification, are permitted provided that the following conditions
927d5dc18SMarcel Moolenaar.\" are met:
1027d5dc18SMarcel Moolenaar.\"
1127d5dc18SMarcel Moolenaar.\" 1. Redistributions of source code must retain the above copyright
1227d5dc18SMarcel Moolenaar.\"    notice, this list of conditions and the following disclaimer.
1327d5dc18SMarcel Moolenaar.\" 2. Redistributions in binary form must reproduce the above copyright
1427d5dc18SMarcel Moolenaar.\"    notice, this list of conditions and the following disclaimer in the
1527d5dc18SMarcel Moolenaar.\"    documentation and/or other materials provided with the distribution.
1627d5dc18SMarcel Moolenaar.\"
1727d5dc18SMarcel Moolenaar.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1827d5dc18SMarcel Moolenaar.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1927d5dc18SMarcel Moolenaar.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
2027d5dc18SMarcel Moolenaar.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2127d5dc18SMarcel Moolenaar.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2227d5dc18SMarcel Moolenaar.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2327d5dc18SMarcel Moolenaar.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2427d5dc18SMarcel Moolenaar.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2527d5dc18SMarcel Moolenaar.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2627d5dc18SMarcel Moolenaar.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2727d5dc18SMarcel Moolenaar.\"
28*db512bb3SAlexander Ziaee.Dd December 5, 2024
2927d5dc18SMarcel Moolenaar.Dt UART 4
3027d5dc18SMarcel Moolenaar.Os
3127d5dc18SMarcel Moolenaar.Sh NAME
3227d5dc18SMarcel Moolenaar.Nm uart
33*db512bb3SAlexander Ziaee.Nd Universal Asynchronous Receiver/Transmitter serial driver
3427d5dc18SMarcel Moolenaar.Sh SYNOPSIS
3527d5dc18SMarcel Moolenaar.Cd "device uart"
3627d5dc18SMarcel Moolenaar.Pp
3727d5dc18SMarcel Moolenaar.Cd "device puc"
3827d5dc18SMarcel Moolenaar.Cd "device uart"
39af2e25a6SMarcel Moolenaar.Pp
40af2e25a6SMarcel Moolenaar.Cd "device scc"
41af2e25a6SMarcel Moolenaar.Cd "device uart"
42def2344dSSam Leffler.Pp
43def2344dSSam LefflerIn
44def2344dSSam Leffler.Pa /boot/device.hints :
45def2344dSSam Leffler.Cd hint.uart.0.disabled="1"
46def2344dSSam Leffler.Cd hint.uart.0.baud="38400"
47def2344dSSam Leffler.Cd hint.uart.0.port="0x3f8"
48def2344dSSam Leffler.Cd hint.uart.0.flags="0x10"
49def2344dSSam Leffler.Pp
50def2344dSSam LefflerWith
51def2344dSSam Leffler.Ar flags
52def2344dSSam Lefflerencoded as:
53def2344dSSam Leffler.Bl -tag -compact -width 0x000000
54def2344dSSam Leffler.It 0x00010
55def2344dSSam Lefflerdevice is potential system console
56def2344dSSam Leffler.It 0x00080
57def2344dSSam Leffleruse this port for remote kernel debugging
58def2344dSSam Leffler.It 0x00100
59def2344dSSam Lefflerset RX FIFO trigger level to ``low'' (NS8250 only)
60def2344dSSam Leffler.It 0x00200
61def2344dSSam Lefflerset RX FIFO trigger level to ``medium low'' (NS8250 only)
62def2344dSSam Leffler.It 0x00400
63def2344dSSam Lefflerset RX FIFO trigger level to ``medium high'' (default, NS8250 only)
64def2344dSSam Leffler.It 0x00800
65def2344dSSam Lefflerset RX FIFO trigger level to ``high'' (NS8250 only)
66def2344dSSam Leffler.El
6727d5dc18SMarcel Moolenaar.\"
6827d5dc18SMarcel Moolenaar.Sh DESCRIPTION
6927d5dc18SMarcel MoolenaarThe
7027d5dc18SMarcel Moolenaar.Nm
7127d5dc18SMarcel Moolenaardevice driver provides support for various classes of UARTs implementing the
7227d5dc18SMarcel MoolenaarEIA RS-232C (CCITT V.24) serial communications interface.
73c48524c2SMike PritchardEach such interface is controlled by a separate and independent instance of
7427d5dc18SMarcel Moolenaarthe
7527d5dc18SMarcel Moolenaar.Nm
7627d5dc18SMarcel Moolenaardriver.
7727d5dc18SMarcel MoolenaarThe primary support for devices that contain multiple serial interfaces or
7827d5dc18SMarcel Moolenaarthat contain other functionality besides one or more serial interfaces is
7927d5dc18SMarcel Moolenaarprovided by the
80af2e25a6SMarcel Moolenaar.Xr puc 4 ,
81af2e25a6SMarcel Moolenaaror
82af2e25a6SMarcel Moolenaar.Xr scc 4
83af2e25a6SMarcel Moolenaardevice drivers.
8427d5dc18SMarcel MoolenaarHowever, the serial interfaces of those devices that are managed by the
85af2e25a6SMarcel Moolenaar.Xr puc 4 ,
86af2e25a6SMarcel Moolenaaror
87af2e25a6SMarcel Moolenaar.Xr scc 4
88af2e25a6SMarcel Moolenaardriver are each independently controlled by the
8927d5dc18SMarcel Moolenaar.Nm
9027d5dc18SMarcel Moolenaardriver.
9127d5dc18SMarcel MoolenaarAs such, the
92af2e25a6SMarcel Moolenaar.Xr puc 4 ,
93af2e25a6SMarcel Moolenaaror
94af2e25a6SMarcel Moolenaar.Xr scc 4
9527d5dc18SMarcel Moolenaardriver provides umbrella functionality for the
9627d5dc18SMarcel Moolenaar.Nm
9727d5dc18SMarcel Moolenaardriver and hides the complexities that are inherent when elementary components
9827d5dc18SMarcel Moolenaarare packaged together.
9927d5dc18SMarcel Moolenaar.Pp
10027d5dc18SMarcel MoolenaarThe
10127d5dc18SMarcel Moolenaar.Nm
10227d5dc18SMarcel Moolenaardriver has a modular design to allow it to be used on differing hardware and
10327d5dc18SMarcel Moolenaarfor various purposes.
10427d5dc18SMarcel MoolenaarIn the following sections the components are discussed in detail.
10527d5dc18SMarcel MoolenaarOptions are described in the section that covers the component to which each
10627d5dc18SMarcel Moolenaaroption applies.
10727d5dc18SMarcel Moolenaar.\"
10827d5dc18SMarcel Moolenaar.Ss CORE COMPONENT
10927d5dc18SMarcel MoolenaarAt the heart of the
11027d5dc18SMarcel Moolenaar.Nm
111fdae0df4SHiten Pandyadriver is the core component.
112fdae0df4SHiten PandyaIt contains the bus attachments and the low-level interrupt handler.
11327d5dc18SMarcel Moolenaar.\"
11427d5dc18SMarcel Moolenaar.Ss HARDWARE DRIVERS
11527d5dc18SMarcel MoolenaarThe core component and the kernel interfaces talk to the hardware through the
11627d5dc18SMarcel Moolenaarhardware interface.
11727d5dc18SMarcel MoolenaarThis interface serves as an abstraction of the hardware and allows varying
11827d5dc18SMarcel MoolenaarUARTs to be used for serial communications.
11927d5dc18SMarcel Moolenaar.\"
12027d5dc18SMarcel Moolenaar.Ss SYSTEM DEVICES
12127d5dc18SMarcel MoolenaarSystem devices are UARTs that have a special purpose by way of hardware
12227d5dc18SMarcel Moolenaardesign or software setup.
12327d5dc18SMarcel MoolenaarFor example, Sun UltraSparc machines use UARTs as their keyboard interface.
12427d5dc18SMarcel MoolenaarSuch an UART cannot be used for general purpose communications.
12527d5dc18SMarcel MoolenaarLikewise, when the kernel is configured for a serial console, the
12627d5dc18SMarcel Moolenaarcorresponding UART will in turn be a system device so that the kernel can
12727d5dc18SMarcel Moolenaaroutput boot messages early on in the boot process.
12827d5dc18SMarcel Moolenaar.\"
12927d5dc18SMarcel Moolenaar.Ss KERNEL INTERFACES
13027d5dc18SMarcel MoolenaarThe last but not least of the components is the kernel interface.
13127d5dc18SMarcel MoolenaarThis component ultimately determines how the UART is made visible to the
13227d5dc18SMarcel Moolenaarkernel in particular and to users in general.
13327d5dc18SMarcel MoolenaarThe default kernel interface is the TTY interface.
13427d5dc18SMarcel MoolenaarThis allows the UART to be used for terminals, modems and serial line IP
13527d5dc18SMarcel Moolenaarapplications.
13627d5dc18SMarcel MoolenaarSystem devices, with the notable exception of serial consoles, generally
13727d5dc18SMarcel Moolenaarhave specialized kernel interfaces.
13827d5dc18SMarcel Moolenaar.\"
139a814fd62SMarcel Moolenaar.Sh HARDWARE
140a814fd62SMarcel MoolenaarThe
141a814fd62SMarcel Moolenaar.Nm
142a814fd62SMarcel Moolenaardriver supports the following classes of UARTs:
143a814fd62SMarcel Moolenaar.Pp
144a814fd62SMarcel Moolenaar.Bl -bullet -compact
145a814fd62SMarcel Moolenaar.It
146a814fd62SMarcel MoolenaarNS8250: standard hardware based on the 8250, 16450, 16550, 16650, 16750 or
147af2e25a6SMarcel Moolenaarthe 16950 UARTs.
148a814fd62SMarcel Moolenaar.It
149af2e25a6SMarcel MoolenaarSCC: serial communications controllers supported by the
150af2e25a6SMarcel Moolenaar.Xr scc 4
151af2e25a6SMarcel Moolenaardevice driver.
152a814fd62SMarcel Moolenaar.El
153a814fd62SMarcel Moolenaar.\"
154196d3019SIan Lepore.Sh Pulse Per Second (PPS) Timing Interface
155196d3019SIan LeporeThe
156196d3019SIan Lepore.Nm
157196d3019SIan Leporedriver can capture PPS timing information as defined in RFC 2783.
158196d3019SIan LeporeThe API, accessed via
1592017d1b0SEdward Tomasz Napierala.Xr ioctl 2 ,
160196d3019SIan Leporeis available on the tty device.
161196d3019SIan LeporeTo use the PPS capture feature with
162196d3019SIan Lepore.Xr ntpd 8 ,
163fdfbb3f5SIan Leporesymlink the tty callout device
164fdfbb3f5SIan Lepore.Va /dev/cuau?
165fdfbb3f5SIan Leporeto
166196d3019SIan Lepore.Va /dev/pps0.
167196d3019SIan Lepore.Pp
168196d3019SIan LeporeThe
169196d3019SIan Lepore.Va hw.uart.pps_mode
170196d3019SIan Leporetunable configures the PPS capture mode for all uart devices;
171196d3019SIan Leporeit can be set in
172196d3019SIan Lepore.Xr loader.conf 5 .
173196d3019SIan LeporeThe
174196d3019SIan Lepore.Va dev.uart.0.pps_mode
175196d3019SIan Leporesysctl configures the PPS capture mode for a specific uart device;
176196d3019SIan Leporeit can be set in
177196d3019SIan Lepore.Xr loader.conf 5
178196d3019SIan Leporeor
179196d3019SIan Lepore.Xr sysctl.conf 5 .
180fdfbb3f5SIan Lepore.Pp
181196d3019SIan LeporeThe following capture modes are available:
182196d3019SIan Lepore.Bl -tag -compact -offset "mmmm" -width "mmmm"
183fdfbb3f5SIan Lepore.It 0x00
184196d3019SIan LeporeCapture disabled.
185fdfbb3f5SIan Lepore.It 0x01
186196d3019SIan LeporeCapture pulses on the CTS line.
187fdfbb3f5SIan Lepore.It 0x02
188fdfbb3f5SIan LeporeCapture pulses on the DCD line.
189196d3019SIan Lepore.El
190fdfbb3f5SIan Lepore.Pp
191fdfbb3f5SIan LeporeThe following values may be ORed with the capture mode to configure
192fdfbb3f5SIan Leporecapture processing options:
193fdfbb3f5SIan Lepore.Bl -tag -compact -offset "mmmm" -width "mmmm"
194fdfbb3f5SIan Lepore.It 0x10
195fdfbb3f5SIan LeporeInvert the pulse (RS-232 logic low = ASSERT, high = CLEAR).
196fdfbb3f5SIan Lepore.It 0x20
197fdfbb3f5SIan LeporeAttempt to capture narrow pulses.
198fdfbb3f5SIan Lepore.El
199fdfbb3f5SIan Lepore.Pp
200fdfbb3f5SIan LeporeAdd the narrow pulse option when the incoming PPS pulse width is small
201fdfbb3f5SIan Leporeenough to prevent reliable capture in normal mode.
202fdfbb3f5SIan LeporeIn narrow mode the driver uses the hardware's ability to latch a line
203fdfbb3f5SIan Leporestate change; not all hardware has this capability.
204fdfbb3f5SIan LeporeThe hardware latch provides a reliable indication that a pulse occurred,
205fdfbb3f5SIan Leporebut prevents distinguishing between the CLEAR and ASSERT edges of the pulse.
206fdfbb3f5SIan LeporeFor each detected pulse, the driver synthesizes both an ASSERT and a CLEAR
207fdfbb3f5SIan Leporeevent, using the same timestamp for each.
208fdfbb3f5SIan LeporeTo prevent spurious events when the hardware is intermittently able to
209fdfbb3f5SIan Leporesee both edges of a pulse, the driver will not generate a new pair of
210fdfbb3f5SIan Leporeevents within a half second of the prior pair.
211fdfbb3f5SIan LeporeBoth normal and narrow pulse modes work with
212fdfbb3f5SIan Lepore.Xr ntpd 8 .
213fdfbb3f5SIan Lepore.Pp
214fdfbb3f5SIan LeporeAdd the invert option when the connection to the uart device uses TTL
215fdfbb3f5SIan Leporelevel signals, or when the PPS source emits inverted pulses.
216fdfbb3f5SIan LeporeRFC 2783 defines an ASSERT event as a higher-voltage line level, and a CLEAR
217fdfbb3f5SIan Leporeevent as a lower-voltage line level, in the context of the RS-232 protocol.
218fdfbb3f5SIan LeporeThe modem control signals on a TTL-level connection are typically
219fdfbb3f5SIan Leporeinverted from the RS-232 levels.
220fdfbb3f5SIan LeporeFor example, carrier presence is indicated by a high signal on an RS-232
221fdfbb3f5SIan LeporeDCD line, and by a low signal on a TTL DCD line.
222fdfbb3f5SIan LeporeThis is due to the use of inverting line driver buffers to convert between
223fdfbb3f5SIan LeporeTTL and RS-232 line levels in most hardware designs.
224fdfbb3f5SIan LeporeGenerally speaking, a connection to a DB-9 style connector is an RS-232
225fdfbb3f5SIan Leporelevel signal at up to 12 volts.
226fdfbb3f5SIan LeporeA connection to header pins or an edge-connector on an embedded board
227fdfbb3f5SIan Leporeis typically a TTL signal at 3.3 or 5 volts.
22829989b45SWarner Losh.Sh Special Devices
22929989b45SWarner LoshThe
23029989b45SWarner Losh.Nm
23129989b45SWarner Loshdriver also supports an initial-state and a lock-state control
23229989b45SWarner Loshdevice for each of the callin and the callout "data" devices.
23329989b45SWarner LoshThe termios settings of a data device are copied
23429989b45SWarner Loshfrom those of the corresponding initial-state device
23529989b45SWarner Loshon first opens and are not inherited from previous opens.
23629989b45SWarner LoshUse
23729989b45SWarner Losh.Xr stty 1
23829989b45SWarner Loshin the normal way on the initial-state devices to program
23929989b45SWarner Loshinitial termios states suitable for your setup.
24029989b45SWarner Losh.Pp
24129989b45SWarner LoshThe lock termios state acts as flags to disable changing
24229989b45SWarner Loshthe termios state.
24329989b45SWarner LoshE.g., to lock a flag variable such as CRTSCTS, use
24429989b45SWarner Losh.Em stty crtscts
24529989b45SWarner Loshon the lock-state device.
24629989b45SWarner LoshSpeeds and special characters
24729989b45SWarner Loshmay be locked by setting the corresponding value in the lock-state
24829989b45SWarner Loshdevice to any nonzero value.
24929989b45SWarner LoshE.g., to lock a speed to 115200, use
25029989b45SWarner Losh.Dq Li stty 115200
25129989b45SWarner Loshon the initial-state device and
25229989b45SWarner Losh.Dq Li stty 1
25329989b45SWarner Loshon the lock-state device.
25429989b45SWarner Losh.Pp
25529989b45SWarner LoshCorrect programs talking to correctly wired external devices
25629989b45SWarner Loshwork with almost arbitrary initial states and almost no locking,
25729989b45SWarner Loshbut other setups may benefit from changing some of the default
25829989b45SWarner Loshinitial state and locking the state.
25929989b45SWarner LoshIn particular, the initial states for non (POSIX) standard flags
26029989b45SWarner Loshshould be set to suit the devices attached and may need to be
26129989b45SWarner Loshlocked to prevent buggy programs from changing them.
26229989b45SWarner LoshE.g., CRTSCTS should be locked on for devices that support
26329989b45SWarner LoshRTS/CTS handshaking at all times and off for devices that do not
26429989b45SWarner Loshsupport it at all.
26529989b45SWarner LoshCLOCAL should be locked on for devices that do not support carrier.
26629989b45SWarner LoshHUPCL may be locked off if you do not
26729989b45SWarner Loshwant to hang up for some reason.
26829989b45SWarner LoshIn general, very bad things happen
26929989b45SWarner Loshif something is locked to the wrong state, and things should not
27029989b45SWarner Loshbe locked for devices that support more than one setting.
27129989b45SWarner LoshThe CLOCAL flag on callin ports should be locked off for logins
27229989b45SWarner Loshto avoid certain security holes, but this needs to be done by
27329989b45SWarner Loshgetty if the callin port is used for anything else.
2742be22860SWarner Losh.Sh Console Tuneable
2752be22860SWarner LoshThe
2762be22860SWarner Losh.Nm
2772be22860SWarner Loshdriver can be designated as a system console.
2782be22860SWarner Losh.Bl -tag -width indent
2792be22860SWarner Losh.It Va hw.uart.console
2802be22860SWarner LoshContains a number of
2812be22860SWarner Losh.Pa /etc/remote
2822be22860SWarner Loshlike tag:value pairs, separated by commas.
2832be22860SWarner Losh.Bl -tag -width indent
2842be22860SWarner Losh.It Cm \&bd
2852be22860SWarner LoshBusy Detect.
2862be22860SWarner LoshEnable the so-called
2872be22860SWarner Losh.Dq Busy Detect
2882be22860SWarner Loshquirk for the device.
2892be22860SWarner LoshFor NS 16550-compatible devices, this will use heuristics to ensure that the
2902be22860SWarner LoshUART is no longer busy before manipulating line control.
2912be22860SWarner LoshDesignWare-based UARTs need this due to a design flaw in the UART.
2922be22860SWarner Losh.It Cm \&br
2932be22860SWarner LoshBaudrate.
2942be22860SWarner LoshThe data rate (bits per second) used for communications on the serial port.
2952be22860SWarner LoshWhen the device clock rate (see below) is set to 0, then the baud rate will be
2962be22860SWarner Loshused with the divisor to compute the device clock rate the first time the device
2972be22860SWarner Loshis initialized.
2982be22860SWarner LoshOnly the traditional baud rates are allowed.
2992be22860SWarner LoshRates larger than 19200 must be a multiple of 19200.
3002be22860SWarner LoshBaud rates between 1200 and 19200 must be a multiple of 1200.
3012be22860SWarner LoshOtherwise the baud rate must be a multiple of 75.
3022be22860SWarner LoshA value of '0' instructs the
3032be22860SWarner Losh.Nm
3042be22860SWarner Loshdriver to not program the baud rate divisor and use the hardware as-is.
3052be22860SWarner Losh.It Cm \&ch
3062be22860SWarner LoshChannel.
3072be22860SWarner LoshDefaults to 0.
3082be22860SWarner LoshHas no effect on UARTs with only one channel.
3092be22860SWarner Losh.It Cm \&db
3102be22860SWarner LoshData bits.
3112be22860SWarner LoshDefaults to 8.
3122be22860SWarner Losh.It Cm \&dt
3132be22860SWarner LoshDevice type.
3142be22860SWarner LoshSpecify the uart class to use for this device.
3152be22860SWarner Losh.Bl -tag -width indent
3162be22860SWarner Losh.It ns8250
3172be22860SWarner LoshTraditional PC UART National Semiconductor 16550 and compatible devices.
3182be22860SWarner Losh.It pl011
3192be22860SWarner LoshCommon ARM UART, based on ARM Limited designs.
3202be22860SWarner Losh.El
3212be22860SWarner Losh.It Cm \&io
3222be22860SWarner LoshI/O port address.
3232be22860SWarner LoshSpecifies the address of a UART in an Intel processor's I/O space.
3242be22860SWarner LoshMutually exclusive with
3252be22860SWarner Losh.Sq mm .
3262be22860SWarner Losh.It Cm \&mm
3272be22860SWarner LoshMemory mapped I/O address.
3282be22860SWarner LoshSpecifies the physical address of a memory-mapped UART.
3292be22860SWarner LoshMutually exclusive with
3302be22860SWarner Losh.Sq io .
3312be22860SWarner Losh.It Cm \&pa
3322be22860SWarner LoshParity.
3332be22860SWarner LoshThe type of parity to use when sending data
3342be22860SWarner Loshto the host.
3352be22860SWarner LoshThis may be one of ``even'',
3362be22860SWarner Losh``odd'', ``none'', ``zero'' (always set bit 8 to zero),
3372be22860SWarner Losh``one'' (always set bit 8 to 1).
3382be22860SWarner LoshThe default is even parity.
3392be22860SWarner Losh.It Cm \&rs
3402be22860SWarner LoshRegister shift.
3412be22860SWarner LoshNumber of bits to shift left the base register offset.
3422be22860SWarner Losh.It Cm \&rw
3432be22860SWarner LoshRegister width.
3442be22860SWarner LoshSize of operations to read and write the registers of the device.
3452be22860SWarner Losh.It Cm \&sb
3462be22860SWarner LoshStopbits.
3472be22860SWarner LoshDefaults to 1.
3482be22860SWarner Losh.It Cm \&xo
3492be22860SWarner LoshDevice clock (xtal oscillator).
3502be22860SWarner LoshBase frequency of the oscillator to use for the device.
3512be22860SWarner LoshWhen set to 0, and the baud rate is also set, the UART's initialization
3522be22860SWarner Loshcode will compute this the first time and use that after.
3532be22860SWarner LoshAutomatically computed values can be as large as 5% when the base
3542be22860SWarner Loshfrequency is a poor match to the traditional baud rates.
3552be22860SWarner Losh.El
3562be22860SWarner Losh.El
35706f40e96SJohn-Mark Gurney.Sh FILES
3584f4acb65SEdward Tomasz Napierala.Bl -tag -width "/dev/ttyu?.init" -compact
35906f40e96SJohn-Mark Gurney.It Pa /dev/ttyu?
36006f40e96SJohn-Mark Gurneyfor callin ports
36106f40e96SJohn-Mark Gurney.It Pa /dev/ttyu?.init
36206f40e96SJohn-Mark Gurney.It Pa /dev/ttyu?.lock
36306f40e96SJohn-Mark Gurneycorresponding callin initial-state and lock-state devices
36406f40e96SJohn-Mark Gurney.Pp
3655cbccc1eSEdward Tomasz Napierala.It Pa /dev/cuau?
36606f40e96SJohn-Mark Gurneyfor callout ports
36706f40e96SJohn-Mark Gurney.It Pa /dev/cuau?.init
36806f40e96SJohn-Mark Gurney.It Pa /dev/cuau?.lock
36906f40e96SJohn-Mark Gurneycorresponding callout initial-state and lock-state devices
37006f40e96SJohn-Mark Gurney.El
3712be22860SWarner Losh.Sh EXAMPLES
3722be22860SWarner Losh.Dl hw.uart.console="io:0x2f8,br=115200"
3732be22860SWarner Losh.Pp
3742be22860SWarner LoshWhen the kernel is using a serial console port, it should use
3752be22860SWarner LoshCOM2 instead of COM1 and set the baud rate to 115200.
37627d5dc18SMarcel Moolenaar.Sh SEE ALSO
377463b8ebdSAllan Jude.Xr cu 1 ,
378af2e25a6SMarcel Moolenaar.Xr puc 4 ,
379463b8ebdSAllan Jude.Xr scc 4 ,
380463b8ebdSAllan Jude.Xr ttys 5
38127d5dc18SMarcel Moolenaar.\"
38227d5dc18SMarcel Moolenaar.Sh HISTORY
38327d5dc18SMarcel MoolenaarThe
38427d5dc18SMarcel Moolenaar.Nm
38527d5dc18SMarcel Moolenaardevice driver first appeared in
38627d5dc18SMarcel Moolenaar.Fx 5.2 .
387fdae0df4SHiten Pandya.Sh AUTHORS
388af2e25a6SMarcel MoolenaarThe
389af2e25a6SMarcel Moolenaar.Nm
390af2e25a6SMarcel Moolenaardevice driver and this manual page were written by
3916c899950SBaptiste Daroussin.An Marcel Moolenaar Aq Mt marcel@xcllnt.net .
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