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/freebsd/sys/contrib/device-tree/Bindings/input/
H A Diqs626a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
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H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jef
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/freebsd/sys/dev/sdhci/
H A Dsdhci.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
81 #define RD1(slot, off) SDHCI_READ_1((slot)->bus, (slot), (off))
82 #define RD2(slot, off) SDHCI_READ_2((slot)->bus, (slot), (off))
83 #define RD4(slot, off) SDHCI_READ_4((slot)->bus, (slot), (off))
85 SDHCI_READ_MULTI_4((slot)->bus, (slot), (off), (ptr), (count))
87 #define WR1(slot, off, val) SDHCI_WRITE_1((slot)->bus, (slot), (off), (val))
88 #define WR2(slot, off, val) SDHCI_WRITE_2((slot)->bus, (slot), (off), (val))
89 #define WR4(slot, off, val) SDHCI_WRITE_4((slot)->bus, (slot), (off), (val))
91 SDHCI_WRITE_MULTI_4((slot)->bus, (slot), (off), (ptr), (count))
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/freebsd/sys/contrib/dev/athk/ath10k/
H A Dtargaddrs.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2016 Qualcomm Atheros, Inc.
36 * Pointer to application-defined area, if any.
50 * General-purpose flag bits, similar to SOC_OPTION_* flags.
103 u32 hi_num_bpatch_streams; /* 0x70 -- unused */
124 * 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high
125 * [31:16]: wakeup timeout in ms
143 /* 0xbc - [31:0]: idle timeout in ms */
150 /* If non-zero, override values sent to Host in WMI_READY event. */
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8916-longcheer-l8150.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-pm8916.dtsi"
6 #include "msm8916-modem-qdsp6.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/leds/common.h>
16 chassis-type = "handset";
25 stdout-path = "serial0";
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H A Dsdm845-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
17 #include "sdm845-wcd9340.dtsi"
21 /delete-node/ &rmtfs_mem;
30 stdout-path = "serial0:115200n8";
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/freebsd/sys/dev/e1000/
H A De1000_ich8lan.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
66 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
121 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
132 #define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */
133 #define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */
170 /* Half-duplex collision counts */
200 #define I218_ULP_CONFIG1_IND 0x0004 /* Pwr up from ULP indication */
220 /* Strapping Option Register - RO */
231 #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */
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H A De1000_defines.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
172 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
173 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
261 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
263 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
340 #define E1000_STATUS_PCIX_MODE 0x00002000 /* PCI-X mode */
341 #define E1000_STATUS_PCIX_SPEED 0x0000C000 /* PCI-X bus speed */
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dlogicpd-torpedo-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 compatible = "gpio-keys";
6 pinctrl-names = "default";
7 pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>;
13 wakeup-source;
20 wakeup-source;
27 wakeup-source;
34 wakeup-source;
39 compatible = "ti,omap-twl4030";
45 compatible = "gpio-leds";
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
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H A Dste-ux500-samsung-kyle.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Amp SGH-I407 also known as Kyle.
10 /dts-v1/;
11 #include "ste-db8500.dtsi"
12 #include "ste-ab8505.dtsi"
13 #include "ste-dbx5x0-pinctr
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H A Dste-ux500-samsung-janice.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy S Advance GT-I9070 also known as Janice.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctr
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H A Dste-ux500-samsung-gavini.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Beam GT-I8530 also known as Gavini.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctr
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H A Dste-ux500-samsung-codina.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Ace 2 GT-I8160 also known as Codina.
11 * The Samsung tree further talks about GT-I8160P and GT-I8160chn (China).
12 * The GT-I8160 plain is known as the "europe" variant.
13 * The GT-I8160P is the CDMA version and it appears to not use the ST
15 * The GT-I8160ch
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/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_reset.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2006 Atheros Communications, Inc.
50 { 1, 0x46, 96 }, /* 2312 -19 */
51 { 1, 0x46, 97 }, /* 2317 -18 */
52 { 1, 0x46, 98 }, /* 2322 -17 */
53 { 1, 0x46, 99 }, /* 2327 -16 */
54 { 1, 0x46, 100 }, /* 2332 -15 */
55 { 1, 0x46, 101 }, /* 2337 -14 */
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/freebsd/sys/dev/wpi/
H A Dif_wpi.c1 /*-
317 for (ident = wpi_ident_table; ident->name != NULL; ident++) { in wpi_probe()
318 if (pci_get_vendor(dev) == ident->vendor && in wpi_probe()
319 pci_get_device(dev) == ident->device) { in wpi_probe()
320 device_set_desc(dev, ident->name); in wpi_probe()
339 sc->sc_dev = dev; in wpi_attach()
342 error = resource_int_value(device_get_name(sc->sc_dev), in wpi_attach()
343 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug)); in wpi_attach()
345 sc->sc_debug = 0; in wpi_attach()
347 sc->sc_debug = 0; in wpi_attach()
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_mci.c73 if (!(ah->ah_config.ath_hal_mci_config & in ar9300_mci_osla_setup()
80 thresh = MS(ah->ah_config.ath_hal_mci_config, in ar9300_mci_osla_setup()
147 time_out -= 10; in ar9300_mci_wait_for_interrupt()
155 "(MCI) %s: Wait for Reg0x%08x = 0x%08x timeout.\n", in ar9300_mci_wait_for_interrupt()
219 if ((ahp->ah_mci_coex_bt_version_known == AH_FALSE) && in ar9300_mci_send_coex_version_query()
220 (ahp->ah_mci_bt_state != MCI_BT_SLEEP)) { in ar9300_mci_send_coex_version_query()
238 ahp->ah_mci_coex_major_version_wlan; in ar9300_mci_send_coex_version_response()
240 ahp->ah_mci_coex_minor_version_wlan; in ar9300_mci_send_coex_version_response()
248 u_int32_t *payload = &ahp->ah_mci_coex_wlan_channels[0]; in ar9300_mci_send_coex_wlan_channels()
250 if ((ahp->ah_mci_coex_wlan_channels_update == AH_TRUE) && in ar9300_mci_send_coex_wlan_channels()
[all …]
/freebsd/sys/dev/iwn/
H A Dif_iwn.c1 /*-
2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
84 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
85 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
86 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
87 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
88 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
89 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
90 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
[all …]
/freebsd/sys/dev/nfe/
H A Dif_nfe.c3 /*-
4 * Copyright (c) 2006 Shigeaki Tagashira <shigeaki@se.hiroshima-u.ac.jp>
136 device_printf((sc)->nfe_dev, __VA_ARGS__); \
140 device_printf((sc)->nfe_dev, __VA_ARGS__); \
147 #define NFE_LOCK(_sc) mtx_lock(&(_sc)->nfe_mtx)
148 #define NFE_UNLOCK(_sc) mtx_unlock(&(_sc)->nfe_mtx)
149 #define NFE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->nfe_mtx, MA_OWNED)
277 while (t->name != NULL) { in nfe_probe()
278 if ((pci_get_vendor(dev) == t->vid_id) && in nfe_probe()
279 (pci_get_device(dev) == t->dev_id)) { in nfe_probe()
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/freebsd/sys/dev/iwx/
H A Dif_iwxreg.h1 /*-
2 * SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
7 /*-
8 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
19 * Copyright(c) 2018 - 2019 Intel Corporation
33 * Copyright(c) 2018 - 2019 Intel Corporation
71 * enum iwx_context_info_flags - Context information control flags
77 * exponent, the actual size is 2**value, valid sizes are 8-2048.
80 * default is short format - not supported by the driver)
114 * struct iwx_context_info_version - version structure
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/freebsd/sys/contrib/dev/rtw89/
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
54 #define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI)
111 RTW89_CH_6G_BAND_IDX6, /* Ultra-high */
112 RTW89_CH_6G_BAND_IDX7, /* Ultra-high */
271 * RTW89_ADDR_CAM_SEC_ALL_UNI : 0 - 6 unicast
272 * RTW89_ADDR_CAM_SEC_NORMAL : 0 - 1 unicast, 2 - 4 group, 5 - 6 BIP
273 * RTW89_ADDR_CAM_SEC_4GROUP : 0 - 1 unicast, 2 - 5 group, 6 BIP
771 #define RTW89_MIN_VALID_POWER_CONSTRAINT (-10) /* unit: dBm */
977 /* The follow-up are derived from the above. We must ensure that it
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H A Dcoex.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
268 #define RTW89_DEFAULT_BTC_VER_IDX (ARRAY_SIZE(rtw89_btc_ver_defs) - 1)
524 /* TDMA off + pri: WL_Hi-Tx > BT_Hi_Rx, BT_Hi > WL > BT_Lo */
527 /* TDMA off + pri: WL_Hi-Tx > BT, BT_Hi > other-WL > BT_Lo */
530 /* TDMA off + pri: WL_Hi-Tx = BT */
533 /* TDMA off + pri: WL > BT, Block-BT*/
536 /* TDMA off+Bcn-Protect + pri: WL_Hi-Tx > BT_Hi_Rx, BT_Hi > WL > BT_Lo*/
539 /* TDMA off + Ext-Ctrl + pri: default */
542 /* TDMA off + Ext-Ctrl + pri: E2G-slot block all BT */
[all …]
/freebsd/sys/net80211/
H A Dieee80211_output.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
98 return (vap->iv_opmode == IEEE80211_M_IBSS); in doprint()
111 * A-MPDU state stuff, fast-frames state stuff, encapsulation
124 struct ieee80211com *ic = vap->iv_ic; in ieee80211_vap_pkt_send_dest()
125 struct ifnet *ifp = vap->iv_ifp; in ieee80211_vap_pkt_send_dest()
135 if ((ni->ni_flags & IEEE80211_NODE_PWR_MGT) && in ieee80211_vap_pkt_send_dest()
136 (m->m_flags & M_PWR_SAV) == 0) { in ieee80211_vap_pkt_send_dest()
156 ni->ni_macaddr, NULL, in ieee80211_vap_pkt_send_dest()
[all …]
/freebsd/sys/dev/iwm/
H A Dif_iwmreg.h10 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
35 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
73 * BEGIN iwl-csr.h
81 * low power states due to driver-invoked device resets
82 * (e.g. IWM_CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
95 #define IWM_CSR_INT_COALESCING (0x004) /* accum ints, 32-usec units */
109 * 31-16: Reserved
110 * 15-
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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