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/linux/Documentation/devicetree/bindings/spi/
H A Dst,ssc-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,ssc-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics SSC SPI Controller
10 The STMicroelectronics SSC SPI controller can be found on STi platforms
15 - Patrice Chotard <patrice.chotard@foss.st.com>
18 - $ref: spi-controller.yaml#
22 const: st,comms-ssc4-spi
30 clock-names:
[all …]
H A Dspi-lantiq-ssc.txt1 Lantiq Synchronous Serial Controller (SSC) SPI master driver
4 - compatible: "lantiq,ase-spi", "lantiq,falcon-spi", "lantiq,xrx100-spi",
5 "intel,lgm-spi"
6 - #address-cells: see spi-bus.txt
7 - #size-cells: see spi-bus.txt
8 - reg: address and length of the spi master registers
9 - interrupts:
10 For compatible "intel,lgm-ssc" - the common interrupt number for
18 - clocks: spi clock phandle
19 - num-cs: see spi-bus.txt, set to 8 if unset
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/linux/Documentation/devicetree/bindings/bus/
H A Dqcom,ssc-block-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs
10 - Michael Srba <Michael.Srba@seznam.cz>
20 The SSC (Snapdragon Sensor Core) block contains a gpio controller, i2c/spi/uart
21 controllers, a hexagon core, and a clock controller which provides clocks for
27 - const: qcom,msm8998-ssc-block-bus
28 - const: qcom,ssc-block-bus
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/linux/Documentation/devicetree/bindings/misc/
H A Datmel-ssc.txt1 * Atmel SSC driver.
4 - compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
5 - atmel,at91rm9200-ssc: support pdc transfer
6 - atmel,at91sam9g45-ssc: support dma transfer
7 - reg: Should contain SSC registers location and length
8 - interrupts: Should contain SSC interrupt
9 - clock-names: tuple listing input clock names.
11 - clocks: phandles to input clocks.
14 Required properties for devices compatible with "atmel,at91sam9g45-ssc":
15 - dmas: DMA specifier, consisting of a phandle to DMA controller node,
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/linux/Documentation/devicetree/bindings/sound/
H A Datmel,sam9x5-wm8731-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/atmel,sam9x5-wm8731-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dharma Balasubiramani <dharma.b@microchip.com>
17 const: atmel,sam9x5-wm8731-audio
21 description: The user-visible name of this sound complex.
23 atmel,ssc-controller:
25 description: The phandle of the SSC controller.
27 atmel,audio-codec:
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H A Datmel,asoc-wm8904.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/atmel,asoc-wm8904.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dharma Balasubiramani <dharma.b@microchip.com>
17 const: atmel,asoc-wm8904
21 description: The user-visible name of this sound complex.
23 atmel,ssc-controller:
25 description: The phandle of the SSC controller.
27 atmel,audio-codec:
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H A Datmel-at91sam9g20ek-wm8731-audio.txt4 - compatible: "atmel,at91sam9g20ek-wm8731-audio"
5 - atmel,model: The user-visible name of this sound complex.
6 - atmel,audio-routing: A list of the connections between audio components.
7 - atmel,ssc-controller: The phandle of the SSC controller
8 - atmel,audio-codec: The phandle of the WM8731 audio codec
10 - pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt
14 compatible = "atmel,at91sam9g20ek-wm8731-audio";
15 pinctrl-names = "default";
16 pinctrl-0 = <&pinctrl_pck0_as_mck>;
20 atmel,audio-routing =
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/linux/arch/arm/boot/dts/st/
H A Dstih407-family.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih407-pinctrl.dtsi"
7 #include <dt-bindings/mfd/st-lpc.h>
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/reset/stih407-resets.h>
10 #include <dt-bindings/interrupt-controller/irq-st.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 reserved-memory {
16 #address-cells = <1>;
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/linux/sound/soc/atmel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
7 the ATMEL SSC interface. You will also need
25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"
30 Say Y or M if you want to add support for Atmel SSC interface
31 in PDC mode configured using audio-graph-card in device-tree.
34 tristate "SoC PCM DAI support for AT91 SSC controller using DMA"
39 Say Y or M if you want to add support for Atmel SSC interface
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
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H A Dsam9x5_wm8731.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sam9x5_wm8731 -- SoC audio for AT91SAM9X5-based boards
23 #include <sound/soc-dai.h>
24 #include <sound/soc-dapm.h>
32 #define DRV_NAME "sam9x5-snd-wm8731"
44 struct device *dev = rtd->dev; in sam9x5_wm8731_init()
63 * |A| ------------> | | ---R----> Headphone Jack
64 * |T| <----\ | WM | ---L--/
65 * |9| ---> CLK <--> | 8731 | <--R----- Line In Jack
66 * |1| <------------ | | <--L--/
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H A Datmel_wm8904.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * atmel_wm8904 - Atmel ASoC driver for boards with WM8904 codec.
35 pr_err("%s - failed to set wm8904 codec PLL.", __func__); in atmel_asoc_wm8904_hw_params()
47 pr_err("%s -failed to set wm8904 SYSCLK\n", __func__); in atmel_asoc_wm8904_hw_params()
60 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "wm8904-hifi")),
85 struct device_node *np = pdev->dev.of_node; in atmel_asoc_wm8904_dt_init()
92 dev_err(&pdev->dev, "only device tree supported\n"); in atmel_asoc_wm8904_dt_init()
93 return -EINVAL; in atmel_asoc_wm8904_dt_init()
98 dev_err(&pdev->dev, "failed to parse card name\n"); in atmel_asoc_wm8904_dt_init()
102 ret = snd_soc_of_parse_audio_routing(card, "atmel,audio-routing"); in atmel_asoc_wm8904_dt_init()
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H A Dsam9g20_wm8731.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sam9g20_wm8731 -- SoC audio for AT91SAM9G20-based
28 #include <linux/atmel-ssc.h>
36 #include "atmel-pcm.h"
70 struct device *dev = rtd->dev; in at91sam9g20ek_wm8731_init()
83 snd_soc_dapm_nc_pin(&rtd->card->dapm, "Int Mic"); in at91sam9g20ek_wm8731_init()
91 DAILINK_COMP_ARRAY(COMP_CODEC("wm8731.0-001b", "wm8731-hifi")),
107 .name = "AT91SAMG20-EK",
121 struct device_node *np = pdev->dev.of_node; in at91sam9g20ek_audio_probe()
127 return -ENODEV; in at91sam9g20ek_audio_probe()
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/linux/drivers/scsi/isci/
H A Dprobe_roms.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
229 * NOTE: Default SSC Modulation Frequency is 31.5KHz.
234 * NOTE: Max spread for SATA is +0 / -5000 PPM.
235 * Down-spreading SSC (only method allowed for SATA):
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/linux/Documentation/devicetree/bindings/i2c/
H A Dst,sti-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,sti-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STi platform
10 - Patrice Chotard <patrice.chotard@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - st,comms-ssc-i2c
19 - st,comms-ssc4-i2c
30 clock-names:
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/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9261.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
H A Dat91rm9200.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 interrupt-parent = <&aic>;
[all …]
H A Dat91sam9g20.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
23 compatible = "mmio-sram";
25 #address-cells = <1>;
26 #size-cells = <1>;
33 compatible = "atmel,at91sam9g20-i2c";
36 ssc0: ssc@fffbc000 {
37 compatible = "atmel,at91sam9rl-ssc";
41 atmel,adc-startup-time = <40>;
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H A Dat91sam9n12ek.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board
8 /dts-v1/;
12 model = "Atmel AT91SAM9N12-EK";
17 stdout-path = "serial0:115200n8";
26 clock-frequency = <32768>;
30 clock-frequency = <16000000>;
40 ssc0: ssc@f0010000 {
46 compatible = "atmel,tcb-timer";
51 compatible = "atmel,tcb-timer";
[all …]
H A Dat91sam9rl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
[all …]
H A Dat91sam9263.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
H A Dat91-sama5d4ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d4ek.dts - Device Tree file for SAMA5D4 Evaluation Kit
8 /dts-v1/;
12 model = "Atmel SAMA5D4-EK";
16 stdout-path = "serial0:115200n8";
25 clock-frequency = <32768>;
29 clock-frequency = <12000000>;
36 pinctrl-names = "default";
37 pinctrl-0 = <
45 /* The vref depends on JP22 of EK. If connect 1-2 then use 3.3V. connect 2-3 use 3.0V */
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/linux/drivers/bus/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
53 errors counter. The counter and the APB-bus operations timeout can be
57 bool "Baikal-T1 AXI-bus driver"
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
94 Driver for i.MX WEIM controller.
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/linux/Documentation/devicetree/bindings/clock/
H A Dti,cdce925.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Stein <alexander.stein@ew.tq-group.com>
13 Flexible Low Power LVCMOS Clock Generator with SSC Support for EMI Reduction
15 - CDCE(L)913: 1-PLL, 3 Outputs https://www.ti.com/product/cdce913
16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925
17 - CDCE(L)937: 3-PLL, 7 Outputs https://www.ti.com/product/cdce937
18 - CDCE(L)949: 4-PLL, 9 Outputs https://www.ti.com/product/cdce949
23 - ti,cdce913
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/linux/Documentation/devicetree/bindings/pci/
H A Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Brcmstb PCIe Host Controller
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
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/linux/Documentation/devicetree/bindings/phy/
H A Dphy-cadence-torrent.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 hardware included with the Cadence MHDP DisplayPort controller. Torrent
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j7200-serdes-10g
24 - ti,j721e-serdes-10g
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