| /freebsd/sys/dev/uart/ | 
| H A D | uart_dev_mvebu.c | 1 /*-55 #define	CTRL_RX_FIFO_RST	(1 << 14)	/* RX FIFO Reset */
 61 #define	CTRL_TX_HALF_INT	(1 << 8)	/* TX Half-Full Interrupt Enable */
 62 #define	CTRL_RX_HALF_INT	(1 << 7)	/* RX Half-Full Interrupt Enable */
 65 #define	CTRL_RX_RDY_INT		(1 << 4)	/* RX Ready Interrupt Enable */
 77 #define	STAT_RX_FIFO_EMPT	(1 << 12)	/* RX FIFO Empty */
 80 #define	STAT_RX_TOGL		(1 << 9)	/* RX Toogled */
 81 #define	STAT_RX_FIFO_FULL	(1 << 8)	/* RX FIFO Full */
 82 #define	STAT_RX_FIFO_HALF	(1 << 7)	/* RX FIFO Half Full */
 85 #define	STAT_RX_RDY		(1 << 4)	/* RX Ready */
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| H A D | uart_dev_pl011.c | 1 /*-2  * SPDX-License-Identifier: BSD-2-Clause
 100 #define	IFLS_RX_SHIFT	3		/* RX level in bits [5:3] */
 102 #define	IFLS_MASK	0x07		/* RX/TX level is 3 bits */
 113 #define	UART_RXREADY	(1 << 4)	/* RX buffer full */
 132  * RX we set the size to the full hardware capacity so that the uart core
 145  * FIXME: actual register size is SoC-dependent, we need to handle it
 148 	bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
 150 	bus_space_write_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value)
 153  * Low-level UART interface.
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| /freebsd/contrib/wpa/src/common/ | 
| H A D | wpa_ctrl.h | 3  * Copyright (c) 2004-2017, Jouni Malinen <j@w1.fi>16 /* wpa_supplicant control interface - fixed message prefixes */
 19 #define WPA_CTRL_REQ "CTRL-REQ-"
 22 #define WPA_CTRL_RSP "CTRL-RSP-"
 26 #define WPA_EVENT_CONNECTED "CTRL-EVENT-CONNECTED "
 28 #define WPA_EVENT_DISCONNECTED "CTRL-EVENT-DISCONNECTED "
 30 #define WPA_EVENT_ASSOC_REJECT "CTRL-EVENT-ASSOC-REJECT "
 32 #define WPA_EVENT_AUTH_REJECT "CTRL-EVENT-AUTH-REJECT "
 34 #define WPA_EVENT_TERMINATING "CTRL-EVENT-TERMINATING "
 36 #define WPA_EVENT_PASSWORD_CHANGED "CTRL-EVENT-PASSWORD-CHANGED "
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| /freebsd/sys/contrib/device-tree/Bindings/serial/ | 
| H A D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 8   - Erwan Le Ray <erwan.leray@foss.st.com>
 15       - st,stm32-uart
 16       - st,stm32f7-uart
 17       - st,stm32h7-uart
 34   st,hw-flow-ctrl:
 38   rx-tx-swap: true
 [all …]
 
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| /freebsd/sys/dev/mlx5/mlx5_en/ | 
| H A D | mlx5_en_hw_tls_rx.c | 1 /*-2  * Copyright (c) 2021-2022 NVIDIA corporation & affiliates.
 69 MALLOC_DEFINE(M_MLX5E_TLS_RX, "MLX5E_TLS_RX", "MLX5 ethernet HW TLS RX");
 71 /* software TLS RX context */
 81 CTASSERT(MLX5_ST_SZ_BYTES(sw_tls_rx_cntx) <= sizeof(((struct mlx5e_tls_rx_tag *)NULL)->crypto_param…
 82 CTASSERT(MLX5_ST_SZ_BYTES(mkc) == sizeof(((struct mlx5e_tx_umr_wqe *)NULL)->mkc));
 103 	ch = priv->params.num_channels;  in mlx5e_tls_rx_get_ch()
 121  * RX traffic.
 132 	return (&priv->channel[mlx5e_tls_rx_get_ch(priv, flowid, flowtype)].iq);  in mlx5e_tls_rx_get_iq()
 142 	m_snd_tag_rele(&ptag->tag);  in mlx5e_tls_rx_send_static_parameters_cb()
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| /freebsd/sys/contrib/device-tree/Bindings/media/ | 
| H A D | nxp,imx8-isi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 16   number and nature is SoC-dependent. They cover both capture interfaces (MIPI
 17   CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
 22       - fsl,imx8mn-isi
 23       - fsl,imx8mp-isi
 24       - fsl,imx93-isi
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| /freebsd/contrib/wpa/wpa_supplicant/ | 
| H A D | README-HS20 | 4 This document describe how the IEEE 802.11u Interworking and Wi-Fi7 GUI or Wi-Fi framework) is used to manage this functionality.
 10 Introduction to Wi-Fi Hotspot 2.0
 11 ---------------------------------
 13 Hotspot 2.0 is the name of the Wi-Fi Alliance specification that is used
 14 in the Wi-Fi CERTIFIED Passpoint<TM> program. More information about
 17 http://www.wi-fi.org/knowledge-center/white-papers/wi-fi-certified-passpoint%E2%84%A2-new-program-w…
 20 https://www.wi-fi.org/knowledge-center/published-specifications
 23 standardized in IEEE Std 802.11u-2011 which is now part of the IEEE Std
 24 802.11-2012.
 [all …]
 
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| /freebsd/sys/dev/e1000/ | 
| H A D | e1000_mac.c | 2   SPDX-License-Identifier: BSD-3-Clause4   Copyright (c) 2001-2020, Intel Corporation
 42  *  e1000_init_mac_ops_generic - Initialize MAC function pointers
 45  *  Setups up the function pointers to no-op functions
 49 	struct e1000_mac_info *mac = &hw->mac;  in e1000_init_mac_ops_generic()
 53 	mac->ops.init_params = e1000_null_ops_generic;  in e1000_init_mac_ops_generic()
 54 	mac->ops.init_hw = e1000_null_ops_generic;  in e1000_init_mac_ops_generic()
 55 	mac->ops.reset_hw = e1000_null_ops_generic;  in e1000_init_mac_ops_generic()
 56 	mac->ops.setup_physical_interface = e1000_null_ops_generic;  in e1000_init_mac_ops_generic()
 57 	mac->ops.get_bus_info = e1000_null_ops_generic;  in e1000_init_mac_ops_generic()
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| H A D | e1000_regs.h | 2   SPDX-License-Identifier: BSD-3-Clause4   Copyright (c) 2001-2020, Intel Corporation
 38 #define E1000_CTRL	0x00000  /* Device Control - RW */
 39 #define E1000_CTRL_DUP	0x00004  /* Device Control Duplicate (Shadow) - RW */
 40 #define E1000_STATUS	0x00008  /* Device Status - RO */
 41 #define E1000_EECD	0x00010  /* EEPROM/Flash Control - RW */
 42 #define E1000_EERD	0x00014  /* EEPROM Read - RW */
 43 #define E1000_CTRL_EXT	0x00018  /* Extended Device Control - RW */
 44 #define E1000_FLA	0x0001C  /* Flash Access - RW */
 45 #define E1000_MDIC	0x00020  /* MDI Control - RW */
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ | 
| H A D | st,stm32-spdifrx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Olivier Moysan <olivier.moysan@foss.st.com>
 14   IEC-60958 and IEC-61937.
 17   - $ref: dai-common.yaml#
 22       - st,stm32h7-spdifrx
 24   "#sound-dai-cells":
 33   clock-names:
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ | 
| H A D | intel,ldma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - chuanhua.lei@intel.com
 11   - mallikarjunax.reddy@intel.com
 14   - $ref: dma-controller.yaml#
 19       - intel,lgm-cdma
 20       - intel,lgm-dma2tx
 21       - intel,lgm-dma1rx
 22       - intel,lgm-dma1tx
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| /freebsd/sys/contrib/device-tree/Bindings/net/ | 
| H A D | nixge.txt | 4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for5               older device trees with DMA engines co-located in the address map,
 7 - reg: Address and length of the register set for the device. It contains the
 8        information of registers in the same order as described by reg-names.
 9 - reg-names: Should contain the reg names
 11         "ctrl": MDIO and PHY control and status region
 12 - interrupts: Should contain tx and rx interrupt
 13 - interrupt-names: Should be "rx" and "tx"
 14 - phy-mode: See ethernet.txt file in the same directory.
 15 - nvmem-cells: Phandle of nvmem cell containing the MAC address
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| /freebsd/sys/dev/igc/ | 
| H A D | igc_phy.c | 1 /*-4  * SPDX-License-Identifier: BSD-3-Clause
 13  *  igc_init_phy_ops_generic - Initialize PHY function pointers
 16  *  Setups up the function pointers to no-op functions
 20 	struct igc_phy_info *phy = &hw->phy;  in igc_init_phy_ops_generic()
 24 	phy->ops.init_params = igc_null_ops_generic;  in igc_init_phy_ops_generic()
 25 	phy->ops.acquire = igc_null_ops_generic;  in igc_init_phy_ops_generic()
 26 	phy->ops.check_reset_block = igc_null_ops_generic;  in igc_init_phy_ops_generic()
 27 	phy->ops.force_speed_duplex = igc_null_ops_generic;  in igc_init_phy_ops_generic()
 28 	phy->ops.get_info = igc_null_ops_generic;  in igc_init_phy_ops_generic()
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| H A D | igc_mac.c | 1 /*-4  * SPDX-License-Identifier: BSD-3-Clause
 13  *  igc_init_mac_ops_generic - Initialize MAC function pointers
 16  *  Setups up the function pointers to no-op functions
 20 	struct igc_mac_info *mac = &hw->mac;  in igc_init_mac_ops_generic()
 24 	mac->ops.init_params = igc_null_ops_generic;  in igc_init_mac_ops_generic()
 25 	mac->ops.config_collision_dist = igc_config_collision_dist_generic;  in igc_init_mac_ops_generic()
 26 	mac->ops.rar_set = igc_rar_set_generic;  in igc_init_mac_ops_generic()
 30  *  igc_null_ops_generic - No-op function, returns 0
 40  *  igc_null_mac_generic - No-op function, return void
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ | 
| H A D | spi-pl022.yaml | 1 # SPDX-License-Identifier: GPL-2.03 ---
 4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Linus Walleij <linus.walleij@linaro.org>
 13   -
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| /freebsd/sys/contrib/device-tree/Bindings/mmc/ | 
| H A D | renesas,sdhi.txt | 4 - compatible: should contain one or more of the following:5 		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
 6 		"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
 7 		"renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
 8 		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
 9 		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
 10 		"renesas,sdhi-r8a7742" - SDHI IP on R8A7742 SoC
 11 		"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
 12 		"renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
 13 		"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
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| /freebsd/sys/dev/msk/ | 
| H A D | if_mskreg.h | 17  *	are provided to you under the BSD-type license terms provided22  *	- Redistributions of source code must retain the above copyright
 24  *	- Redistributions in binary form must reproduce the above
 28  *	- Neither the name of Marvell nor the names of its contributors
 48 /*-
 49  * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
 65  * 4. Neither the name of the author nor the names of any co-contributors
 82 /*-
 110  * D-Link PCI vendor ID
 154  * D-Link gigabit ethernet device ID
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ | 
| H A D | brcm-sata-phy.txt | 4 - compatible: should be one or more of5      "brcm,bcm7216-sata-phy"
 6      "brcm,bcm7425-sata-phy"
 7      "brcm,bcm7445-sata-phy"
 8      "brcm,iproc-ns2-sata-phy"
 9      "brcm,iproc-nsp-sata-phy"
 10      "brcm,phy-sata3"
 11      "brcm,iproc-sr-sata-phy"
 12      "brcm,bcm63138-sata-phy"
 13 - address-cells: should be 1
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ | 
| H A D | dm816x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only3 #include <dt-bindings/bus/ti-sysc.h>
 4 #include <dt-bindings/clock/dm816.h>
 5 #include <dt-bindings/gpio/gpio.h>
 6 #include <dt-bindings/pinctrl/omap.h>
 10 	interrupt-parent = <&intc>;
 11 	#address-cells = <1>;
 12 	#size-cells = <1>;
 26 		#address-cells = <1>;
 27 		#size-cells = <0>;
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| /freebsd/sys/dev/enic/ | 
| H A D | if_enic.c | 1 /* SPDX-License-Identifier: BSD-3-Clause2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
 248 	dev = softc->dev;  in enic_allocate_msix()
 249 	ctx = softc->ctx;  in enic_allocate_msix()
 250 	scctx = softc->scctx;  in enic_allocate_msix()
 260 	queues = imin(queues, scctx->isc_nrxqsets);  in enic_allocate_msix()
 261 	queues = imin(queues, scctx->isc_ntxqsets);  in enic_allocate_msix()
 262 	requested = queues * 2 + sctx->isc_admin_intrcnt;  in enic_allocate_msix()
 263 	scctx->isc_nrxqsets = queues;  in enic_allocate_msix()
 264 	scctx->isc_ntxqsets = queues;  in enic_allocate_msix()
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ | 
| H A D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---
 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#
 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
 11   - Neil Armstrong <neil.armstrong@linaro.org>
 15   in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
 20   One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
 26   host-only mode.
 33       - amlogic,meson-gxl-usb-ctrl
 34       - amlogic,meson-gxm-usb-ctrl
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| /freebsd/sys/contrib/device-tree/Bindings/dsp/ | 
| H A D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Daniel Baluta <daniel.baluta@nxp.com>
 11   - Shengjiu Wang <shengjiu.wang@nxp.com>
 15   advanced pre- and post- audio processing.
 20       - fsl,imx8qxp-dsp
 21       - fsl,imx8qm-dsp
 22       - fsl,imx8mp-dsp
 23       - fsl,imx8ulp-dsp
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| /freebsd/sys/dev/ixgbe/ | 
| H A D | ixgbe_82598.c | 2   SPDX-License-Identifier: BSD-3-Clause4   Copyright (c) 2001-2020, Intel Corporation
 71  * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
 76  * than the 10ms recommended by the pci-e spec.  To address this we need to
 113  * ixgbe_init_ops_82598 - Inits func ptrs and MAC type
 121 	struct ixgbe_mac_info *mac = &hw->mac;  in ixgbe_init_ops_82598()
 122 	struct ixgbe_phy_info *phy = &hw->phy;  in ixgbe_init_ops_82598()
 131 	phy->ops.init = ixgbe_init_phy_ops_82598;  in ixgbe_init_ops_82598()
 134 	mac->ops.start_hw = ixgbe_start_hw_82598;  in ixgbe_init_ops_82598()
 135 	mac->ops.enable_relaxed_ordering = ixgbe_enable_relaxed_ordering_82598;  in ixgbe_init_ops_82598()
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| /freebsd/sys/contrib/device-tree/src/arm/st/ | 
| H A D | spear1310-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later8 /dts-v1/;
 13 	compatible = "st,spear1310-evb", "st,spear1310";
 14 	#address-cells = <1>;
 15 	#size-cells = <1>;
 23 			pinctrl-name
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| /freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/ | 
| H A D | ns2-svk.dts | 33 /dts-v1/;39 	compatible = "brcm,ns2-svk", "brcm,ns2";
 49 		stdout-path = "serial0:115200n8";
 113 		spi-max-frequency = <5000000>;
 114 		spi-cpha;
 115 		spi-cpol;
 117 		pl022,slave-tx-disable = <0>;
 118 		pl022,com-mode = <0>;
 119 		pl022,rx-level-trig = <1>;
 120 		pl022,tx-level-trig = <1>;
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