Kill ignore regshft flag

This flag was introduced to ignore bad firmware values. These were
present in older versions of EDK-II that many devices (both Ampere and
Amazon) used. QEMU also used this v

Kill ignore regshft flag

This flag was introduced to ignore bad firmware values. These were
present in older versions of EDK-II that many devices (both Ampere and
Amazon) used. QEMU also used this value, but fixed it. But since it's
tied to the firmware bug not the device name ID it doesn't make sense to
have it flagged there.

Sponsored by: Netflix
Reviewed by: emaste
Differential Revision: https://reviews.freebsd.org/D47947

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uart: Ingore pl011 historic mistakes

Some veresions of EDK-II and QEMU reported the wrong values for the
register shift and the region I/O size. Detect those and set it to the
correct values. In gen

uart: Ingore pl011 historic mistakes

Some veresions of EDK-II and QEMU reported the wrong values for the
register shift and the region I/O size. Detect those and set it to the
correct values. In general, anything other than a shift of 2 and a
regio width of 4 (bytes, or 32 bits) is a mistake. However, allow
for overrides in the future by only overriding the buggy values.
Otherwise, we will fail to boot.

PR: 282936
Sponsored by: Netflix
Reviewed by: emaste
Differential Revision: https://reviews.freebsd.org/D47946

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uart/pl011: Add support for computing rclk

When instructed to do so, compute the rclk (baud rate generator clock)
based on the currently programmed divisor and the communicated baud
rate. We only d

uart/pl011: Add support for computing rclk

When instructed to do so, compute the rclk (baud rate generator clock)
based on the currently programmed divisor and the communicated baud
rate. We only do this once and only for consoles that tell us the
configured rate and flag we can likely safely compute rclk.

Sponsored by: Netflix
Reviewed by: andrew
Differential Revision: https://reviews.freebsd.org/D47077

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dev/uart: name uart_class_set DATA_SET macro UART_CLASS()

Use the macro "UART_CLASS()" for the newly created data set
'uart_class_set' as we do for other data sets.
This further hides the data set n

dev/uart: name uart_class_set DATA_SET macro UART_CLASS()

Use the macro "UART_CLASS()" for the newly created data set
'uart_class_set' as we do for other data sets.
This further hides the data set name.
Also add UART_CLASS for quicc, which was previously not done.

MFC after: 1 week
Improves: 949670f8f466 dev/uart: Use a linker set to find uart classes
Obtained from: jhb, https://github.com/freebsd/freebsd/commit/269e99ac86902127bfaee1500d8747a3c7be5912
Reviewed by: andrew
Differential Revision: https://reviews.freebsd.org/D43981

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dev/uart: Support the pl011 uart in hw.uart.console

Add the pl011 uart to the list of supported uarts for use by
hw.uart.console. This is commonly found in Arm based devices, and a
variant is standa

dev/uart: Support the pl011 uart in hw.uart.console

Add the pl011 uart to the list of supported uarts for use by
hw.uart.console. This is commonly found in Arm based devices, and a
variant is standardised in the Arm SBSA.

Reviewed by: imp
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D43363

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sys: Simplify enabling EARLY_PRINTF uarts

Support selecting the early uart with "options EARLY_PRINTF=foo" in
the kernel configuration file. This allows us to not have to change
source files when en

sys: Simplify enabling EARLY_PRINTF uarts

Support selecting the early uart with "options EARLY_PRINTF=foo" in
the kernel configuration file. This allows us to not have to change
source files when enabling EARLY_PRINTF, simplifying enabling it.

New uart drivers can be enabled by defining a new early_printf_foo
value to be unique, then using "#if CHECK_EARLY_PRINTF(foo)" to decide
when to enable the uart.

While here add pl011 early printf support.

Reviewed by: imp (earlier version)
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D43360

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sys: Automated cleanup of cdefs and other formatting

Apply the following automated changes to try to eliminate
no-longer-needed sys/cdefs.h includes as well as now-empty
blank lines in a row.

Remov

sys: Automated cleanup of cdefs and other formatting

Apply the following automated changes to try to eliminate
no-longer-needed sys/cdefs.h includes as well as now-empty
blank lines in a row.

Remove /^#if.*\n#endif.*\n#include\s+<sys/cdefs.h>.*\n/
Remove /\n+#include\s+<sys/cdefs.h>.*\n+#if.*\n#endif.*\n+/
Remove /\n+#if.*\n#endif.*\n+/
Remove /^#if.*\n#endif.*\n/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/types.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/param.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/capsicum.h>/

Sponsored by: Netflix

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sys: Remove $FreeBSD$: one-line .c pattern

Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

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Add support for the new Arm Generic UART _HID

Historically the ACPI _HID for both the Arm PL011 and Generic UARTs
was ARMH0011. In the Arm Base Boot Requirements 2.0 the Generic UART
_HID is changed

Add support for the new Arm Generic UART _HID

Historically the ACPI _HID for both the Arm PL011 and Generic UARTs
was ARMH0011. In the Arm Base Boot Requirements 2.0 the Generic UART
_HID is changed to ARMHB000. Use this new value in the PL011 driver
where we support both UART types.

This has been observed in some recent EDK2 builds.

Sponsored by: Arm Ltd

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uart: clean up empty lines in .c and .h files

MFHead @347527

Sponsored by: The FreeBSD Foundation

Add quirk for ignoring SPCR AccessWidth values on the PL011 UART

The SPCR table on the Lenovo HR330A Ampere eMAG server indicates 8-bit
access, but 32-bit access is required for the PL011 to work.

Add quirk for ignoring SPCR AccessWidth values on the PL011 UART

The SPCR table on the Lenovo HR330A Ampere eMAG server indicates 8-bit
access, but 32-bit access is required for the PL011 to work.

PL011 on SBSA platforms always supports 32-bit access (and that was
hardcoded here before my EC2 fix), let's use 32-bit access for PL011
and 32BIT interface types.

Tested by emaste on Ampere eMAG and Cavium/Marvell ThunderX2.

Submitted by: Greg V <greg@unrelenting.technology>
Reviewed by: andrew, imp (earlier)
Differential Revision: https://reviews.freebsd.org/D19507

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Merge ^/head r338026 through r338297, and resolve conflicts.

add snps IP uart support / genaralize UART

This is an amalgam of a patch by Doug Ambrisko to
generalize uart_acpi_find_device, imp moving the
ACPI table to uart_dev_ns8250.c and advice by jhb
to wor

add snps IP uart support / genaralize UART

This is an amalgam of a patch by Doug Ambrisko to
generalize uart_acpi_find_device, imp moving the
ACPI table to uart_dev_ns8250.c and advice by jhb
to work around a bug in the EPYC 3151 BIOS
(the BIOS incorrectly marks the serial ports as
disabled)

Reviewed by: imp
MFC after: 8 weeks
Differential Revision: https://reviews.freebsd.org/D16432

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The Arm pl011 driver assumes it's running a devicetree based system.
It calls OF_* functions to check if it needs to implement workarounds.
This may not be the case on arm64 where we support both FDT

The Arm pl011 driver assumes it's running a devicetree based system.
It calls OF_* functions to check if it needs to implement workarounds.
This may not be the case on arm64 where we support both FDT and ACPI.
Fix this by checking if we are booting on FDT before calling these checks.

Reviewed by: ian
Sponsored by: DARPA, AFRL
Sponsored by: Cavium (Hardware)
Differential Revision: https://reviews.freebsd.org/D14515

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Teach the Arm pl011 driver to attach to a SBSA uart. This is defined in
the Server Base System Architecture to be a subset of the pl011 r1p5. As
we don't use the removed features it is safe to just a

Teach the Arm pl011 driver to attach to a SBSA uart. This is defined in
the Server Base System Architecture to be a subset of the pl011 r1p5. As
we don't use the removed features it is safe to just attach to the existing
driver as is.

Sponsored by: DARPA, AFRL

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Rename the FDT compat_data array to a bus-specific name.

Sponsored by: DARPA, AFRL

Merge ^/head r327169 through r327340.

Do pass removing some write-only variables from the kernel.

This reduces noise when kernel is compiled by newer GCC versions,
such as one used by external toolchain ports.

Reviewed by: kib, andrew(

Do pass removing some write-only variables from the kernel.

This reduces noise when kernel is compiled by newer GCC versions,
such as one used by external toolchain ports.

Reviewed by: kib, andrew(sys/arm and sys/arm64), emaste(partial), erj(partial)
Reviewed by: jhb (sys/dev/pci/* sys/kern/vfs_aio.c and sys/kern/kern_synch.c)
Differential Revision: https://reviews.freebsd.org/D10385

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sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error

sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

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Extend the pl011 small-fifos fix to other SoCs that indicate rev 5
hardware but lack the larger fifos rev 5 hardware should have.

The linux world (where our FDT data comes from) solved this by addin

Extend the pl011 small-fifos fix to other SoCs that indicate rev 5
hardware but lack the larger fifos rev 5 hardware should have.

The linux world (where our FDT data comes from) solved this by adding
a new property to pl011 nodes, "arm,primecell-periphid". When this
property is present, its values override the values in the hardware
periphid registers. For pl011 rev 5 hardware with small fifos, they
override the id so that it appears to be rev 4 hardware.

The driver now uses the new property when present. It also continues
to check the device compat string, to handle older fdt data that may
still be in use on existing systems (on RPi systems it is common to
update system software without updating fdt data which is part of the
boot firmware).

Reviewed by: imp

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Handle fifo size differences between older and newer revs of pl011 hardware.

Starting with rev 5 (which is inexplicably indicated by a version number
of '3' in the Peripheral ID register), the pl011

Handle fifo size differences between older and newer revs of pl011 hardware.

Starting with rev 5 (which is inexplicably indicated by a version number
of '3' in the Peripheral ID register), the pl011 doubled the size of the
rx and tx fifos, to 32 bytes, so read the ID register and set the size
variables in the softc accordingly.

An interesting wrinkle in this otherwise-simple concept is that the
bcm2835 SoC, used in Raspberry Pi systems among others, has the rev 5
pl011 hardware, but somehow also has the older 16-byte fifos. We check
the FDT data to see if the hardware is part of a bcm283x system and use
the smaller size if so.

Thanks to jchandra@ for pointing out that newer hardware has bigger fifos.

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Reconfigure the fifo watermark levels on the pl011 uart to interrupt when
the fifos are 3/4 full (rc) or empty (tx).

Fix bugs exposed by the recent enabling of FIFOs in the pl011 uart. These
have been in the code all along, but were masked by having a fifo depth of
one byte at the hardware level, so everything kin

Fix bugs exposed by the recent enabling of FIFOs in the pl011 uart. These
have been in the code all along, but were masked by having a fifo depth of
one byte at the hardware level, so everything kinda worked by accident.

The hardware interrupts when the TX fifo is half empty, so set
sc->sc_txfifosz to 8 bytes (half the hardware fifo size) to match. This
eliminates dropped characters on output.

Restructure the read loop to consume all the bytes in the fifo by using
the "rx fifo empty" bit of the flags register rather than the "rx ready"
bit of the interrupt status register. The rx-ready interrupt is cleared
when the number of bytes in the fifo fall below the interrupt trigger
level, leaving the fifo half full every time receive routine was called.
Now it loops until the fifo is completely empty every time (including
when the function is called due to a receive timeout as well as for
fifo-full).

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