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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpmh-rsc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMH RSC
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 Resource Power Manager Hardened (RPMH) is the mechanism for communicating
20 (Resource State Coordinator a.k.a RSC) that can handle multiple sleep and
27 ACTIVE - Triggered by Linux
28 SLEEP - Triggered by F/W
[all …]
/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,rpmh-common.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <djakov@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
[all …]
H A Dqcom,qdu1000-rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000
10 - Georgi Djakov <djakov@kernel.org>
11 - Odelu Kukatla <quic_okukatla@quicinc.com>
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
[all …]
H A Dqcom,sdx75-rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sdx75-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SDX75
10 - Rohit Agarwal <quic_rohiagar@quicinc.com>
13 RPMh interconnect providers support system bandwidth requirements through
14 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
15 able to communicate with the BCM through the Resource State Coordinator (RSC)
17 least one RPMh device child node pertaining to their RSC and each provider
[all …]
H A Dqcom,x1e80100-rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,x1e80100-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on X1E80100
10 - Rajendra Nayak <quic_rjendra@quicinc.com>
11 - Abel Vesa <abel.vesa@linaro.org>
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
[all …]
H A Dqcom,bcm-voter.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,bcm-voter.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm BCM-Voter Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
15 Coordinators (RSC). Interconnect providers are able to vote for aggregated
22 - qcom,bcm-voter
24 qcom,tcs-wait:
31 WAKE/SLEEP TCSs are triggered when the RSC transitions between active and
[all …]
H A Dqcom,sm8550-rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550
10 - Abel Vesa <abel.vesa@linaro.org>
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
[all …]
H A Dqcom,sm8650-rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
10 - Abel Vesa <abel.vesa@linaro.org>
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
[all …]
H A Dqcom,rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
11 - Odelu Kukatla <quic_okukatla@quicinc.com>
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,rpmhcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. RPMh Clocks
10 - Taniya Das <quic_tdas@quicinc.com>
13 Resource Power Manager Hardened (RPMh) manages shared resources on
15 other hardware subsystems via RSC to control clocks.
20 - qcom,qdu1000-rpmh-clk
21 - qcom,sa8775p-rpmh-clk
22 - qcom,sc7180-rpmh-clk
[all …]
/linux/drivers/soc/qcom/
H A Drpmh-internal.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
27 * @type: Type of the TCS in this group - active, sleep, wake.
28 * @mask: Mask of the TCSes relative to all the TCSes in the RSC.
29 * @offset: Start of the TCS group relative to the TCSes in the RSC.
35 * Start: grab drv->lock, set req, set tcs_in_use, drop drv->lock,
38 * grab drv->lock, clear tcs_in_use, drop drv->lock
56 * struct rpmh_request: the message to be sent to rpmh-rsc
94 * Resource State Coordinator controller (RSC)
104 * Used when solver mode and "power-domains" is not present.
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 CFLAGS_rpmh-rsc.o := -I$(src)
3 CFLAGS_qcom_aoss.o := -I$(src)
4 obj-$(CONFIG_QCOM_AOSS_QMP) += qcom_aoss.o
5 obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o
6 obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o
7 obj-$(CONFIG_QCOM_GSBI) += qcom_gsbi.o
8 obj-$(CONFIG_QCOM_MDT_LOADER) += mdt_loader.o
9 obj-$(CONFIG_QCOM_OCMEM) += ocmem.o
10 obj-$(CONFIG_QCOM_PD_MAPPER) += qcom_pd_mapper.o
[all …]
H A Drpmh-rsc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
31 #include <soc/qcom/cmd-db.h>
33 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
35 #include "rpmh-internal.h"
38 #include "trace-rpmh.h"
96 * Here's a high level overview of how all the registers in RPMH work
99 * - The main rpmh-rsc address is the base of a register space that can
101 * (DRV_PRNT_CHLD_CONFIG). Also found within the rpmh-rsc register
[all …]
H A Dcmd-db.c1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2016-2018, 2020, The Linux Foundation. All rights reserved.
18 #include <soc/qcom/cmd-db.h>
105 const u8 *magic = header->magic; in cmd_db_magic_matches()
114 u16 offset = le16_to_cpu(hdr->header_offset); in rsc_to_entry_header()
116 return cmd_db_header->data + offset; in rsc_to_entry_header()
122 u16 offset = le16_to_cpu(hdr->data_offset); in rsc_offset()
123 u16 loffset = le16_to_cpu(ent->offset); in rsc_offset()
125 return cmd_db_header->data + offset + loffset; in rsc_offset()
129 * cmd_db_ready - Indicates if command DB is available
[all …]
H A Drpmh.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
21 #include <soc/qcom/rpmh.h>
23 #include "rpmh-internal.h"
59 * struct batch_cache_req - An entry in our batch catch
74 struct rsc_drv *drv = dev_get_drvdata(dev->parent); in get_rpmh_ctrlr()
76 return &drv->client; in get_rpmh_ctrlr()
83 struct completion *compl = rpm_msg->completion; in rpmh_tx_done()
84 bool free = rpm_msg->needs_free; in rpmh_tx_done()
101 list_for_each_entry(p, &ctrlr->cache, list) { in __find_req()
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
[all …]
H A Dqdu1000.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interconnect/qcom,icc.h>
11 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
[all …]
H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/phy/phy-qcom-qusb2.h>
[all …]
H A Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Dqcom,rpmh-regulator.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/qcom,rpmh-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. RPMh Regulators
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 rpmh-regulator devices support PMIC regulator management via the Voltage
15 Regulator Manager (VRM) and Oscillator Buffer (XOB) RPMh accelerators.
17 Resource State Coordinator (RSC) using command packets. The VRM allows
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sdx55.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
H A Dqcom-sdx65.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
15 #include <dt-bindings/interconnect/qcom,sdx65.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gmu.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2017-2019 The Linux Foundation. All rights reserved. */
11 #include <soc/qcom/cmd-db.h>
23 struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; in a6xx_gmu_fault()
24 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_fault()
27 gmu->hung = true; in a6xx_gmu_fault()
30 del_timer(&gpu->hangcheck_timer); in a6xx_gmu_fault()
33 kthread_queue_work(gpu->worker, &gpu->recover_work); in a6xx_gmu_fault()
45 dev_err_ratelimited(gmu->dev, "GMU watchdog expired\n"); in a6xx_gmu_irq()
51 dev_err_ratelimited(gmu->dev, "GMU AHB bus error\n"); in a6xx_gmu_irq()
[all …]
/linux/drivers/clk/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
146 tristate "RPMh Clock Driver"
149 RPMh manages shared resources on some Qualcomm Technologies, Inc.
150 SoCs. It accepts requests from other hardware subsystems via RSC.
151 Say Y if you want to support the clocks exposed by RPMh on
1251 tristate "High-Frequency PLL (HFPLL) Clock Controller"
1253 Support for the high-frequency PLLs present on Qualcomm devices.

12