Searched +full:riscv +full:- +full:crypto (Results 1 – 7 of 7) sorted by relevance
/linux/Documentation/devicetree/bindings/riscv/ |
H A D | extensions.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/riscv/extensions.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V ISA extensions 10 - Paul Walmsley <paul.walmsley@sifive.com> 11 - Palmer Dabbelt <palmer@sifive.com> 12 - Conor Dooley <conor@kernel.org> 15 RISC-V has a large number of extensions, some of which are "standard" 16 extensions, meaning they are ratified by RISC-V International, and others [all …]
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/linux/Documentation/arch/riscv/ |
H A D | hwprobe.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 RISC-V Hardware Probing Interface 4 --------------------------------- 6 The RISC-V hardware probing interface is based around a single syscall, which 18 The arguments are split into three groups: an array of key-value pairs, a CPU 19 set, and some flags. The key-value pairs are supplied with a count. Userspace 22 will be cleared to -1, and its value set to 0. The CPU set is defined by 23 CPU_SET(3) with size ``cpusetsize`` bytes. For value-like keys (eg. vendor, 25 have the same value. Otherwise -1 will be returned. For boolean-like keys, the 33 by sys_riscv_hwprobe() to only those which match each of the key-value pairs. [all …]
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/linux/arch/riscv/crypto/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 3 menu "Accelerated Cryptographic Algorithms for CPU (riscv)" 13 Length-preserving ciphers: AES with ECB, CBC, CTS, CTR, XTS 16 - Zvkned vector crypto extension 17 - Zvbb vector extension (XTS) 18 - Zvkb vector crypto extension (CTR) 19 - Zvkg vector crypto extension (XTS) 27 Length-preserving ciphers: ChaCha20 stream cipher algorithm 30 - Zvkb vector crypto extension 37 GCM GHASH function (NIST SP 800-38D) [all …]
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/linux/arch/riscv/purgatory/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 purgatory-y := purgatory.o sha256.o entry.o string.o ctype.o memcpy.o memset.o 5 purgatory-y += strcmp.o strlen.o strncmp.o 8 targets += $(purgatory-y) 9 PURGATORY_OBJS = $(addprefix $(obj)/,$(purgatory-y)) 17 $(obj)/memcpy.o: $(srctree)/arch/riscv/lib/memcpy.S FORCE 20 $(obj)/memset.o: $(srctree)/arch/riscv/lib/memset.S FORCE 23 $(obj)/strcmp.o: $(srctree)/arch/riscv/lib/strcmp.S FORCE 26 $(obj)/strlen.o: $(srctree)/arch/riscv/lib/strlen.S FORCE 29 $(obj)/strncmp.o: $(srctree)/arch/riscv/lib/strncmp.S FORCE [all …]
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/linux/arch/riscv/boot/dts/starfive/ |
H A D | jh7110.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include <dt-bindings/clock/starfive,jh7110-crg.h> 9 #include <dt-bindings/power/starfive,jh7110-pmu.h> 10 #include <dt-bindings/reset/starfive,jh7110-crg.h> 11 #include <dt-bindings/thermal/thermal.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 19 #address-cells = <1>; 20 #size-cells = <0>; [all …]
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/linux/arch/riscv/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 # see Documentation/kbuild/kconfig-language.rst. 13 config RISCV config 66 # LLD >= 14: https://github.com/llvm/llvm-project/issues/50505 222 # -Zsanitizer=shadow-call-stack flag. 232 depends on $(cc-option,-fpatchable-function-entry=8) 235 def_bool $(cc-option,-fsanitize=shadow-call-stack) 236 …# https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444… 237 depends on $(ld-option,--no-relax-gp) 241 # https://github.com/llvm/llvm-project/commit/6611d58f5bbcbec77262d392e2923e1d680f6985 [all …]
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/linux/ |
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