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Searched +full:mpfs +full:- +full:ccc (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dmicrochip,mpfs-ccc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Conor Dooley <conor.dooley@microchip.com>
16 https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html
20 const: microchip,mpfs-ccc
24 - description: PLL0's control registers
25 - description: PLL1's control registers
26 - description: DLL0's control registers
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/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
11 compatible = "microchip,mpfs";
14 #address-cells = <1>;
15 #size-cells = <0>;
16 timebase-frequency = <1000000>;
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/linux/drivers/clk/microchip/
H A Dclk-mpfs-ccc.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/microchip,mpfs-clock.h>
58 * mpfs_ccc_lock prevents anything else from writing to a fabric ccc
76 void __iomem *mult_addr = ccc_hw->base + ccc_hw->reg_offset; in mpfs_ccc_pll_recalc_rate()
77 void __iomem *ref_div_addr = ccc_hw->base + MPFS_CCC_REF_CR; in mpfs_ccc_pll_recalc_rate()
91 void __iomem *pll_cr_addr = ccc_hw->base + MPFS_CCC_PLL_CR; in mpfs_ccc_pll_get_parent()
167 char *name = devm_kasprintf(dev, GFP_KERNEL, "%s_out%u", parent->name, i); in mpfs_ccc_register_outputs()
170 return -ENOMEM; in mpfs_ccc_register_outputs()
172 out_hw->divider.hw.init = CLK_HW_INIT_HW(name, &parent->hw, &clk_divider_ops, 0); in mpfs_ccc_register_outputs()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_COMMON_CLK_PIC32) += clk-core.o
3 obj-$(CONFIG_PIC32MZDA) += clk-pic32mzda.o
4 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs.o
5 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs-ccc.o