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Searched +full:gcc +full:- +full:ipq5018 (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,ipq5018-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ5018
10 - Sricharan Ramabadhran <quic_srichara@quicinc.com>
14 domains on IPQ5018
17 include/dt-bindings/clock/qcom,ipq5018-gcc.h
18 include/dt-bindings/reset/qcom,ipq5018-gcc.h
22 const: qcom,gcc-ipq5018
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/linux/arch/arm64/boot/dts/qcom/
H A Dipq5018.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * IPQ5018 SoC device tree source
8 #include <dt-bindings/clock/qcom,apss-ipq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
11 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 sleep_clk: sleep-clk {
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/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,ipq5332-uniphy-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,ipq5332-uniphy-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nitheesh Sekar <quic_nsekar@quicinc.com>
11 - Varadarajan Narayanan <quic_varada@quicinc.com>
14 PCIe and USB combo PHY found in Qualcomm IPQ5018 & IPQ5332 SoCs
19 - qcom,ipq5018-uniphy-pcie-phy
20 - qcom,ipq5332-uniphy-pcie-phy
33 "#phy-cells":
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H A Dqcom,ipq5332-usb-hsphy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sricharan Ramabadhran <quic_srichara@quicinc.com>
11 - Varadarajan Narayanan <quic_varada@quicinc.com>
15 IPQ5018, IPQ5332 SoCs.
20 - enum:
21 - qcom,ipq5018-usb-hsphy
22 - qcom,ipq5332-usb-hsphy
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/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 - enum:
21 - qcom,pcie-apq8064
22 - qcom,pcie-apq8084
23 - qcom,pcie-ipq4019
24 - qcom,pcie-ipq5018
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/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
12 # Use the combined qcom,snps-dwc3 instead
21 - compatible
26 - enum:
27 - qcom,ipq4019-dwc3
28 - qcom,ipq5018-dwc3
29 - qcom,ipq5332-dwc3
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H A Dqcom,snps-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
19 const: qcom,snps-dwc3
21 - compatible
26 - enum:
27 - qcom,ipq4019-dwc3
28 - qcom,ipq5018-dwc3
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/linux/Documentation/devicetree/bindings/net/
H A Dqca,ar803x.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
18 - $ref: ethernet-phy.yaml#
19 - if:
24 - ethernet-phy-id004d.d0c0
29 const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC
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/linux/Documentation/devicetree/bindings/spi/
H A Dqcom,spi-qpic-snand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md sadre Alam <quic_mdalam@quicinc.com>
13 The QCOM QPIC-SPI-NAND flash controller is an extended version of
15 and parallel mode. It supports typical SPI-NAND page cache
20 - $ref: /schemas/spi/spi-controller.yaml#
25 - items:
26 - enum:
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/linux/Documentation/devicetree/bindings/firmware/
H A Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
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/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5018-qfprom
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/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
20 - enum:
21 - qcom,sdhci-msm-v4
23 - items:
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-uniphy-pcie-28lp.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <linux/clk-provider.h>
143 const struct qcom_uniphy_pcie_data *data = phy->data; in qcom_uniphy_pcie_init()
145 void __iomem *base = phy->base; in qcom_uniphy_pcie_init()
148 for (lane = 0; lane < phy->lanes; lane++) { in qcom_uniphy_pcie_init()
149 init_seq = data->init_seq; in qcom_uniphy_pcie_init()
151 for (i = 0; i < data->init_seq_num; i++) in qcom_uniphy_pcie_init()
154 base += data->lane_offset; in qcom_uniphy_pcie_init()
162 clk_bulk_disable_unprepare(phy->num_clks, phy->clks); in qcom_uniphy_pcie_power_off()
164 return reset_control_assert(phy->resets); in qcom_uniphy_pcie_power_off()
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/linux/drivers/thermal/qcom/
H A Dtsens.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/nvmem-consumer.h>
26 * struct tsens_irq_data - IRQ status and temperature violations
81 if (priv->num_sensors > MAX_SENSORS) in tsens_read_calibration()
82 return -EINVAL; in tsens_read_calibration()
88 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &mode); in tsens_read_calibration()
89 if (ret == -ENOENT) in tsens_read_calibration()
90 dev_warn(priv->dev, "Please migrate to separate nvmem cells for calibration data\n"); in tsens_read_calibration()
94 dev_dbg(priv->dev, "calibration mode is %d\n", mode); in tsens_read_calibration()
100 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &base1); in tsens_read_calibration()
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